Ex Parte Elrod et al

Board of Patent Appeals and Interferences

Jan 27, 2012

11498503 (B.P.A.I. Jan. 27, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte JAY RODGER ELROD, CHARLES WILLIAM THIESFEID and
JON DAVID TRANTHAM
____________

Appeal 2009-014967
Application 11/498,503
Technology Center 2800
____________

Before KRISTEN L. DROESCH, GREGORY J. GONSALVES, and
JASON V. MORGAN, Administrative Patent Judges.

GONSALVES, Administrative Patent Judge.

DECISION ON APPEAL
Appeal 2009-014967
Application 11/498,503

2
STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134(a) from the rejection of
claims 1-6, 8-14, 16-23, and 25-27. (App. Br. 4.) Claims 7, 15, and 24 were
cancelled. (Id.) We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.
The Invention
Exemplary independent claim 1 is as follows:
1. A system comprising:
a master reset device; and
a plurality of slave reset devices, the slave reset devices and the
master reset device being interconnected by a reset line, wherein the master
reset device detects a false reset signal on the reset line and retransmits a
true reset signal on the reset line in response to detecting the false reset
signal, and each of the plurality of slave reset devices reset in response to the
true reset signal.

The Examiner rejected claims 1, 2, 4-6, 8-12, 14, 16-21, 23, and 25-27
under 35 U.S.C. § 102(b) as being anticipated by Bennett (U.S. Patent
5,825,708). (Ans. 3-7.)
The Examiner rejected claims 3, 13, and 22 under 35 U.S.C. § 103(a)
as being unpatentable over Bennett in view of Funyu (U.S. Patent Pub.
2001/0017791). (Ans. 7-8.)

Appeal 2009-014967
Application 11/498,503

3
ISSUE
Appellants’ responses to the Examiner’s positions present the
following issue:
Did the Examiner establish that Bennett discloses that “the master
reset device detects a false reset signal on the reset line and retransmits a
true reset signal on the reset line in response to detecting the false reset
signal, and that each of the plurality of slave reset devices reset in response
to the true reset signal,” as recited in independent claim 1, and as similarly
recited in each of the other independent claims?

ANALYSIS
Issue – Rejection of Claims 1-6, 8-14, 16-23, and 25-27
We have reviewed the Examiner’s rejections in light of Appellants’
arguments (Appeal Brief) that the Examiner has erred. We disagree with
Appellants’ conclusion regarding the rejections of claims 1-6, 8-14, 16-23,
and 25-27. We adopt as our own (1) the findings and reasons set forth by
the Examiner in the action from which this appeal is taken and (2) the
reasons set forth by the Examiner in the Examiner’s Answer (Ans. 3-15) in
response to the Appellants’ Appeal Brief. We concur with the conclusion
reached by the Examiner. But we highlight and address specific findings
and arguments regarding the claim phrase “false reset signal.”
Appellants argue that claim 1 is not anticipated because “the Office
has provided no support for the allegation that the relay bouncing is a false
reset signal as defined by the Specification.” (App. Br. 7.) As explained by
the Examiner, however, Appellants’ specification “refers to any reset signal
that is not a true reset signal, e.g., a reset signal generated by noise or other
Appeal 2009-014967
Application 11/498,503

4
means.” (Spec. ¶ [0019].) In Bennett, the external logic low is not a true
reset signal because it is generated by a relay bounce. (Ans. 9.)
Accordingly, we find that the Examiner, giving the claim its broadest
reasonable meaning consistent with the Specification, In re Morris, 127 F.3d
1048, 1054 (Fed. Cir. 1997), properly relies on Bennett’s external logic low
as the claimed “false reset signal.”
Appellants also argue that “the scenario of FIG. 8 of Bennett does not
‘retransmit a true reset signal on the reset line in response to detecting the
false reset signal,’ as recited in independent claim 1.” (App. Br. 7.) As
explained by the Examiner, however, after the relay bounce (i.e., false reset
signal) is detected in step 316 of Bennett’s scenario of FIG. 8, an arbitrator
“‘commands the PDC assert driver to pull the reset line to the internal logic
low.’” (Ans. 9 (quoting Bennett 7:10-13).) And the internal logic low
signal is a true reset signal because it “causes the reset procedures of the
devices to be restarted (step 306).” (Ans. 9.) In other words, Bennett
retransmits the internal logic low signal as a true reset signal on the reset line
in response to detecting the relay bounce as a false reset signal.
For these reasons and for the reasons expressed in the Examiner’s
Answer (Ans. 3-15) we sustain the Examiner’s rejections of independent
claim 1 as well as the other claims on appeal because Appellants either did
not set forth any separate patentability arguments for the other claims or set
forth arguments that are substantially similar to those set forth for claim 1.
(See App. Br. 8-15.)

Appeal 2009-014967
Application 11/498,503

5
DECISION
We affirm the Examiner’s decision rejecting claims 1-6, 8-14, 16-23,
and 25-27.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

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