Ex parte Eimori et al.

Board of Patent Appeals and Interferences

Jul 29, 1998

07765771 (B.P.A.I. Jul. 29, 1998)

Application for patent filed September 26, 1991. 1
According to appellants, the application is a division of
Application No. 07/391,008, filed August 9, 1989, now Patent
No. 5,067,000, issued November 19, 1991.
THIS OPINION WAS NOT WRITTEN FOR PUBLICATION
The opinion in support of the decision being entered
today (1) was not written for publication in a law
journal and (2) is not binding precedent of the
Board.
Paper No. 25
UNITED STATES PATENT AND TRADEMARK OFFICE
____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________
Ex parte TAKAHISA EIMORI, SHINICHI SATOH, WATARU WAKAMIYA,
HIROJI OZAKI and YOSHINORI TANAKA
____________
Appeal No. 94-4342
Application No. 07/765,7711
____________
ON BRIEF
____________
Before WEIFFENBACH, PAK and WARREN, Administrative Patent
Judges.
PAK, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on an appeal from the examiner’s
refusal to allow claims 10, 11, 14 and 15, which are all of
the claims remaining in the application.
Appeal No. 94-4342
Application No. 07/765,771
2
Claim 10 is representative of the subject matter on
appeal and reads as follows:
10. A method for manufacturing a semiconductor device
for electrically isolating a first device and a second device
formed on a common semiconductor substrate of a first
conductivity type having a major surface, comprising the steps
of
forming a first conductor having a predetermined shape on
the major surface of said semiconductor substrate and
separated therefrom by a first insulating film, and forming a
second insulating film on said first conductor,
forming a third insulating film having a predetermined
vertical thickness on the major surface of said semiconductor
substrate so as to cover said first conductor and said second
insulating film,
removing said third insulating film by anisotropic
etching to expose the major surface of said semiconductor
substrate, to form on sidewalls of: said first insulating
film; said first conductor and said second insulating film, a
sidewall insulating film having a predetermined lateral
thickness corresponding to said predetermined vertical
thickness of said third insulating film,
thereafter, implanting impurities of a second
conductivity type opposite to said first conductivity type on
the exposed major surface of said semiconductor substrate
utilizing as masks said third insulating film said sidewall
insulating film, and
diffusing the implanted impurities to form a first
impurity region included in said first device and a second
impurity region included in said second device such that a
Appeal No. 94-4342
Application No. 07/765,771
3
boundary portion thereof is not overlapped by said first
conductor over the major surface of said semiconductor
substrate,
wherein said step of implanting said impurities comprises
spacing said impurities laterally from said first conductor by
said lateral thickness of said sidewall insulating film and
thereby separating said impurities laterally from said first
conductor by a distance corresponding to said predetermined
vertical thickness of said third insulating film.
As evidence of obviousness, the examiner relies on the
following prior art:
Horiuchi et al. (Horiuchi) 0171003 Feb. 12, 1986
(Published European Patent Application)
Appellants’ admitted prior art, figures 13A-13G and 14 and
their description at pages 6 through 8 of the specification
(hereinafter referred to as “admitted prior art”).
Claims 10, 11, 14 and 15 stand rejected under 35 U.S.C.
§ 103 as unpatentable over the admitted prior art in view of
Horiuchi.
Having carefully considered the entire record before us,
including all of the arguments advanced by the examiner and
appellants in support of their respective positions, we find
ourselves in complete agreement with the position succinctly
set forth by appellants in their Brief, pages 7 and 8, and
Reply Brief, pages 1 and 2. As indicated by appellants, the
Appeal No. 94-4342
Application No. 07/765,771
4
prior art relied upon by the examiner does not teach, nor
would have suggested, a step of implanting impurities
comprising “spacing said impurities laterally from said first
conductor by said lateral thickness of said sidewall
insulating film and thereby separating said impurities
laterally from said first conductor by a distance
corresponding to said predetermined vertical thickness of said
third insulating film.” Accordingly, the § 103 rejection of
claims 10, 11, 14 and 15 is reversed.
REVERSED
CAMERON WEIFFENBACH )
Administrative Patent Judge )
)
)
)
) BOARD OF PATENT
CHUNG K. PAK ) APPEALS
Administrative Patent Judge ) AND
) INTERFERENCES
)
)
)
CHARLES F. WARREN )
Administrative Patent Judge )
Appeal No. 94-4342
Application No. 07/765,771
5
Gene Z. Rubinson
LOWE, PRICE, LEBLANC & BECKER
99 Canal Center Plaza, Suite 300
Alexandria, VA 22314
CKP/jrg
JENINE GILLIS
Appeal No. 94-4342
Serial No. 07/765,771
Judge PAK
Judge WEIFFENBACH

Judge WARREN
Typed: 11 Jul 98
DECISION: REVERSED

Send Reference(s): Yes No
or Translation(s)
Panel Change: Yes No
3-Person Conf. Yes No
Heard: Yes No
Remanded: Yes No
Index Sheet-2901 Rejection(s): ___________
Acts 2: ____
Palm: ____
Mailed: Updated Monthly Disk: ____
Updated Monthly Report:
___
Appeal No. 94-4342
Application No. 07/765,771
7