Ex Parte DRATHDownload PDFPatent Trial and Appeal BoardFeb 10, 201613404986 (P.T.A.B. Feb. 10, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 13/404,986 02/24/2012 21839 7590 02/12/2016 BUCHANAN, INGERSOLL & ROONEY PC POST OFFICE BOX 1404 ALEXANDRIA, VA 22313-1404 FIRST NAMED INVENTOR Rainer DRATH UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. 1034193-000282 2521 EXAMINER COBB, MICHAEL J ART UNIT PAPER NUMBER 2613 NOTIFICATION DATE DELIVERY MODE 02/12/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): ADIPDOC 1@BIPC.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte RAINER DRATH Appeal2014-002245 Application 13/404,9861 Technology Center 2600 Before ROBERT E. NAPPI, JAMES W. DEJMEK, and JOHN D. HAMANN, Administrative Patent Judges. HAMANN, Administrative Patent Judge. DECISION ON APPEAL Appellant files this appeal under 35 U.S.C. § 134(a) from the Examiner's Final Rejection of claims 1, 4, 5, 8, 10, 15, and 16. Claims 2-3, 6-7, 9, 11-14, and 17-25 are canceled. We have jurisdiction under 35 U.S.C. § 6(b). We reverse. THE CLAIMED INVENTION Appellant's claimed invention relates to executing automation tasks of automation devices by combining one or more central processing units 1 According to Appellant, the real party in interest is ABB Technology AG. App. Br. 2. Appeal2014-002245 Application 13/404,986 ("CPU") and one or more Graphics Processing Units ("GPU") so that control tasks are executed by the CPU, a multi-core GPU, or both in parallel at the same time. Abstract. Of the claims on appeal, claim 1 is illustrative of the subject matter of the appeal and is reproduced below, with emphasis added to highlight the dispositive disputed issue. 1. A method of performing a computational execution of multiple control tasks of an automation device, wherein the automation device includes at least one of a single-core control unit and a multi-core control unit, the method comprising: executing the control tasks on the automation device by at least one multi-core graphics processor unit (GPU), wherein the control tasks are real time applications and each control task is run exclusively at one or more designated parallel calculation units situated on a graphics adapter in the at least one GPU. REJECTIONS ON APPEAL (1) The Examiner rejected claims 1, 4, 5, and 10 under 35 U.S.C. § 103(a) as being unpatentable over the combination of Munshi et al. (US 2008/0276262 Al; Nov. 6, 2008) (hereinafter "Munshi"); John D. Owens et. al., GPU Computing: Graphics Processing Units-powerful, programmable, and highly parallel-are increasingly targeting general- purpose computing applications, 96 Proc. of the IEEE 879 (2008) (hereinafter "Owens"); and Julius Fabian Ohmer, Computer Vision Applications on Graphics Processing Units (2007) (M.Sc. IT thesis, Queensland University of Technology) (hereinafter "Ohmer"), collectively referred to as the "first combination." (2) The Examiner rejected claims 8 and 15 under 35 U.S.C. § 103(a) as being unpatentable over the combination of Munshi, Owens, 2 Appeal2014-002245 Application 13/404,986 Ohmer, and Okazaki et al. (US 2006/0184272 Al; Aug. 17, 2006) (hereinafter "Okazaki"). (3) The Examiner rejected claim 16 under 35 U.S.C. § 103(a) as being unpatentable over the combination of Munshi, Owens, Ohmer, and Lenihan et al. (US 7, 185,411 B2; Mar. 6, 2007) (hereinafter "Lenihan"). ISSUE ON APPEAL The dispositive issue for this appeal is whether the Examiner erred in finding that the first combination teaches or suggests that control task applications each run exclusively at one or more designated parallel calculation units, as recited in independent claims 1 and 10. ANALYSIS Appellant argues the first combination fails to teach or suggest that each control task is run exclusively at one or more designated parallel calculation units of a GPU. App. Br. 6. Appellant first argues that the term "task" is used differently in the claims than in the Examiner cited art. See id. Specifically, Appellant argues "control tasks" are applications and that the first combination instead teaches parallel processing of "computer tasks," which are program instructions (i.e., fragments of code). See App. Br. 5---6 ( citing Owens 881, 882). Based on this difference, Appellant contends the first combination fails to teach or suggest that each control task application is run exclusively at one or more designated parallel calculation units. See App. Br. 6; Reply Br. 4. Specifically, Appellant argues that instead of teaching different parallel processing units exclusively handle different control task applications, the first combination teaches different parallel 3 Appeal2014-002245 Application 13/404,986 processing cores can handle different program instructions in parallel. App. Br. 6 (citing Owens 881, 882); Reply Br. 4. Furthermore, Appellant argues this distinction is underscored by the first combination's emphasis on "choosing algorithms that divide the computational domain into as many independent pieces as possible," which is contrary to - and unnecessary in - the claimed invention. See App. Br. 7 (citing Owens 888, Adv. Act. 2, 3); id. ("[T]he costly effort of parallelization and management of a real time system is no longer required if programmed control tasks are taken as they are and are executed in parallel, each on their own calculation unit of the GPU."). The Examiner finds the broadest reasonable interpretation of "control task" is "a task that controls a control-type operation." Ans. 25-27. The Examiner also finds that the Specification does not necessarily equate control tasks to applications. See Ans. 26. As to "exclusively," the Examiner finds the broadest reasonable interpretation of this term provides for each control task to run on at least one parallel calculation unit of a GPU. Ans. 27-28. The Examiner also finds "[t]he term exclusively is limiting only in the fact that a task being ran on a dedicated parallel calculation unit would be ran exclusively on that dedicated parallel calculation unit." Ans. 28. Based on these findings, the Examiner concludes the first combination teaches this disputed limitation. See Ans. 33 (citing Owens 882, 883, Fig. 1) (teaching that GPUs can operate with multiple computer tasks running in parallel and independent of each other). The Examiner also finds: [I]f a narrower interpretation of exclusively on one or more dedicated calculation units was taken, it would be the choice of a designer/programmer depending upon the system 4 Appeal2014-002245 Application 13/404,986 requirements, whether the control task should be run exclusively on a specific parallel unit or if the task was allowed to be mapped to an open parallel unit each time it was executed (design choice/design flexibility). The basis for this decision would come from design and computational processing requirements, load balancing, balance between restrictions and generality, etc. Ans. 34. We find Appellant's above arguments persuasive. We agree the control tasks of claims 1 and 10 are, inter alia, applications. See claim 1 ("wherein the control tasks are ... applications"), claim 10 (same). We also find, in accordance with Appellant's arguments and in light of the Specification, that each control task application - and each of the instructions it embodies - runs exclusively on separate calculation units. See Spec. i-fi-123 ("Since the number of parallel calculation units available situated on a graphics adapter in one or more GPU s exceeds the typical number of parallel tasks of an automation system; the costly effort of parallelization and management of a real time system is no longer required."), 31 ("The complex and time consuming decomposition of parallel tasks into a sequence of small code fragments can be reduced or avoided."). We agree with Appellant that the cited portions of the first combination fail to teach or suggest this disputed limitation, and instead teach parallel processing of tasks at a program instruction level. See, e.g., Owens 881-84, 888. We also find that the Examiner's design choice rationale for "exclusively" does not have support in the cited record. Based on the evidence of record, we are constrained to agree with Appellant that 5 Appeal2014-002245 Application 13/404,986 the Examiner erred in finding that the first combination discloses this disputed limitation. Accordingly, we also agree with Appellant that the Examiner erred in finding that the first combination teaches or suggests independent claims 1 and 10. Furthermore, dependent claims 4, 5, 8, 15, and 16 each incorporate the disputed limitation and likewise have not been shown to be rendered obvious by the first combination. DECISION The Examiner's rejections of claims 1, 4, 5, 8, 10, 15, and 16 are reversed. REVERSED Jagr 6 Copy with citationCopy as parenthetical citation