Ex Parte Dorojevets et al

Board of Patent Appeals and Interferences

Jun 21, 2012

10816391 (B.P.A.I. Jun. 21, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
10/816,391 03/31/2004 Mikhail Dorojevets SONY-27300 1665
7590 06/22/2012
Jonathan O. Owens
HAVERSTOCK & OWENS LLP
162 North Wolfe Road
Sunnyvale, CA 94086
EXAMINER
HOLDER, ANNER N
ART UNIT PAPER NUMBER
2483
MAIL DATE DELIVERY MODE
06/22/2012 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________________

Ex parte MIKHAIL DOROJEVETS and EIJI OGURA
____________________

Appeal 2009-014884
Application 10/816,391
Technology Center 2400
____________________

Before KRISTEN L. DROESCH, KALYAN K. DESHPANDE, and
JOHNNY A. KUMAR, Administrative Patent Judges.

DESHPANDE, Administrative Patent Judge.

DECISION ON APPEAL

Appeal 2009-014884
Application 10/816,391

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STATEMENT OF CASE1
The Appellants seek review under 35 U.S.C. § 134(a) of a final
rejection of claims 1-51, the only claims pending in the application on
appeal. We have jurisdiction over the appeal pursuant to 35 U.S.C. § 6(b).
We AFFIRM.

The Appellants invented video processing using 2D block processing
architecture. Specification 1:4-5.
An understanding of the invention can be derived from a reading of
exemplary claim 1, which is reproduced below:
1. A video processing apparatus comprising:
a. a memory; and
b. one or more video processing modules, each video
processing module coupled to the memory and comprising:
i. a programmable array of processing elements,
each processing element including local registers to
provide data used in processing operations and to store
results of the processing operations;
ii. a block load and store unit coupled to the
programmable array of processing elements to load,
store, and send data transferred back and forth between
the memory and the array of processing elements;
iii. a global accumulation unit to accumulate the
results of the processing operations for each processing
element; and
iv. a local controller to provide instructions and
parameters related to the processing operations and data
transfer.

1 Our decision will make reference to the Appellants’ Appeal Brief (“App.
Br.,” filed Mar. 20, 2009) and Reply Brief (“Reply Br.,” filed July 27, 2009),
and the Examiner’s Answer (“Ans.,” mailed June 10, 2009), and Final
Rejection (“Final Rej.,” mailed Dec. 11, 2008).
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Application 10/816,391

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REFERENCES
The Examiner relies on the following prior art:
Buchholz
Taylor
Agarwal
US 4,745,547
US 4,992,933
US 5,680,338
May 17, 1988
Feb. 12, 1991
Oct. 21, 1997
Robert Heaton et al., A Bit-Serial VLSI Array Processing Chip for
Image Processing, IEEE Journal of Solid-State Circuits, Vol. 25,
No. 2, pp. 364-368 (April 1990) (“Heaton”)

REJECTIONS
Claims 1, 2, 7, 8, 11, 13-16, 41, 44, 50, and 51 stand rejected under 35
U.S.C. §103(a) as being unpatentable over Heaton.
Claims 3, 4, 9, 10, 42, 43, 45, and 46 stand rejected under 35 U.S.C.
§103(a) as being unpatentable over Heaton and Taylor.
Claims 12 and 49 stand rejected under 35 U.S.C. §103(a) as being
unpatentable over Heaton and Buchholz.
Claims 5, 6, 15, 47, and 48 stand rejected under 35 U.S.C. §103(a) as
being unpatentable over Heaton and Agarwal.
Claims 17-26, 28-38, and 40 stand rejected under 35 U.S.C. §103(a)
as being unpatentable over Heaton, Taylor, and Agarwal.
Claims 27 and 29 stand rejected under 35 U.S.C. 103(a) as being
unpatentable over Heaton, Taylor, Agarwal, and Buchholz.

ISSUE
The Examiner and Appellants agree that Heaton describes a local
accumulator unit and a global address. App. Br. 7-9 and Ans. 4 and 18. The
Examiner further determined that a person with ordinary skill in the art
would have found it obvious to modify Heaton such that a global
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Application 10/816,391

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accumulator unit would be included in the system and can store information
in the global address. Ans. 4 and 18. That is, Heaton teaches a local
accumulation unit and the same functionality can be modified to a global
accumulation unit. Id. The Appellants contend that Heaton fails to teach or
suggest a global accumulation unit and it would not have been obvious to a
person with ordinary skill in the art to modify Heaton’s local accumulator
unit into a global accumulation unit. The Appellants reiterate this argument
in support of all of the rejections submitted by the Examiner. App. Br. 6-18
and Reply Br. 5-8.
As such, whether the Examiner erred in rejecting claims 1-51 turns on
whether a person with ordinary skill in the art would have found it obvious
to modify Heaton in order to include a global accumulator unit.

ANALYSIS
We have reviewed the Examiner’s rejections in light of the
Appellants’ contentions that the Examiner has erred.
We disagree with the Appellants’ conclusions. We adopt as our own
(1) the findings and reasons set forth by the Examiner in the action from
which this appeal is taken and (2) the reasons set forth by the Examiner in
the Examiner’s Answer in response to the Appellants’ Appeal Brief. We
concur with the conclusion reached by the Examiner.
For emphasis, we further note that the Appellants’ arguments (App.
Br. 8-9) that the modification of Heaton’s local accumulator will not render
a global accumulator unit obvious is not supported by factual evidence.
Attorney arguments and conclusory statements that are unsupported by
factual evidence are entitled to little probative value. See In re Geisler, 116
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F.3d 1465, 1470 (Fed. Cir. 1997); see also In re De Blauwe, 736 F.2d 699,
705 (Fed. Cir. 1984).

CONCLUSION
The Examiner did not err in rejecting claims 1-51.

DECISION
To summarize, our decision is as follows.
 The rejections of claims 1-51 are sustained.

No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv) (2010).

AFFIRMED

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