Ex Parte DeSota et al

Board of Patent Appeals and Interferences

Oct 26, 2009

10386216 (B.P.A.I. Oct. 26, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte DONALD R. DESOTA, BRUCE M. GILBERT,
and ROBERT JOERSZ
____________

Appeal 2009-004905
Application 10/386,216
Technology Center 2100
____________

Decided: October 26, 2009
____________

Before JOSEPH L. DIXON, JEAN R. HOMERE, and STEPHEN C. SIU,
Administrative Patent Judges.

DIXON, Administrative Patent Judge.

DECISION ON APPEAL
The Appellants appeal the rejected claims 1-20 under 35 U.S.C.
§ 134(a). We have jurisdiction under 35 U.S.C. § 6(b).
We AFFIRM.

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I. STATEMENT OF THE CASE
The Invention
The invention at issue on appeal relates to a method and system for
partitioning a multi-entity computer system into more than one partition
(Spec. 1).

The Illustrative Claim
Claim 1, an illustrative claim, reads as follows:
1. A method for physically partitioning an entity of a
multiple-entity system into more than one partition, each
entity of the multiple-entity system including a plurality
of processors, a plurality of memory, and one or more
controllers interconnecting the processors to the memory,
the entities interconnected to one another via an
interconnection network, such that the memory of each
entity is accessible within the entity via the controllers
without having to traverse the interconnection network
and is accessible to other of the entities by traversing the
interconnection network, the method comprising:

physically partitioning a plurality of first resources
among the more than one partition, such that the plurality
of first resources physically partitioned to each partition
are directly inaccessible by other partitions of the entity,
and each first resource is accessible over the multiple-
entity system through the partition to which the resource
has been physically partitioned; and,

internally logically partitioning a plurality of second
resources among the more than one partition, such that
each of the plurality of second resources internally
separates transactions of one partition from transactions
of other partitions, and each second resource is accessible
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over the multiple-entity system through the partition to
which the resource has been logically partitioned.

The References
The Examiner relied upon the following prior art as evidence in
support of rejections:
George US 5,659,786 Aug. 19, 1997
Kleinsorge US 6,226,734 B1 May. 1, 2001
Bauman US 6,279,098 B1 Aug. 21, 2001
Hesse US 6,289,021 B1 Sep. 11, 2001
Downer US 6,910,108 B2 Jun. 21, 2005
(filed Jun. 9, 2002)

John L. Hennessy & David A. Patterson, Computer Architecture, A
Quantitative Approach, (3rd Ed. 2003) (hereinafter Patterson)

The Rejections
The following rejections are before us for review:
Claims 1-6 and 10-15 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over the combination of Patterson and Downer.
Claims 7-9 and 16-17 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over the combination of Patterson, Downer, and George.
Claims 18-20 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Patterson, Downer, and Hesse.

II. ISSUE
Have the Appellants shown that the Examiner erred in setting forth a
sufficient initial showing of obviousness of the claimed invention in
rejecting claim 1 as being unpatentable over the combination of Patterson
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and Downer? In particular, the issue turns on: 1) whether the combination
of Patterson and Downer renders the claimed invention; 2) whether one
skilled in the art would be motivated in combining the teachings of Patterson
and Downer without employing impermissible hindsight; and 3) when one
skilled in the art considers the prior art references in their entirety, whether
the claimed invention is obvious over the combination of Patterson and
Downer?

III. PRINCIPLES OF LAW
Prima Facie Case of Unpatentability
The allocation of burden requires that the United States Patent and
Trademark Office (USPTO) produce the factual basis for its rejection of an
application under 35 U.S.C. §§ 102 and 103. In re Piasecki, 745 F.2d 1468,
1472 (Fed. Cir. 1984) (citing In re Warner, 379 F.2d 1011, 1016 (CCPA
1967)). The Examiner bears the initial burden of presenting a prima facie
case of unpatentability. In re Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992).
Appellants have the opportunity on appeal to the Board of Appeals and
Interferences (BPAI) to demonstrate error in the Examiner’s position. See In
re Kahn, 441 F.3d 977, 985-86 (Fed. Cir. 2006).

Scope of Claim
The claim construction analysis begins with the words of the claim.
See Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir.
1996). Absent an express intent to impart a novel meaning to a claim term,
the words take on the ordinary and customary meanings attributed to them
by those of ordinary skill in the art. Brookhill-Wilk 1, LLC., v. Intuitive
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Surgical, Inc., 334 F.3d 1294, 1298 (Fed. Cir. 2003) (internal citations
omitted).

Obviousness
The question of obviousness is resolved on the basis of underlying
factual determinations including: (1) the scope and content of the prior art;
(2) any the differences between the claimed subject matter and the prior art;
and (3) the level of skill in the art. Graham v. John Deere Co., 383 U.S. 1,
17-18 (1966).
In determining obviousness, the Supreme Court stated:
Section 103 forbids issuance of a patent when “the
differences between the subject matter sought to be patented
and the prior art are such that the subject matter as a whole
would have been obvious at the time the invention was made to
a person having ordinary skill in the art to which said subject
matter pertains.”

KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 406 (2007) (hereinafter KSR).
The Court reaffirmed the principle based on its precedent that “[t]he
combination of familiar elements according to known methods is likely to be
obvious when it does no more than yield predictable results.” Id. at 416.
The operative question in this “functional approach” is thus “whether the
improvement is more than the predictable use of prior art elements according
to their established functions.” Id. at 417.

IV. FINDINGS OF FACT
The following findings of fact (FFs) are supported by a preponderance
of the evidence:
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1. There is no express definition of the term “entity” or “node” in the
Specification.
2. Patterson discloses a multiprocessor computer system consists of
multiple nodes that may contain a small number of processors (Fig. 6.2) or
different clusters of computer organizations with each unit having multiple
processors such as Fig. 8.34 (eight way SMP cluster, Patterson, at p. 847).
3. Downer discloses a method and system for partitioning a multiple
processor computer system into two or more partitions or nodes/quads (col.
3, ll. 18-50; Fig. 1).
4. Downer also discloses partitioning a multi-processor computer system
into multiple partitions for running a single operating system in its own
partition or adjusting the allocation of system resources to provide the
suitable sizing of resources to each partition (col. 2, ll. 10-26).

V. ANALYSIS
The Examiner has set forth a detailed explanation of a prima facie
case of obviousness in the Examiner’s Answer. Therefore, we look to the
Appellants’ Briefs to show error in the proffered prima facie case.
The Appellants argued claims 1-20 together as a group (App. Br. 6).
Therefore, we select independent claim 1 as the representative claim for this
group, and we will address the Appellants’ arguments with respect thereto.
See 37 C.F.R. § 41.37(c)(vii). See also In re McDaniel, 293 F.3d 1379,
1383 (Fed. Cir. 2002) (“If the brief fails to meet either requirement [of
37 C.F.R. § 1.192(c)(7)], the Board is free to select a single claim from each
group of claims subject to a common ground of rejection as representative of
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all claims in that group and to decide the appeal of that rejection based
solely on the selected representative claim.”).

35 U.S.C. § 103(a)
With respect to claim 1, the Appellants contend that the
combination of Patterson in view of Downer fails to “provide for a
given entity to be partitioned into more than one partition.” More
exactly, Patterson in view of Downer “only provides for each entity
(e.g., a node or quad in the parlance of Patterson and Downer) to be
configured down to a single partition. A single entity cannot be
partitioned further in Patterson in view of Downer.” (App. Br. 9).
The Appellants further contend that
What the combined teachings of Patterson and Downer
thus suggest in their entirety to one of ordinary skill
within the art, in the broadest and most reasonable sense,
is that the nodes/groups of Patterson correspond to the
nodes/quads of Downer. This is a very broad reading,
because we do have to make the leap of logic that the
interconnection network of Patterson corresponds to the
crossbars of Downer. And yet, this is a reasonable
reading, that considers the entirety of Patterson and
Downer and that considers the nature of their teachings in
combination, insofar as (1) both Patterson and Downer
refer to various elements as nodes, and insofar as (2) the
groups/nodes of Patterson map nicely to the quads/nodes
of Downer.
(Reply Br., 2).
We disagree with the Appellants’ contentions.
We start our analysis with claim interpretation. The disputed claim
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limitation is “entity.” We find no express definition of “entity” from our
review of Appellants’ Specification (FF1) and Appellants have not identified
any express definition. We, thus, interpret “entity” as “an item that can be
treated as a unit and, often, as a member of particular category or type.” See
MICROSOFT COMPUTER DICTIONARY 405 (3rd Ed. 1997). We hold
that the claim limitation “entity” reads on either a combination of the nodes
or unit of SMP in a cluster of Patterson. We also hold that “entity” reads on
the multiprocessor system of Downer as an item that can be treated as a unit
(FF3). In our view, the combination of familiar elements, for example,
clustered multi-processor system of Patterson combined with elements to
partition using the well known Downer’s method, is nothing more than a
“predictable use of prior art elements according to their established
functions.”1
The Appellants further contend that
Applicant thus posits that without employing
impermissible hindsight, there is no motivation to
substitute the system of Downer as a whole for any of the
nodes of Patterson. The system of Downer is in fact no
different than the system of Patterson - as has been
discussed, both include nodes/quads interconnected to
one another via an interconnection network.
Therefore, without trying to piece together Patterson in
view of Downer to read on the claimed
invention…without employing impermissible hindsight -
one of ordinary skill within the art is motivated to
combine Patterson in view of Downer so that the system
of Downer is "overlaid" onto or "aligned" in relation to
the system of Patterson. That is, without employing

1 KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007).
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impermissible hindsight, one of ordinary skill within the
art is motivated to consider Downer's quads as
corresponding to Patterson's nodes, such that Downer's
partitioning as to a system of such quads/nodes can be
employed to partition Patterson's system of nodes. The
only motivation to combine Patterson in view of Downer
so that the entire system of Downer corresponds to a
single node of Patterson's comes from the claimed
invention; otherwise, it is not logical to those of ordinary
skill within the art to so construe Patterson in view of
Downer.
(App. Br. 11).
We disagree with the Appellants’ contentions.
To determine whether there was an apparent reason to combine
the known elements in the way a patent claims, it will often be
necessary to look to interrelated teachings of multiple patents;
to the effects of demands known to the design community or
present in the marketplace; and to the background knowledge
possessed by a person having ordinary skill in the art. To
facilitate review, this analysis should be made explicit. But it
need not seek out precise teachings directed to the challenged
claim's specific subject matter, for a court can consider the
inferences and creative steps a person of ordinary skill in the art
would employ.

KSR, at 401.
Here, partitioning a multi-processor system was well known as
Downer taught at the time of the invention. A person of ordinary skill in the
art who partitions a multi-processor system for appropriately allocating the
system resources as Patterson taught would have obviously employed the
Downer’s method. We also find that Downer expressly teaches the
motivation to combine (FF4). Thus, we find that the Examiner’s motivation
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statement, even though it may be similar to Appellants’ Specification, it is
not based on impermissible hindsight.
The Appellants also contend that
Indeed, “it is this invention as a whole, and not some part
of it, which must be obvious under 35 USC 103." (MPEP
sec. 2141.03.V) Here, the invention as a whole says that
entities of a multiple-entity system that are
interconnected to one another by an interconnection
network can each be partitioned into more than one
partition. Neither Patterson nor Downer teaches such
partitioning of such an entity of a multiple-entity system,
such that the combination of Patterson and Downer
cannot be considered as rendering the claimed invention
unpatentable. The salient point here, in other words, is
that the teachings of Patterson and Downer in their
entirely buttress the interpretation of Downer's quads
being equivalent to Patterson's nodes, such that the
teachings of the prior art doe not render the invention as
a whole obvious. . .
(App. Br. 12).
We disagree with the Appellants’ contentions. We find that the
Appellants’ analysis of a node being equivalent to a quad to be a rigid,
bodily incorporation of Patterson with Downer. In fact, we do not have to
interpret the term “entity” to be a node, nor do we need to equate the nodes
of Patterson to the quads of Downer. As the broadest and reasonable
interpretation of “entity” discussed above, the “entity” can be either a node
of Patterson or a unit of multiprocessors of Downer to be partitioned. “[I]f a
technique has been used to improve one device, and a person of ordinary
skill in the art would recognize that it would improve similar devices in the
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same way, using the technique is obvious unless its actual application is
beyond his or her skill.” KSR, at 417. Here, the partitioning technique of
Downer was well known to improve the allocation of the system resources.
One of ordinary skill in the art would have recognized that Downer’s
method would improve the similar system of Patterson in the same or similar
way. We find that the combination of Patterson and Downer is “a design
step well within the grasp of a person of ordinary skill in the relevant art”
and the benefit of doing so would be obvious. Id. at 427. The Appellants
have not shown that employing the partition of multi-processor system of
Downer in the multi-processor system of Patterson was uniquely challenging
or difficult for one of ordinary skill in the art or represented an unobvious
step over the prior art.
Accordingly, we sustain the Examiner’s obviousness rejection of
independent claim 1. We also sustain the Examiner’s obviousness
rejection of independent claims 10 and 18, which has not been separately
argued. Dependent claims 2-9, 11-17, and 19-20 fall with the
corresponding base claims. 37 C.F.R. § 41.37(c)(1)(vii) (2007). In re
Nielson, 816 F.2d 1567, 1572 (Fed. Cir. 1987).

VI. CONCLUSION
Based on the administrative record before us, the Appellants have not
shown that the Examiner erred in determining that the combination of
Patterson and Downer renders the claimed invention obvious.

VII. DECISION
We affirm the rejection of claims 1-20 under 35 U.S.C. § 103(a).
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No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv) (2007).

AFFIRMED

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