Ex Parte Den Besten

Patent Trial and Appeal Board

Dec 28, 2015

13315849 (P.T.A.B. Dec. 28, 2015)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/315,849 12/09/2011
65913 7590 12/30/2015
Intellectual Property and Licensing
NXPB.V.
411 East Plumeria Drive, MS41
SAN JOSE, CA 95134
FIRST NAMED INVENTOR
Gerrit Willem Den Besten
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
81393932US03 4088
EXAMINER
KIM,TIJNGH
ART UNIT PAPER NUMBER
2842
NOTIFICATION DATE DELIVERY MODE
12/30/2015 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
ip.department.us@nxp.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte GERRIT WILLEM DEN BESTEN
Appeal2014-000653
Application 13/315,849
Technology Center 2800
Before ROBERT E. NAPPI, CARLA M. KRIVAK, and
JEFFREY A. STEPHENS, Administrative Patent Judges.
KRIVAK, Administrative Patent Judge.
DECISION ON APPEAL
Appellant appeals under 35 U.S.C. § 134(a) from the Examiner's
Final Rejection of claims 5 and 6. Claims 7 and 8 are objected to, and
claims 1, 3, and 9 are allowed (Final Act. 4). Claims 2, 4, and 10-14 have
been canceled. We have jurisdiction under 35 U.S.C. § 6(b ).
We affirm-in-part.
Appeal2014-000653
Application 13/315,849
STATEMENT OF THE CASE
Appellant's invention is directed to an electronic circuit "comprising a
first pass-gate with a first voltage-controlled switch and a second pass-gate
with a second voltage-controlled switch for controllably passing a
differential signal." (Spec. 1 :5-8).
Independent claim 5, reproduced below, is exemplary of the subject
matter on appeal.
5. An electronic circuit comprising:
a first pass-gate with a first voltage-controlled switch and
a second pass-gate with a second voltage-controlled switch,
wherein;
the first pass-gate has a first input node and a first output
node;
the first voltage-controlled switch has a first passageway,
arranged between the first input node and the first output node,
and a first control electrode;
the second pass-gate has a second input node and a
second output node;
the second voltage-controlled switch has a second
passageway, arranged between the second input node and the
second output node, and a second control electrode;
the first control electrode and the second control
electrode are coupled to a control node;
the first pass-gate is operative to selectively open and
close the first passageway to a first signal at the first input node
under control of a control-voltage at the control node;
the second pass-gate is operative to selectively open and
close the second passageway to a second signal at the second
input node under control of the control-voltage at the control
node;
wherein the electronic circuit has a controller, that
includes a voltage level-shifter, configured to control a first
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Application 13/315,849
voltage at the first control electrode to substantially follow a
second voltage at a particular one of the first input node and the
first output node when the first passageway is open and to
control a third voltage at the second control electrode to
substantially follow a fourth voltage at a specific one of the
second input node and the second output node when the second
passageway 1s open.
REFERENCES and REJECTIONS
The Examiner rejected claims 5 and 6 under 35 U.S.C. § 102(b) as
anticipated by Nakahara (US 2009/0108911 Al; pub. Apr. 30, 2009).
ANALYSIS
The Examiner finds Nakahara teaches an electronic circuit having a
controller as recited in claim 5. Specifically, the Examiner finds capacitor
Cl in Nakahara operates as a controller that controls a first voltage-the
gate voltage V g of pass-gate Ml-to substantially follow a second
voltage-the IN voltage at node Pl as shown in Nakahara's Figure 2 where
"gate-to-source voltage V gs across Cl follows IN substantially after an
initial setting time as shown in the latter half of the V gs time diagram" (Ans.
3--4; Final Act. 3; Nakahara Figs. 2, 3).
Appellant contends Nakahara's capacitor Cl is not a controller as
claimed because C 1 "does not keep the difference between the first and
second voltages (i.e., the cited gate-source voltage of Ml) substantially
constant. Rather, as shown in FIG. 2, the cited gate-source voltage ...
varies significantly between 3.5 and 6 volts while the capacitor Cl is
charging" (App. Br. 5). Appellant's arguments do not address the
Examiner's specific findings regarding the portion ofNakahara's Vgs
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Application 13/315,849
diagram in Figure 2 that shows the gate voltage Vg of pass-gate Ml
substantially following the IN voltage at node Pl (Vs), as difference voltage
V gs is substantially constant. Furthermore, Appellant's claim does not
exclude an initial voltage setting time-as that shown in the first half of
Nakahara's Vgs diagram in Figure 2 where a difference voltage varies
between 3.5 and 6 volts-for the first voltage before it follows the second
voltage.
Appellant also contends Nakahara's capacitor Cl cannot be a
controller as in claim 5 because Cl is a single component, and Appellant's
Specification "uses the term 'controller' ... as including multiple circuits"
(App. Br. 5; Reply Br. 4). We are not persuaded of Examiner error. As the
Examiner finds, "the specification does not specifically define the controller
to have multiple circuits" (Ans. 3). Additionally, Appellant's Specification
describes an example of a single component controller (see Spec. 4:9--10
("The control means comprises a first resistor between the first control
electrode and the control node.")).
Appellant also contends, for the first time in the Reply Brief, that the
"Examiner's interpretation of the term voltage level shifter as corresponding
to a single capacitor is ... inconsistent with the understood meaning of a
voltage level shifter in the art, as evidenced by a number of patent
applications" (Reply Br. 4, citations omitted). The Reply Brief is not an
opportunity to make arguments that could have been made in the principal
brief on appeal to rebut the Examiner's rejections, but were not. Ex parte
Borden, 2010 WL 191083 at *2 (BPAI 2010) (informative); see also 37
CPR 41.41 (b )(2)(2012) "Any argument raised in the reply brief which was
not raised in the appeal brief, or is not responsive to an argument raised in
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Application 13/315,849
the examiner's answer, including any designated new ground of rejection,
will not be considered by the Board for purposes of the present appeal,
unless good cause is shown."
Appellant further alleges Nakahara does not teach a first signal at the
first input node and a second signal at the second input node as recited in
claim 5, because Nakahara's pass-gates Ml and M2 "are connected in series
and pass the same signal from input terminal (In) to output (Out)" (App. Br.
7). Thus, Appellant argues, "pass gates Ml and M2 [of Nakahara] do not
pass respective first and second signals" (id.).
The Examiner finds, and we agree, Nakahara's Figure 3 teaches a first
signal at node Pl and a second signal at node NI (Final Act. 2-3). Claim 5
does not exclude connecting the pass-gates in series such that a pass-gate
interposes between the first and second signals. Moreover, claim 5 does
"not require that the first and second signals associated with the claimed
pass-gates are different signals" (Ans. 5). Thus, Appellant's argument is not
commensurate with the scope of claim 5.
In light of the broad terms recited in claim 5 and the arguments
presented, Appellant has failed to clearly distinguish the claimed invention
over the prior art relied on by the Examiner. Therefore, we sustain the
Examiner's rejection of independent claim 5.
With respect to dependent claim 6, which claims first and second
resistors, the Examiner finds "the wiring connection between the gate g of
the transistor Ml in Fig. 3 of Nakahara and the intervening node between the
transistors Ml and M2 corresponds to the first resistor since the wiring
connection inherently has at least some resistance" (Ans. 4; Nakahara Fig.
3). Appellant contends the Examiner's interpretation of a resistor as a
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Application 13/315,849
wiring having marginal resistance is unreasonable because "it is inconsistent
with common usage of the term resistor in the field of electronic circuits, as
evidenced by Appellant's specification, the cited references of record, and
dictionary definitions" (Reply Br. 2). We agree and conclude the
Examiner's claim interpretation with respect to the recited first and second
resistors to be overly broad. The claim language, when properly construed
in view of the Appellant's disclosure, does not include a wiring of negligible
resistance being a resistor.
Absent findings that Nakahara teaches a first resistor connected
between a first control electrode and another node, and a second resistor
connected between a second control electrode and the other node as required
by claim 6, we do not sustain the rejection of dependent claim 6.
DECISION
The Examiner's decision rejecting claim 5 under 35 U.S.C. § 102 is
affirmed.
The Examiner's decision rejecting claim 6 under 35 U.S.C. § 102 is
reversed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED-IN-PART
kme
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