Ex Parte Dana et al

Board of Patent Appeals and Interferences

May 18, 2012

11129322 (B.P.A.I. May. 18, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________________

Ex parte STEPHANE DANA and JOSEPH BACH
____________________

Appeal 2010-002960
Application 11/129,322
Technology Center 2800
____________________

Before DEBRA K. STEPHENS, DAVID M. KOHUT, and
JOHNNY A. KUMAR, Administrative Patent Judges.

KUMAR, Administrative Patent Judge.

DECISION ON APPEAL

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SUMMARY
This is an appeal under 35 U.S.C. § 134 from the Examiner’s rejection
of claims 46-61. Claims 1-45 have been canceled. We have jurisdiction
under 35 U.S.C. § 6(b).
Claim 46 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Wu (US 5,668,056, Sep. 16, 1997) and Poultney
(US 5,474,647, Dec. 12, 1995).1
Claims 47-53 and 55-60 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over Wu, Poultney, and Ausschnitt (US 5,629,772, May
13, 1997).
Claim 54 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Wu, Poultney, and Phan (US 5,985,497, Nov. 16, 1999).
Claim 61 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over Wu, Poultney, and Hsia (US 5,701,013, Dec. 23, 1997).
We affirm.

STATEMENT OF THE CASE
Appellants’ invention relates to a method of manufacturing
semiconductor wafers using a photolithographic track system. Spec. 13,
ll. 3-5. Independent claim 46, reproduced below with key disputed
limitations emphasized, is illustrative of the claimed subject matter:
46. A method of manufacturing semiconductor wafers
using a photolithographic track system, comprising the steps of:
a) loading the semiconductor wafers onto the
photolithographic track;

1 Appellants initially misstated the rejections (App. Br. 4), however, they
corrected them in their Reply Brief (Reply Br. 2).
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b) moving the semiconductor wafers to a plurality of
photolithographic stations that perform specified tasks on the
semiconductor wafers;
c) conducting metrology inspection of patterns on the
semiconductor wafers in-track, using a tool for metrology
inspection situated on said photolithographic track system;
d) based on the results of the metrology inspection,
conducting real-time feedback process control to determine
whether the patterns on the semiconductor wafers are within a
predetermined tolerance range, including causing the track to
move the semiconductor wafers to a selected station based on
whether the semiconductor wafers are within the predetermined
tolerance range; and
e) based on the results of the real-time feedback process
control, performing corrective action process control to adjust
parameters of selected stations in order to realize the
predetermined tolerance range for the patterns on the
semiconductor;
wherein the metrology inspection of step (c) is conducted
on a wafer to wafer basis and without removing said wafers
from said photolithographic track system.

THE OBVIOUSNESS REJECTION FOR CLAIM 46
The Examiner finds that Wu and Poultney together would make
representative claim 46 obvious to a person of ordinary skill in that art. Ans.
2-4. In particular, the Examiner finds the combination of Wu and Poultney
teaches all the limitations of claim 46 except: (1) “based on the results of the
metrology inspection, conducting real-time feedback process control;” and
(2) “based on the results of the real-time feedback process control,
performing corrective action process control to adjust parameters of selected
stations in order to realize the predetermined tolerance range for the patterns
on the semiconductor. ” Ans. 8-10.
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The Appellants’ dispute in this case boils down to whether the cited
art discloses the following limitations of claim 46: (1) “using a tool for
metrology inspection situated on said photolithographic track system”
(Reply. Br. 3); (2) “conducting real-time feedback process control” (Reply.
Br. 3-4); and (3) “causing the track to move the semiconductor wafers to a
selected station based on whether the semiconductor wafers are within the
predetermined tolerance range” (Reply Br. 4).

ISSUE
Under § 103, has the Examiner erred in rejecting claim 46 by finding
that Wu and Poultney collectively would have taught or suggested the
following steps: (1) using a tool for metrology inspection that situated on the
photolithographic track system; (2) conducting real-time feedback process
control; and (3) causing the track to move the semiconductor wafers to a
selected station based on whether the semiconductor wafers are within the
predetermined tolerance range?

ANALYSIS
Claim 46
First, the Examiner finds that a combination of Wu and Poultney
teaches the limitation “using a tool for metrology inspection that situated on
the photolithographic track system.” (Supp. Ans. 1; Ans. 7-8). Specifically,
the Examiner finds that Wu teaches nine processing stations connected to a
common track with tracks 142 connecting a plurality of processing stations
20 where one processing station 20 is designated an inspection processing
station. (Supp. Ans. 1). The Examiner equates Poultney’s metrology
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instrument 96 to the claimed tool for metrology inspection in the track
system. (Ans. 3). Appellants state, without providing sufficient evidence or
explanation, that the proposed combination of Wu and Poultney only teaches
“each tracked area is associated with a separate processing function and,
hence, the inspection stations in Wu's system are not situated on the
photolithographic track system.” (Reply Br. 3).2
We are not persuaded by Appellants’ argument. We agree with the
Examiner’s finding that Figure 13 of Wu discloses working stations 20 that
include inspection machines. (Ans. 7) (citing Wu, col. 5, ll. 32-58).
The Examiner’s proposed combination of Wu and Poultney is
reasonable and has a rational underpinning. While Appellants’ proposed
reading may accurately describe one possible result of the cited references,
we see no reason that one of ordinary skill in the art, with all the knowledge
and creativity associated with such hypothetical person, would find the
teaching of the combination to be so limited. See Standard Oil Co. v. Am.
Cyanamid Co., 774 F.2d 448, 454 (Fed. Cir. 1985) (“The issue of
obviousness is determined entirely with reference to a hypothetical ‘person
having ordinary skill in the art.’ It is only that hypothetical person who is
presumed to be aware of all the pertinent prior art.”); see also, KSR Int’l Co.
v. Teleflex Inc., 550 U.S. 398, 421 (2007) (“A person of ordinary skill is also
a person of ordinary creativity, not an automaton.”).

2 Appellants argue for the first time in the Reply Br. that the inspection
stations in Wu's system are not situated on the photolithographic track
system. See Reply Br. 3. Arguments raised for the first time in the Reply
Brief that could have been raised in the Opening Brief are waived, absent a
showing of good cause. See Optivus Technology, Inc. v. Ion Beam
Applications S.A., 469 F.3d 978, 989 (Fed. Cir. 2006).

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Second, the Examiner finds that a person of ordinary skill in the art
would find obvious the limitation “conducting real-time feedback process
control” based on the teachings of Poultney. (Ans. 3). Specifically, the
Examiner equates Poultney’s disclosure of a “master controller” for
“comparison and feedback control” provides real time control. (Ans. 9 ).
Based on these teachings, the Examiner reasonably finds that the disputed
limitation of conducting real-time feedback process control would have been
obvious to one of skill in the art. (Supp. Ans. 2; Ans. 8-9). Appellants do
not address the Examiner’s findings and conclusions that one of ordinary
skill in the art would find that limitation obvious based on Poultney’s
teachings. We therefore are not persuaded by Appellants’ argument.
Third, the Examiner finds that a person of ordinary skill in the art
would find the limitation “causing the track to move the semiconductor
wafers to a selected station based on whether the semiconductor wafers are
within the predetermined tolerance range” obvious based on the teachings of
Wu and Poultney. (Ans. 9). Specifically, the Examiner reasonably finds that
Wu teaches the use of a computer system for monitoring processing data and
performing process control among the plurality of processing stations in a
photolithographic area, including moving the wafer to a designated
processing station, and Poultney provides the real-time corrective actions.
(Supp. Ans. 1-2; Ans. 3).
Appellants make the unsupported assertion that “Wu discusses a
scheme for tracking the progress of a wafer through various processing
stations, while claim 46 is directed to controlling the sequence of such
processing based on real time feedback of an inspection of the wafers.”
(Reply Brief 4). Again, Appellants do not provide sufficient evidence or
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argument as to why one of ordinary skill in the art would be limited to this
narrow interpretation of the teachings of the cited references given the
knowledge attributable to a person of ordinary skill. The Examiner’s
proposed combination is reasonable with some rational underpinning and we
are not persuaded that the teachings of Wu and Poultney are limited to
Appellants’ proposed characterization.
For the foregoing reasons, we sustain the Examiner’s rejection of
representative claim 46.

Claims 47-53 and 55-60
Appellants argue that claims 47-53 and 55-60 are patentable for the
additional reason that Ausschnitt does not disclose “the metrology tool
measures critical dimensions on the semiconductor wafers” because
“Ausschnitt's disclosure of photolithography is irrelevant to the Poultney's
disclosure.” (App. Br. 13). Again, the Examiner’s findings and conclusions,
which we find reasonable, is that the disclosures of Ausschnitt combined
with the teachings of Wu and Poultney would make the disputed limitation
obvious. See Ans. 7. Thus, we also sustain the rejection of claims 47-53, and
55-60.

Claim 54
Appellants argue that claim 54 is patentable for the additional reason
that the combination of Wu, Poultney, and Phan fails to disclose “reference
profiles are correlated to CD values generated using CD- SEM metrology
tool” because “Poultney never teaches or suggests measuring CD, and
Ausschnitt teaches not to measure the CD of the feature, but rather to
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measure dimensions of a test pattern and correlate that measurement to the
CD of the feature.” (App. Br. 16). The Examiner finds and we agree that
Phan teaches “the use of a SEM CD to perform resist profile comparison, an
electrical defect monitor short-loop test, and a photo defect monitor trend
chart comparison between two processes.” (Ans. 5 (citing Phan col. 8, ll. 45-
55)). The Examiner also points out that it would have been obvious to one
of ordinary skill to combine Wu and Poultney to use the CD-SEM of Phan to
enable rapid verification of the corrective action thereby providing a system
for reducing defects in a photolithography manufacturing process. (Ans. 5).
Appellants do not address why a person of skill in the art with the associated
knowledge would not find this limitation obvious in light of Wu, Poultney,
and Phan. We agree with the Examiner and thus sustain the rejection of
claim 54.

Claim 61
Appellants also assert that the combination of Wu, Poultney, and Hsia
fails to disclose “incorporat[ing] onto the photolithography track an AFM
for measuring CD and/or overlay (or any other CD and/or overlay
monitoring tool . . . ).” (App. Br. 18). The Examiner repeats the conclusion
that it would have been obvious to one of ordinary skill to combine Wu and
Poultney to use the AFM method of Hsia to determine wafer overlay and
critical dimension disposition while simultaneously reducing the need to
perform multiple measurements at each testing step. (Ans. 8-9). We agree
with the Examiner and thus sustain the rejection of claim 61.

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DECISION
The Examiner’s decision rejecting claims 46-61 (as listed in the
Summary above) is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

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