Ex Parte Cochran et al

Patent Trial and Appeal Board

Aug 19, 2016

11045230 (P.T.A.B. Aug. 19, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
111045,230 01127/2005 Robert A. Cochran
56436 7590 08/23/2016
Hewlett Packard Enterprise
3404 E. Harmony Road
Mail Stop 79
Fort Collins, CO 80528
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
82204325 9901
EXAMINER
SU, SARAH
ART UNIT PAPER NUMBER
2431
NOTIFICATION DATE DELIVERY MODE
08/23/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
hpe.ip.mail@hpe.com
mkraft@hpe.com
chris.mania@hpe.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte ROBERT A. COCHRAN and JAY J. SCHULTZ
Appeal2015-005525 1
Application 11/045,230
Technology Center 2400
Before JEAN R. HOMERE, JASON V. MORGAN, and
MICHAEL J. STRAUSS, Administrative Patent Judges.
HOMERE, Administrative Patent Judge.
DECISION ON APPEAL
1 The real party in interest is Hewlett-Packard Development Company, LP.
App. Br. 2. The present appeal is related to an earlier appeal (2011-007656,
decided December 16, 2013) in which we affirmed the Examiner's rejections
of claims 1-7, and 14--23. Dec. 8 (Dec. 16, 2013). Appellants did not
identify the earlier appeal as being related. App. Br. 2. Appellants are
reminded that they have a duty to identify:
all other prior and pending appeals, interferences, trials before the
Board, or judicial proceedings ... [that] involve an application or
patent owned by the appellant or assignee, are known to appellant, the
appellant's legal representative, or assignee, and may be related to,
directly affect or be directly affected by or have a bearing on the
Board's decision in the pending appeal.
37 C.F.R. § 31.4l(c)(ii) (2014).
Appeal2015-005525
Application 11/045,230
STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134(a) from the Examiner's
Final Rejection of claims 1-7 and 14--23. Claims 8-13 have been
withdrawn from consideration. App. Br. 2. We have jurisdiction under 35
U.S.C. § 6(b).
We affirm.
Appellants' Invention
Appellants' invention relates to a method and system (100) for
securely storing sensitive and confidential data in logical units (LUN) of a
disk array (102), each LUN designated as encryption-enabled or encryption-
disabled. Fig. IA, IB, Spec. i-fi-15, 36. In particular, upon receiving data
from a plurality of channel host adapters (106), the encryption/decryption
processor (104) encrypts the received data, and subsequently stores it in an
encryption-enabled LUN. Alternatively, the encryption/decryption
processor (104) stores unencrypted data in an encryption disabled LUN.
Spec. i-fi-127-30. The encryption/decryption processor is also capable of
facilitating a change in designation of the LUN from encryption-enabled to
encryption-disabled, and vice versa. Id. at i-f 14.
Illustrative Claim
Independent claim 1 further illustrates the invention as follows:
1. A disk array comprising:
a plurality of channel host adapters to communicate data
among multiple host systems;
an array of storage disks comprising logical units, wherein
a first plurality of the logical units is designated as encryption-
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Appeal2015-005525
Application 11/045,230
enabled, and a second plurality of the logical units is designated
as encryption-disabled;
a plurality of disk controllers coupled to the array of
storage disks; and
an encryption/ decryption processor to perform data
encryption operations on data received from the plurality of
channel host adapters and stored to the disk array to the first
plurality of logical units, and perform decryption operations on
data read from the disk array from the first plurality of logical
units, wherein the encryption/decryption processor to facilitate a
change in designation of a logical unit of the first plurality of the
logical units from encryption-enabled to encryption-disabled.
Re} ections on Appeal2
1. Claims 1---6 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Hamlin (US 7,003,674 Bl; pub.
Feb.21, 2006), Zimmerman (US 2006/0053308 Al; pub. Mar. 9, 2006),
Obara (US 2003/0037247 Al; pub. Feb. 20, 2003), and Nguyen (US 2003/
0079138 Al; pub. Apr. 24, 2003).
2. Claims 7, 14--17, and 19-23 stand rejected under 35 U.S.C. § 103(a)
as being unpatentable over the combination of Hamlin, Obara, and Nguyen.
2 Although the Final Action contains a statement indicating that the "means
for communicating data" and the "means for encrypting and decrypting"
recited in claim 21 are not being treated in accordance with 35 U.S.C.
112(±), "because the claimed functions are modified by structure that
performs the functions," the Examiner has not made a rejection against the
cited claim. Final Act. 6. Consequently, we do not have jurisdiction over
the Examiner's comments, and do not reach the merits thereof. Likewise, we
do not reach the merits of the Examiner's objection to claim 21. Id. at 5.
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Application 11/045,230
3. Claim 18 stands rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Hamlin, Obara, Nguyen, and
Zimmerman.
ANALYSIS
We consider Appellants' arguments seriatim as they are presented in
the Appeal Brief, pages 6-22 and Reply Brief, pages 1-5.3
Appellants argue that the proposed combination of Hamlin,
Zimmerman, Obara, and Nguyen does not render claim 1 unpatentable. App.
Br. 10-15, Reply Br. 2-3.
First, Appellants argue that Nguyen does not teach or suggest an
encryption/ decryption processor to facilitate a change in designation of a
logical unit from encryption-enabled to encryption-disabled, as recited in
claim 1. App. Br. 10-12, Reply Br. 2. According to Appellants, Nguyen's
disclosure of enabling security features by encrypting content in a CMOS
device does not teach or suggest a region being encryption-enabled or
encryption-disabled, let alone changing the designation of a LUN from one
encryption-enabled to encryption-disabled. Id. (citing Nguyen i-f 37). This
argument is not persuasive.
As correctly noted by the Examiner, Nguyen discloses a mechanism
for enabling and disabling encryption of regions in a CMOS. Ans. 31-32
3 Rather than reiterate the arguments of Appellants and the Examiner's
findings and conclusions, we refer to the Appeal Brief (filed December 9,
2014), the Reply Brief (filed May 12, 2015), Final Action (mailed
September 5, 2014), and the Answer (mailed March 12, 2015) for their
respective details. We have considered in this Decision only those
arguments Appellants actually raised in the Briefs. Any other arguments
Appellants could have made but chose not to make in the Briefs are waived.
See 37 C.F.R. § 41.37(c)(l)(iv) (2014).
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Appeal2015-005525
Application 11/045,230
(citing Nguyen if 37, Fig. 5, item 514). We therefore agree with the
Examiner that one of ordinary skill would readily appreciate enabling
encryption in a CMOS region teaches or suggests designating said region as
being encryption-enabled. Likewise, disabling encryption in the CMOS
region teaches or suggests the region being encryption disabled. Similarly,
we agree with the Examiner that an authorized individual would be able to
use the mechanism disclosed in Nguyen to switch the status of a CMOS
region from encryption-enabled to encryption-disabled, and vice versa. Id.
Second, Appellants argue Obara does not teach or suggest an
encryption/ decryption processor that performs encryption operations on data
received from a plurality of channel host adapters. App. Br. 12. According
to Appellants, even if Obara' s director were construed as a channel host
adapter, Obara's encryption processor would receive data to be encrypted
from a single host adapter, and not a plurality of host adapters as required by
the claim. Id. 12-13. This argument is not persuasive.
Appellants' argument fails to rebut the specific findings made by the
Examiner in the rejection. In particular, the Examiner relies upon Obara's
host interfaces to teach the channel host adapters. Ans. 5, 32 (citing Obara
Figs. 2, 4). Further, the Examiner relies upon Zimmerman's disclosure of a
data encrypter that encrypts data from multiple locations to teach the
claimed encryption/decryption processor. Id. (citing Zimmerman if 24). In
contrast, Appellants' arguments are limited to challenges against Obara
individually, as opposed to the combination of Obara with Zimmerman
proffered by the Examiner to teach the disputed limitations. 4
4 One cannot show non-obviousness by attacking the references
individually where the rejections are based on combinations of references.
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Application 11/045,230
Third, Appellants argue there is no compelling reason to incorporate
the channel host adapters into the Hamlin disk drive, which is amenable to
receiving data from a single drive, and not plurality of drives in a disk array.
App. Br. 13. This argument is not persuasive.
As correctly noted by the Examiner, Appellants' argument is an
individual attack against Hamlin, as opposed to an argument rebutting the
asserted combination of Hamlin with Zimmerman, Obara, and Nguyen.
Ans. 32-33 (citing In re Keller). As further noted by the Examiner, Hamlin
discloses a plurality of interconnected disk drives, each including a public
area for storing plaintext, and a pristine area for storing encrypted data. Id. at
33 (citing Hamlin 2:49-52). We agree with the Examiner that Obara's
teaching of using multiple channel hosts in a communication with a disk
drive is a sufficient rationale for modifying Hamlin's disk drives to be used
in a setting with a plurality of host channel adapters. Id. We are thus
satisfied that Hamlin, Obara, Nguyen and Zimmerman disclose prior art
elements that perform their ordinary functions to predictably result in a
system having a processor for encrypting/decrypting data received from
channel host adapters, and for subsequently storing encrypted or
unencrypted data in encryption-enabled/disabled LUNs within a disk array.
See KSR Int'! Co. v. Teleflex, Inc., 550 U.S. 398, 416 (2007). Consequently,
the proffered combination is proper. It therefore follows that Appellants
have not shown error in the Examiner's obviousness rejection of claim 1.
In re Merck & Co., 800 F.2d 1091, 1097 (Fed. Cir. 1986). See also In re
Keller, 642 F.2d 413, 425 (CCPA 1981).
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Application 11/045,230
Regarding the rejection of claim 2, Appellants argue although Obara
discloses a cache, an encryption processor, and a plurality of disk interfaces,
the encryption processor is disposed between a single host and a plurality of
disk interfaces, and not between the cache and a plurality of host interfaces,
as required by the claim. App. Br. 15, Reply Br. 3. This argument is not
persuasive. Obara discloses an encryption processor (21) integrated in each
of the host interfaces (2), wherein the encryption processor communicates
via a bus (6) with a cache memory (3) and the remaining host interfaces.
Obara Figs. 1 and 5. Because the encryption processor serves to
communicate information between the cache and the host interfaces, we
agree with the Examiner that Obara's disclosure teaches or suggests the
disputed limitations of claim 2. Ans. 34--35.
Regarding the rejection of claims 3-7 and 14--23, Appellants have
either not presented separate patentability arguments or have reiterated
substantially the same arguments as those previously discussed for
patentability of claims 1 and 2 above such that claims 3-7 and 14--23 fall
therewith. See 37 C.F.R. § 41.37(c)(l)(iv) (2014).
DECISION
We affirm the Examiner's obviousness rejections of claims 1-7 and
14--23.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED
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