Ex Parte Choi et al

Board of Patent Appeals and Interferences

Apr 29, 2010

10874011 (B.P.A.I. Apr. 29, 2010)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte BYUNG-GIL CHOI and CHOONG-KEUN KWAK
____________

Appeal 2009-002194
Application 10/874,011
Technology Center 2800
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Decided: May 3, 2010
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Before JOSEPH F. RUGGIERO, MARC S. HOFF, and
KARL D. EASTHOM, Administrative Patent Judges.

RUGGIERO, Administrative Patent Judge.

DECISION ON APPEAL
Appeal 2009-002194
Application 10/874,011

2
STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134 from the Final Rejection of
claims 1-16, 18, 20, and 22-25, which are all of the pending claims. Claims
17, 19, and 21 have been cancelled. We have jurisdiction under 35 U.S.C. §
6(b).
We reverse and enter a new grounds of rejection pursuant to 37 C.F.R.
§ 41.50(b).
Rather than reiterate the arguments of Appellants and the Examiner,
reference is made to the Appeal Brief (filed August 23, 2007), the Answer
(mailed November 28, 2007), and the Reply Brief (filed January 28, 2008)
for the respective details. Only those arguments actually made by
Appellants have been considered in this decision. Arguments which
Appellants could have made but chose not to make in the Briefs have not
been considered and are deemed to be waived. See 37 C.F.R. §
41.37(c)(1)(vii).
Appellants’ Invention
Appellants’ invention relates to a local column decoder circuit and an
associated method for connecting data lines with bit lines in a semiconductor
memory device. The decoder circuit includes a plurality of gate circuits for
combining first and second decoding signals for selecting, respectively, a bit
line and a column group. A switching control signal is output from the
decoder circuit for selecting a bit line of a corresponding column group.
(See generally Spec. 5:2-14).
Claim 1 is illustrative of the invention and reads as follows:
1. A local column decoder, comprising:
a first plurality of gate circuits, each for combining a first decoding
signal among a first plurality of first decoding signals, which are each for
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selecting a column group among a first plurality of column groups, with a
second plurality of second decoding signals, which are each for selecting a
third plurality of bit lines per column group, and outputting a second
plurality of switching control signals, which are each for selecting a third
plurality of bit lines of the selected column group; and
a first plurality of bit line selectors, each for directly connecting the
selected third plurality of bit lines of a selected column group with a
corresponding third plurality of data lines, respectively, in response to the
second plurality of switching control signals outputted from the first
plurality of gate circuits,
wherein the total number of bit lines per column group is a fourth
plurality equal to the number of the second plurality multiplied by the
number of the third plurality.

The Examiner’s Rejection
The Examiner’s Answer cites the following prior art references:
Hatta US 5,255,228 Oct. 19, 1993
Hidaka US 6,421,294 B2 Jul. 16, 2002
Claims 1-16, 18, 20, and 22-25, all of the pending claims, stand
rejected under 35 U.S.C. § 103(a) as being unpatentable over Hatta in view
of Hidaka.

ISSUE
The pivotal issue before us is whether the language “second plurality”
and “third plurality” in the concluding “wherein” clauses of independent
claims 1, 6, and 12 is sufficiently definite such that those skilled in the art
would understand what is being claimed when the claims are read in light of
the Specification.

Appeal 2009-002194
Application 10/874,011

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FINDINGS OF FACT
The record supports the following relevant findings of fact (FF) by a
preponderance of the evidence:
1. Appellants’ invention relates to a local column decoder that
includes a plurality of gate circuits 301-30n including NOR gates 50, 52, 54,
and 56, which output a plurality of switching control signals Y0-Y3. (Fig. 3;
Spec. 6:13-16, 8:24-25).
2. A decoding signal, from a plurality of decoding signals YB0-
YBn, is applied as a first input to the plurality of gate circuits 301-30n for
selecting a column group. The first input is combined with a further
plurality of decoding signals YA0-YA3 for selecting a plurality of bit lines
per column group to output a plurality of switching signals to select a
plurality of bit lines of a selected column group. (Fig. 3; Spec. 8:15–9:11).
3. Further included in Appellants’ described local column decoder
are bit line selectors 401, which directly connect the bit lines of a selected
column group with a corresponding plurality of data lines in response to the
plurality of switching control signals Y0-Y3. (Fig. 3; Spec. 6:21-24, 8:7-9).

PRINCIPLES OF LAW
The general rule is that a claim must set out and circumscribe a
particular area with a reasonable degree of precision and particularity when
read in light of the disclosure as it would be by the artisan. In re Moore, 439
F.2d 1232, 1235 (CCPA 1971). Acceptability of the claim language
depends on whether one of ordinary skill in the art would understand what is
claimed in light of the specification. Seattle Box Co. v. Indus. Crating &
Packing, Inc., 731 F.2d 818, 826 (Fed. Cir. 1984); see also Metabolite Labs.,
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Inc. v. Lab. Corp. of Am. Holdings, 370 F.3d 1354, 1366 (Fed. Cir. 2004)
(“The requirement to ‘distinctly’ claim means that the claim must have a
meaning discernible to one of ordinary skill in the art when construed
according to correct principles. Only when a claim remains insolubly
ambiguous without a discernible meaning after all reasonable attempts at
construction must a court declare it indefinite.” (citations omitted)).
During prosecution, claims need not be “insolubly ambiguous” to be
considered indefinite under 35 U.S.C. § 112, second paragraph. Instead,
claims that are amenable to two or more plausible claim constructions may
be considered indefinite, as follows:
[W]e employ a lower threshold of ambiguity when reviewing a
pending claim for indefiniteness than those used by post-
issuance reviewing courts. In particular, rather than requiring
that the claims are insolubly ambiguous, we hold that if a claim
is amenable to two or more plausible claim constructions, the
USPTO is justified in requiring the applicant to more precisely
define the metes and bounds of the claimed invention by
holding the claim unpatentable under 35 U.S.C. § 112, second
paragraph, as indefinite.
Ex parte Miyazaki, 89 USPQ2d 1207, 1211 (BPAI 2008) (precedential).

THE EXAMINER’S 35 U.S.C. § 103(a) REJECTION
In view of the new ground of rejection entered below against claims
1-16, 18, 20, and 22-25 under 35 U.S.C. § 112, second paragraph, for
indefiniteness, we are hereby reversing the Examiner’s prior-art rejection of
those claims. In re Steele, 305 F.2d 859, 862-63 (CCPA 1962) (reversing
§ 103 rejection because based on considerable speculation as to meaning of
terms of claims and assumptions as to their scope). We will not speculate as
to the scope of the appealed claims and as such can not determine whether
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the combination of the references teaches the claimed features. It should be
understood, however, that our decision in this regard is based solely on the
indefiniteness of the claimed subject matter and does not reflect on the
adequacy of the prior art evidence applied in support of the rejections.

NEW GROUNDS OF REJECTION
35 U.S.C. § 112, SECOND PARAGRAPH
Pursuant to our authority under 37 C.F.R. § 41.50(b), we enter a new
grounds of rejection under 35 U.S.C. § 112, second paragraph, of appealed
claims 1-16, 18, 20, and 22-25. From our review of independent claims 1, 6,
and 12 and their corresponding dependent claims 2-5, 7-11, 13-16, 18, 20,
and 22-25, we find that independent claims 1, 6, and 12 do not particularly
point out and distinctly claim Appellants’ invention.
In particular, from our review of the “wherein” clause which
concludes each of the independent claims 1, 6, and 12, we are unable to
determine the metes and bounds of these claims. The language of the
“wherein” clause sets forth that the number of bit lines per column group is a
fourth plurality which is “equal to the number of the second plurality
multiplied by the number of the third plurality.” The terminology “second
plurality,” however, is used earlier in each of claims 1, 6, and 12 to refer to
two different elements, i.e., “second plurality of second decoding signals”
and also “second plurality of switching control signals.” Similarly, the
terminology “third plurality” is also used earlier in the claims to refer to two
different elements, i.e., “third plurality of bit lines per column group” and
also “third plurality of bit lines of the selected column group.”
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From a review of the description of the exemplary Figure 3
embodiment beginning at page 6 of Appellants’ Specification (FF 2-3), it is
impossible to determine which of the previously recited elements in
independent claims 1, 6, and 12 identified by the terminology “second
plurality” and “third plurality” is being referenced by the use of the same
terminology in the concluding “wherein” clause. To add to the ambiguity
and lack of clarity, it is also unclear from Appellants’ Specification whether
the “second plurality” and “third plurality” language of the “wherein” clause
is possibly intended to refer to both of the previously recited “second
plurality” and “third plurality” of claim elements. As such, we find it
impossible to make a meaningful review of the Examiner’s application of
prior art against the appealed claims. Since the language of independent
claims 1, 6, and 12 is amenable to two or more plausible claim
constructions, we are constrained to hold the appealed claims indefinite
under the second paragraph of 35 U.S.C. § 112. See Miyazaki, 89 USPQ2d
at 1211.

CONCLUSION
In view of the foregoing, we reverse the Examiner’s 35 U.S.C.
§ 103(a) rejection of claims 1-16, 18, 20, and 22-25. A new rejection of
claims 1-16, 18, 20, and 22-25 under 35 U.S.C. § 112, second paragraph, is
entered pursuant to 37 C.F.R. § 41.50(b). 37 C.F.R. § 41.50(b) provides [a]
new ground of rejection pursuant to this paragraph shall not be considered
final for judicial review.

Appeal 2009-002194
Application 10/874,011

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APPELLANTS’ OPTIONS FOR RESPONDING TO
THE NEW GROUNDS OF REJECTION
Regarding the new grounds of rejection entered pursuant to 37 C.F.R.
§ 41.50(b), that paragraph explains that “[a] new ground of rejection
pursuant to this paragraph shall not be considered final for judicial review.”
Appellants, within TWO MONTHS from the date of this decision, must
exercise one of the following two options with respect to the new grounds of
rejection to avoid termination of the appeal as to the rejected claims:
(1) Reopen prosecution. Submit an appropriate
amendment of the claims so rejected or new evidence relating
to the claims so rejected, or both, and have the matter
reconsidered by the examiner, in which event the proceeding
will be remanded to the examiner . . . .
(2) Request rehearing. Request that the proceeding be
reheard under § 41.52 by the Board upon the same record.
37 C.F.R. § 41.50(b) (2008).
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).

REVERSED; 37 C.F.R. § 41.50(b)

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