Ex Parte Cho

Patent Trial and Appeal Board

Oct 17, 2017

13178305 (P.T.A.B. Oct. 17, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/178,305 07/07/2011 Chang-Hun Cho 590387.416 8128
142402 7590 10/19/2017
S»eeH TP T aw fTmiin T T P anH T C\ Oisnlav Pn T tH EXAMINER
701 Fifth Avenue Suite 5400
SEATTLE, WA 98104
PARK, SANGHYUK
ART UNIT PAPER NUMBER
2691
NOTIFICATION DATE DELIVERY MODE
10/19/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
patentinfo @ seedip. com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte CHANG-HUN CHO
Appeal 2016-002042
Application 13/178,305
Technology Center 2600
Before CAROLYN D. THOMAS, LINZY T. McCARTNEY, and
ADAM J. PYONIN, Administrative Patent Judges.
THOMAS, Administrative Patent Judge.
DECISION ON APPEAL
Appellant seeks our review under 35 U.S.C. § 134(a) from the
Examiner twice rejecting claims 1—5, all the pending claims in the present
application. See App. Br., Claims Appendix. We have jurisdiction over the
appeal under 35 U.S.C. § 6(b). An Oral Hearing was held on September 19,
2017. Any new arguments offered by Appellant’s representative at the Oral
Hearing in support of patentability, not in the record prior to oral hearing,
have not been considered because they are untimely. Accordingly, we do
not consider any new arguments raised during the Oral Hearing for purpose
of deciding this appeal. See 37 C.F.R. § 41.47(e) (new arguments may not
Appeal 2016-002042
Application 13/178,305
be presented at the Oral Hearing, except under circumstances not alleged to
be present here).
We REVERSE.
The present invention relates generally to a 6bit/8bit gamma common
driving circuit. See Abstract.
Claims 1 and 5 are illustrative:
1. A 6bit/8bit gamma common driving circuit comprising:
a gamma selection unit having an 8bit receiving terminal
that receives a 6bit or 8bit digital data, and the gamma selection unit
by passing the 8bit data received at the receiving terminal, or adding
“00” to least significant two bits of the 6bit data received at the
receiving terminal to change the 6bit data to an 8bit data and forward
the 8bit data, according to an external bit selection BSEL signal
having a high level and a low level and indicating the 6bit or 8bit
digital data based on the high level or the low level of the bit selection
BSEL signal;
a summing unit that sums either most significant 6bit
data of the 8bit data from the gamma selection unit and forwards a
carry signal “0” or “1”, or sums the 8bit data from the gamma
selection unit and forwards a carry signal “0” or “1”,according to the
bit selection BSEL signal; and
a digital-to-analog converter that forwards an analog
signal corresponding to a R-string relevant to the data from the
gamma selection unit if the carry signal from the summing unit is “0”,
or forwards an analog signal corresponding to R255 of the R-string if
the carry signal from the summing unit is “1”.
5. A method for common driving of a 6bit/8bit gamma
comprising the steps of:
setting a bit selection BSEL signal varying with whether
it is an 8 bit image signal processing mode or a 6 bit image signal
processing mode, wherein the bit selection BSEL signal has a high
level and a low level and indicates the 6bit image signal processing
mode or the 8bit image signal processing mode based on the high
level or the low level of the bit selection BSEL signal;
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Appeal 2016-002042
Application 13/178,305
selecting an R-string relevant to a received image data
and forwarding an analog signal corresponding to the selected R-
string if the bit selection BSEL signal is set to be the 8bit image signal
processing mode;
adding “00” to least significant 2 bits of a received 6 bit
image data to change the 6 bit image data to an 8 bit image data,
selecting an R-string relevant to the 8 bit image data changed thus,
and forwarding an analog signal corresponding to the selected R-
string, if the bit selection BSEL signal is set to be the 6 bit image
signal processing mode; and
forwarding an analog signal corresponding to R255 of
the R-string if the received 6bit image data is “111111”.
Appellant appeals the following rejections:
Rl. Claims 1—4 are rejected under 35 U.S.C. § 103(a) as being
unpatentable over Lee (US 2005/0140629 Al, June 30, 2005), Kuo (US
2008/0122777 Al, May 29, 2008), and Hsu (US 2010/0289837 Al, Nov. 18,
2010);
R2. Claim 5 is rejected under 35 U.S.C. § 103(a) as being
unpatentable over Lee and Kuo.
We review the appealed rejections for error based upon the issues
identified by Appellant, and in light of the arguments and evidence produced
thereon. Ex parte Frye, 94 USPQ2d 1072, 1075 (BPAI 2010) (precedential).
ANALYSIS
Rejection under § 103(a)
Issue: Did the Examiner err in finding that Kuo teaches or suggests a
bit selection BSEL signal, as set forth in independent claims 1 and 5?
We have reviewed Appellant’s arguments in the Briefs, the
Examiner’s rejection, and the Examiner’s response to the Appellant’s
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Application 13/178,305
arguments. We concur with Appellant’s conclusion that the Examiner erred
in finding that the combination of the references, particularly Kuo, teaches
or suggests a bit selection BSEL signal, as set forth in independent claims 1
and 5.
Specifically, Appellant contends that in the claimed invention
“whether a 6bit image signal or [an] 8bit image signal is received by the
gamma selection unit is determined based on whether the bit selection BSEL
signal is a high level or a low level” (App. Br. 6) and in contrast, Kuo’s
“PRE controls output or no-output of a pre-charging data VC31” and “OPC
controls output or no-output of a driving voltage VL31” (id. at 7). In other
words, Appellant contends that the claimed invention uses two different
logic values, i.e., high and low, to select modes, whereas Kuo’s control
signals PRE and OPC are only outputted at high logic levels alternatively.
In essence, the Examiner agrees with Appellant that Kuo’s control
signals PRE and OPC, which are used to select different modes, are operated
only when PRE and OPC are alternately high (see Ans. 14). However, the
Examiner goes on to state that “[u]sing two different sets of circuits and two
different logic values in Kuo is consistent and fundamentally equivalent to
Appellant’s invention” (id. at 13). But we find that the Examiner’s
interpretation of Kuo’s “two different logic values” is distinguishable from
Appellant’s use of high and low logic levels.
For example, it appears that the Examiner’s interpretation of “two
different logic values” rests on Kuo’s disclosure of only “high” logic values
flowing from two different circuits (see Kuo’s Fig. 5), as opposed to a high
and a low logic level indicating a mode change. However, claim 5 requires
the bit selection BSEL signal to vary with the different modes. See App.
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Appeal 2016-002042
Application 13/178,305
Br., Claims Appendix (claim 5); see also id. at 14 (similar limitations in
claim 1). We find that Kuo’s usage of only a “high” logic to actually select
modes, fails to teach a selection signal that varies with different modes, or a
selection signal that has a high and low level for indicating modes. Given
that the Examiner concedes that the claims “require[] that the mode to vary .
. . and that the bit selection BSEL signal has a high and low level for
indicating one of the two modes” (see Ans. 12), we disagree with the
Examiner that Kuo’s teachings are fundamentally equivalent for at least the
reasons noted supra.
The Examiner has not found that any of the other references of record
teach the aforementioned feature. Since we agree with at least one of the
arguments advanced by Appellant, we need not reach the merits of
Appellant’s other arguments. Accordingly, we will not sustain the
Examiner’s obviousness rejections of claims 1—5.
DECISION
The decision of the Examiner to reject claims 1—5 is reversed.
REVERSED
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