Ex Parte Chen et al

Patent Trials and Appeals Board

Apr 5, 2019

13244429 - (D) (P.T.A.B. Apr. 5, 2019)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/244,429 09/24/2011
141828 7590
HEIMLICH LAW
5952 DIAL WAY
SAN JOSE, CA 95129
04/09/2019
FIRST NAMED INVENTOR
Y onggang Chen
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
IDT-P2786 8684
EXAMINER
CHEN, PATRICK C
ART UNIT PAPER NUMBER
2842
NOTIFICATION DATE DELIVERY MODE
04/09/2019 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
alanheimlich@heimlichlaw.com
sroberts@peloquinlaw.com
PTOL-90A (Rev. 04/07)
UNITED ST ATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte YONGGANG CHEN, SHRIRAM KULKARNI,
and PRASHANT SHAMARAO
Appeal 2017-009361
Application 13/244,429
Technology Center 2800
Before MAHSHID D. SAADAT, GEORGIANNA W. BRADEN, and
CHRIST AP. ZADO, Administrative Patent Judges.
SAADAT, Administrative Patent Judge.
DECISION ON APPEAL 1
Appellants 2 appeal under 3 5 U.S. C. § 134( a) from a final rejection of
claims 1-16. We have jurisdiction under 35 U.S.C. § 6(b).
We affrrm.
1 An Oral Hearing was held for this appeal on September 20, 2018.
2 According to Appellants, the real party in interest is Integrated Device
Technology, Inc. App. Br. 4.
Appeal 2017-009361
Application 13/244,429
STATEMENT OF THE CASE
Introduction
Appellants' disclosure describes "a transmission gate which has
reduced load capacitance and can be used in multi-Giga BPS while being
power efficient." Spec. ,r 4. According to Appellants, "at ON state the body
of a transistor is connected to the source through a high impedance" (see
Spec. ,r,r 17-19), whereas at OFF state, "[t]he gate and the body terminal
(body) are both biased by low impedance to AC ( alternating current)
ground" (see Spec. ,r 22).
Claim 1 is illustrative of the invention and reads as follows:
1. A method comprising:
switching at a first time a gate of an n-type field effect
transistor in a transmission gate from a ground potential to a
frrst high impedance wherein said frrst high impedance is
connected to a power supply not at said ground potential;
switching at substantially said frrst time a body of said n-
type field effect transistor in said transmission gate from said
ground potential to a second high impedance wherein said
second high impedance is connected directly only to a single
input of said transmission gate and not directly to an output of
said transmission gate, and wherein said n-type field effect
transistor body is not connected to said output; and
wherein said transmission gate has no transistors for
shorting said output of said transmission gate to said ground
potential.
The Examiner's Rejections
Claims 1-16 stand rejected under 35 U.S.C. § 112(a), or pre-AIA
35 U.S.C. § 112, frrst paragraph, as failing to comply with the written
description requirement and containing subject matter which was not
described in the specification in such a way as to reasonably convey to one
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skilled in the relevant art that the inventor( s ), at the time the application was
filed, had possession of the claimed invention. Final Act. 3-5.
Claims 1-16 stand rejected under 3 5 U.S. C. § 112(b ), or pre-AIA
35 U.S.C. § 112, second paragraph, as being indefinite. Final Act. 6-8.
Claims 1-16 stand rejected under 35 U.S.C. § 103(a) as unpatentable
over Guo (US 7,924,085 B2; iss. Apr. 12, 2011) and Miske (US 7,095,266
B2; iss. Aug. 22, 2006). Final Act. 9-20.
PRINCIPLES OF LAW
Written Description
The function of the written description requirement of the frrst
paragraph of 35 U.S. C. § 112 is to ensure that the inventor has possession, as
of the filing date of the application relied on, of the specific subject matter
later claimed by him. In re Wertheim, 541 F.2d257, 262 (CCPA 1976);
Vas-Cath, Inc. v. Mahurkar, 935 F.2d 1555, 1563 (Fed. Cir. 1991). In
establishing a basis for a rejection under the written description requirement
of the statute, the Examiner has the initial burden of presenting evidence or
reasons why persons skilled in the art would not recognize in an applicant's
disclosure a description of the invention defmed by the claims. Wertheim,
541 F.2dat 265.
Furthermore, as stated in Ari ad Pharmaceuticals, Inc. v. Eli Lilly and
Co., 598 F.3d 1336, 1351 (Fed. Cir. 2010) (en bane),
[T]he hallmark of written description is disclosure .... [T]he
specification from the perspective of a person of ordinary
skill in the art. Based on that inquiry, the specification must
describe an invention understandable to that skilled artisan
and show that the inventor actually invented the invention
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Application 13/244,429
claimed.
Indefiniteness
The general rule is that a claim must set out and circumscribe a
particular area with a reasonable degree of precision and particularity when
read in light of the disclosure as it would be by the artisan. In re Moore, 439
F.2d 1232, 1235 (CCPA 1971). A claim should be rejected as indefmite
when it is amenable to two or more plausible claim constructions. In re
Packard, 751 F.3d 1307, 1309-10 (Fed. Cir. 2014) (a pending claim is
indefmite if it "contains words or phrases whose meaning is unclear.").
Acceptability of the claim language depends on whether one of ordinary
skill in the art would understand what is claimed in light of the specification.
Seattle Box Co. v. Industrial Crating& Packing, Inc., 731 F.2d 818,826
(Fed. Cir. 1984). See also Metabolite Labs., Inc. v. Lab. Corp. of Am.
Holdings, 370 F.3d 1354, 1366 (Fed. Cir. 2004):
The requirement to "distinctly" claim means that the claim must
have a meaning discernible to one of ordinary skill in the art
when construed according to correct principles. Only when a
claim remains insolubly ambiguous without a discernible
meaning after all reasonable attempts at construction must a
court declare it indefmite. (Citations omitted).
ANALYSIS
Rejection under 35 USC§ 112,firstparagraph
The Examiner fmds the term "wherein said n-type field effect
transistor body is not connected to said output," as recited at line 8 of claim
1, contains new matter because it is neither explained in the Specification,
nor shown in the Drawings. Final Act. 3--4. The Examiner fmds "Fig. 4 and
paragraphs 0017-0019 show said n-type field effect transistor body is
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Application 13/244,429
connected to said output via Rb and a channel between drain and source of
said n-type field effecttransistor MN." Final Act. 4.
We disagree. "[T]he description requirement does not demand any
particular form of disclosure, or that the specification recite the claimed
invention in haec verba." AriadPharms., Inc. v. Eli Lilly & Co., 598 F.3d
1336, 1352(Fed. Cir. 2010)(en banc)(citation omitted). Rather, "the test
for sufficiency is whether the disclosure of the application relied upon
reasonably conveys to those skilled in the art that the inventor had
possession of the claimed subject matter as of the filing date." Ari ad, 598
F.3d at 1351.
Appellants argue, although the term "said n-type field effect transistor
body is not connected to said output," as recited in claim 1, is not stated
explicitly in the Specification, both original Figures 3 and 4 show VBN, or
the body voltage bias for NFET, is connected to the ground potential GND
or the input IN through a resistor. App. Br. 23-24. Appellants further argue
the GND or IN nodes are not the same as the output OUT. Id. Similarly,
with respect to claim 2, Appellants argue their Figures 3 and 4 show VBP, or
the body voltage bias of the p-type field effect transistor is connected to
power supply VDD, or through the resistor Rb to the input IN. App. Br. 25-
26. Appellants also state that the VDD or IN nodes are not the same as the
output OUT. Id.
The Examiner responds by presenting a rendering of Appellants'
Figure 4 as follows:
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Application 13/244,429
VOD
IN
GND
CJUT
Figure 4 with additional lines drawn by the Examiner. Ans. 3.
The Examiner further explains that:
However, the input IN is connected to output OUT via the
channel between drain and source of said n-type field effect
transistor MN. Similarly, the resistor is connected to output
OUT via the channel between drain and source of said n-type
field effect transistor MN. In fact, Fig. 4 clearly shows said n-
type field effect transistor body is connected to said output via a
Resistor (i.e. the second high impedance) and a channel
between drain and source of said n-type field effect transistor
MN (seethe right red line in the figure above).
Ans. 4. The Examiner then explains the connection of the p-type field effect
transistor body through resistor Rb, which is connected to the input IN,
which in tum, is "connected to output OUT via the channel between drain
and source of said p-type field effect transistor MP." Id.
Consistent with Appellants' arguments, we agree with Appellants that
the cited portions of Appellants' disclosure describes how the body of the n-
type FET or the body of the p-type FET are connected either to the ground
or supply voltage, or via a resistor to the input IN. As asserted by
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Application 13/244,429
Appellants, we fmd that the Specification and Figures 3 and 4 would
reasonably convey to a person of ordinary skill in the art that the body of the
recited n-type field effect transistor of claim 1, and the body of the recited p-
type field effect transistor of claim 2 is not connected to the output node.
Thus, we agree with Appellants' argument that Appellants' disclosure
provides sufficient written description indicating that Appellants were in
possession of the claimed subject matter at the time of filing of the
application and that the Examiner erred by rejecting the pending claims
under§ 112, first paragraph. Therefore, we do not sustain the rejection of
claims 1-16 under the frrst paragraph of pre-AIA 35 U.S.C. § 112.
Rejection under 35 U.S. C. § 112, second paragraph
The Examiner's underlying basis for support of this rejection is that
the recited "wherein said n-type field effect transistor body is not connected
to said output" in claims 1 ( and "wherein said p-type field effect transistor
body is not connected to said output" in claim 2) is indefmite because "Fig.
4 and paragraphs 0017---0019 show said n-type field effect transistor body is
connected to said output via a channel between drain and source of said n-
type field effect transistor MN." Final Act. 6. Appellants contend the same
disclosure and discussion presented above with respect to the written
description requirement supports the defmiteness of the claims. App. Br.
28-29.
In response, the Examiner asserts that
Fig. 4 clearly shows said n-type field effect transistor body is
connected to said output via a Resistor (i.e. the second high
impedance) and a channel between drain and source of said n-
type field effect transistor MN ( see the right red line in the
figure above); and Fig. 4 clearly shows said p-type field effect
transistor body is connected to said output via a Resistor Rb and
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a channel between drain and source of said p-type field effect
transistor MP (seethe left red line in the figure above).
Ans. 5.
We disagree with the Examiner. The disputed features relate to how
the body of the p-type or n-type transistor is biased to address the body
effect ( or back gate effect) when the source and the body (i.e., the p-type
substrate of an NFET) of a field effect transistor are not at the same voltage.
See Spec. ,r 30. In other words, the Examiner's explanation that the "n-type
field effect transistor body is connected to said output via a Resistor (i.e. the
second high impedance) and a channel between drain and source of said n-
type field effect transistor MN" (see Ans. 4) is not commensurate with how
the NFET and PFET function in the transmission gate of Figures 3 and 4.
As long as those of ordinary skill in the art would understand how to bias the
n-type field effect transistor body such that it is not connected to the output,
35 U.S. C. § 112(b) requires nothing more. See Orthokinetics, Inc. v. Safety
Travel Chairs, Inc., 806 F .2d 1565, 1576 (Fed. Cir. 1986).
As such, we find that the skilled artisan, upon reading the claims in
light of the Specification, would be able to ascertain the scope of the claimed
invention, specifically the term "and wherein said n-type field effect
transistor body is not connected to said output" recited in claim 1 and similar
term with respect to the body of a p-type field effect transistor recited in
claim 2. Therefore, we do not sustain the rejection of claims 1-16 under the
second paragraph of pre-AIA 35 U.S. C. § 112.
Rejection under 35 USC.§ 103(a)
In rejecting claim 1, the Examiner relies on Guo as disclosing the
recited method for switching the gate of an n-type field effect transistor in a
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transmission gate. Final Act. 9 ( citing Guo Fig. 2). The Examiner further
relies on Miske for disclosing the recited switching a gate of an n-type field
effect transistor and switching the body of said transistor to a high
impedance such that "said n-type field effect transistor body is not connected
to said output." Final Act. 9-10 ( citing Miske Figs. 5 and 7).
Appellants, however, contend the Examiner erred in fmding the
combination of Guo and Miske teaches or suggests the claimed subject
matter because:
[T]the claim limitation of "wherein said n-type field effect
transistor body is not connected to said output" does not make
the claim obvious in view of Guo in view Miske because in
Guo a body is connected to the output (Guo Fig. 2: body at
junction 24, 26, GND going to 14 and connected to output 18
via 26).
Further, Applicant submits that the addition of Miske
does not cure this defect because Miske also has a body
connected to the output (Miske Fig. 5: body at junction nF2,
nF3, nF4 going to nFl and connected to output B via nF3, or
alternatively connected to output A via nF2, as EN toggles both
nF2 and nF3 on at the same time).
App. Br. 30.
We are not persuaded by Appellants' arguments that the description of
the transmission gate disclosed in Guo, when combined by the teachings of
Miske, fails to disclose the recited features of claim 1. Although, the
Examiner's interpretation of the disputed limitation as "wherein said n-type
field effect transistor body is connected to said output" is not consistent with
Appellants' disclosure (see Ans. 7), we agree with the Examiner's fmdings
regarding Guo and Miske to the extent they correspond to the claim features
consistent with our analysis above regarding the recited "wherein said n-type
field effect transistor body is not connected to said output."
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Guo discloses a transmission gate that includes frrst and second field
effect transistors wherein the body of the frrst and second transistors is
biased by the frrst and second biasing circuit by voltages that are a function
of a positive reference voltage and a ground level reference voltage,
respectively. Guo Abstract. As further shown in Figure 2 of Guo, the
transmission gate 10 includes n-type field effect transistor 14 and p-type
field effect transistor 12. Guo 1 :10-16. Guo also discloses:
The gates of the two transistors 12 and 14 receive control
signals to tum on the analog switch and thus connect the frrst
terminal 16 to the second terminal 18. For example, the analog
switch is turned on when a positive voltage V dd is to the gate of
the NMOS transistor 14 and ground Gnd is applied to the gate
of the PMOS transistor 12. The body of the PMOS transistor is
connected to the positive voltage Vddwhile the body of the
NMOS transistor is connected to ground.
Id. at 1:24--32 (emphasis added). As such, the body of each of the p-type
and n-type transistors is not connected to the output 18, but is connected to
the power supply and the ground potential, respectively. We also observe
that, similar to Appellants' disclosure in their Figure 4 where the body of the
n-type transistor cannot be considered connected to the output through the
junction diode between the body and source of the transistor MN, the body
diode 26 in Figure 2 of Guo cannot be considered connected to the output
because the diode does not bias the body of transistor 14 at the voltage level
of output 18.
Miske also relates to a MOSFET switch or gate where the "body
effect" is minimized by biasing the body of then-type and p-type field effect
transistors. See Miske Abstract, 1 :14--31. As shown in Figure 2A of Miske,
a high on EN enable signal turns on nF 1, nF2, and nF3 which, in tum,
causes the body of nF 1 to be connected to its source/ drain minimizing the
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Application 13/244,429
body effect. Id. at 3:16-27. On the other hand, low EN turns nFl, nF2, and
nF3 transistors off while nF 4 is turned on which drives the back gate or the
body of nFl down to the ground level. Id. at 3: 29-32. We agree with the
Examiner that Figure 5 of Miske discloses a complete circuit corresponding
to the switch shown in Figure 2A, wherein the body of nF 1 is switched from
ground to a higher voltage when EN is turned to a high. Ans. 7-8. As
further explained by the Examiner, the body of then-type field effect
transistor nF 1 is not connected to the output during the operation of the
transmission gate. Id. at 8.
Therefore, contrary to Appellants' arguments that the body of nF 1 is
"connected to output B via nF3, or alternatively connected to output A via
nF2" (App. Br. 30), similar to out discussion above regarding the written
description rejection, the transistors nF2 and nF3 do not constitute any
connection between the body of nF 1 and any of the outputs A or B. In fact,
nF2 and nF3 maintain the body of then-type field effect transistor nF 1 at
low impedance not directly connected to an output, which minimizes the
body effect. See Miske 3 :3 3--4 5.
With respect to the combination of Guo and Miske, Appellants argue
"one of skill in the art would not be motivated to combine references each
lacking the same claimed imitation and expect the combination to magically
have the lacking limitation." App. Br. 30. As discussed above, the
Examiner correctly found that Guo discloses switching the body of an n-type
field effect transistor in a transmission gate from ground to a power supply
and then to a high impedance that is not directly connected to an output.
The Examiner further fmds that the proposed combination provides the
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transmission gate of Guo with lower "insertion loss at higher frequencies
and increased bandwidth of the switch." Ans. 8 (citing Miske 2:15-20).
The Supreme Court has explained that "if a technique has been used
to improve one device, and a person of ordinary skill in the art would
recognize that it would improve similar devices in the same way, using the
technique is obvious unless its actual application is beyond his or her skill."
KSR Int 'l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007). It also has been
held that "there must be some articulated reasoning with some rational
underpinning to support the legal conclusion of obviousness." Id. at 418
(quoting In re Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006)) (internal quotation
marks omitted). Such reasoning can be based on interrelated teachings of
multiple patents, the effects of demands known to the design community or
present in the marketplace, and the background knowledge possessed by a
person having ordinary skill in the art. KSR, 550 U.S. at 417-18. In the
present case, the Examiner has found that the proposed combination would
have resulted in improved performance of the transmission gate, as
discussed above. See Ans. 8. We fmd this articulated rationale to be
sufficient to justify this combination. In other words, we fmd that the
proposed combination would merely require the ordinarily skilled artisan to
use common sense to appreciate that the switching order described in Miske
would minimize the body effect in the field effect transistors of a
transmission gate.
With respect to claim 8, Appellants argue Miske cannot show that
connecting the gate and the body of the n-type field effect transistor occur at
the same time as well as at different times. App. Br. 32. We are not
persuaded of Examiner error because as pointed out by the Examiner, Figure
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5 of Miske shows EN connects the gate and the body of nF 1 through
different circuits or paths (i.e., gate is connected to +V when nF6 is turned
off and the body is connected when nF4 is turned on), which results in
connections at different times. See Final Act. 15; Ans. 9.
Appellants present arguments for the remaining claims that are similar
to those addressed above. App. Br. 30-32. For the above-stated reasons, we
are not persuaded by Appellants' arguments that the Examiner erred in
fmding the disclosure of Guo and Miske teaches or suggests the disputed
features of claims 1 and 8. Accordingly, we sustain the 35 U.S.C. § 103(a)
rejection of claims 1-16.
CONCLUSIONS
On the record before us, we conclude that the Examiner erred in
rejecting claims 1-16underpre-AIA 35 U.S.C. § 112, frrst paragraph, for
failing to comply with the written description requirement of the statute and
underpre-AIA 35 U.S.C. § 112, second paragraph as being indefmite.
However, based on the fmdings of facts and analysis above, we conclude
that the Examiner did not err in rejecting claims 1-16under 35 U.S.C.
§ 103( a) as unpatentable over Guo and Miske.
DECISION
We affrrm the Examiner's decision to reject claims 1-16.
Because we have affrrmed at least one ground of rejection with
respect to each claim on appeal, the Examiner's decision is affrrmed. See
37 C.F.R. § 4I.50(a)(l).
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No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED
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