Ex Parte Chauvel et al

Board of Patent Appeals and Interferences

Jan 26, 2009

10831470 (B.P.A.I. Jan. 26, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________________

Ex parte GERARD CHAUVEL, SERGE LASSERRE, DOMINIQUE
D'INVERNO, MAIJA KUUSELA, GILBERT CABILLIC, JEAN-
PHILIPPE LESOT, MICHEL BANATRE, JEAN-PAUL ROUTEAU,
SALAM MAJOUL, and FREDERIC PARAIN.
____________________

Appeal 2008-1663
Application 10/831,470
Technology Center 2100
____________________

Decided: January 26, 2009
____________________

Before: ALLEN R. MACDONALD, ST. JOHN COURTENAY III and
DEBRA K. STEPHENS, Administrative Patent Judges.

STEPHENS, Administrative Patent Judge.

DECISION ON APPEAL

STATEMENT OF CASE
Appellants appeal under 35 U.S.C. § 134 from a final rejection of
claims 1- 25. We have jurisdiction under 35 U.S.C. § 6(b).
We AFFIRM.
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According to Appellant, the invention is a system and method for
processing machine instructions having unresolved references (Abstract). A
machine instruction with an unresolved reference is replaced with an
unresolved identifier instruction and resolution code is produced (Spec. 9, ¶
[0028]). The resolution code is executed to resolve unresolved references
and create a resolution instruction (Spec. 9, ¶ [0029]).

Introduction
Exemplary Claim(s)
Claim 1 is an exemplary claim and is reproduced below:
1. A system, comprising:
decode logic;
replacement logic coupled to the decode logic; and
reference resolution execution logic;
wherein the decode logic and replacement logic function together to
determine whether an instruction contains an unresolved
reference and to replace an instruction having an unresolved
reference with a predetermined instruction containing an
operand associated with reference resolution code; and
wherein the decode logic decodes a plurality of instructions and
determines whether any of the instructions comprise the
predetermined instruction and, upon the decode logic
determining that an instruction is the predetermined instruction,
the reference resolution execution logic executes the resolution
code to resolve a memory reference.

Prior Art
The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Lai 6,382,846 May 7, 2002

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Andrew S. Tanenbaum, Structured Computer Organization 10-12
(Prentice-Hall 2nd ed. 1984) (hereinafter “Tanenbaum”).

Rejections
The Examiner rejected claims 1-5, 7-22, 24-27, and 29 under
35 U.S.C. § 102(b) as being anticipated by Lai and claims 6, 23 and 28
under 35 U.S.C. § 103(a) as being unpatentable over Lai in view of
Tanenbaum.

GROUPING OF CLAIMS
Based on the arguments presented in Appellants’ Brief, we decide the
appeal of claims 1-5, 7-22, 24-27 and 29 on the basis of arguments regarding
claim 1 alone. We decide the appeal of claims 6, 23, and 28 on the basis of
our selection of representative claim 6. See 37 C.F.R. § 41.37(c)(1)(vii).

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ISSUES

Appellants argue Lai does not disclose decode logic and replacement
logic replace an instruction with an unresolved reference with a
predetermined instruction containing an operand associated with reference
resolution code (App. Br. 12 and 13). Instead, Appellants argue, Lai
discloses the original instruction is unchanged in the instruction stream; the
decoder outputs instructions executed by the execution unit to resolve the
reference and does not replace the unresolved reference; and the instruction
originally having the symbolic reference is executed using the resolved
reference (id. at 12).
The Examiner counters that the claim language requires the
instruction be replaced not modified as argued by Appellants (Ans. 14). The
Examiner finds Lai describes an instruction being replaced in the instruction
stream order using resolving instructions the decoding unit has sent to the
execution unit (id. at 13). Lai further discloses executing an instruction to
resolve the unresolved reference (id. at 13). To resolve the reference, the
instruction must have been predetermined by the decoder so the instruction
will resolve the reference (id. at 13).
Issue 1
Have Appellants met the burden of showing the Examiner erred in
finding Lai discloses replacing an instruction with an unresolved reference
with a predetermined instruction containing an operand associated with
reference resolution code?

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Appellants argue Lai does not disclose decode logic decoding
instructions to determine whether any of the instructions comprise the
predetermined instruction and, if so, executing the resolution code to resolve
a memory reference (id. at 14). The Examiner finds since the decoder
“replaces’ the instruction with an instruction to resolve the references, the
decoder would necessarily decode and recognize the instruction as this is an
inherent property of computing systems (id. at 15). The claim is written
broadly and does not specify from where the instruction comes (id.).

Issue 2
Have Appellants met the burden of showing the Examiner erred in
finding Lai discloses determining whether any of the instructions comprise
the predetermined instruction and, if so, executing the resolution code to
resolve a memory reference?

FINDINGS OF FACT (FF)
Appellants’ Invention
(1) The present invention describes a system and method for
processing machine instructions having unresolved references (Abstract).
(2) An instruction includes two fields: an operation code
(“opcode”) and one or more operands that may be symbolic or concrete
(Spec. 4, ¶¶ [0014] and [0015]).
(3) Instructions with symbolic operands or “unresolved”
instructions are replaced with a concrete operand during “reference
resolution” (Spec. 4-5, ¶ [0016]).
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(4) Decode logic identifies instructions that contain symbolic
references and replacement logic replaces those instructions with unresolved
identifier instructions, producing resolution code (Spec. 9, ¶ [0027]).
(5) The unresolved identifier instruction may be associated with
instructions that contain symbolic references and include an opcode and an
operand (Spec. 7, ¶ [0023]).
(6) Resolution code (also referred to as reference resolution code)
is executed to replace the unresolved instructions in a process referred to as
reference resolution (Spec. 1-2, ¶ [0004], Spec. 4-5, ¶ [0016], and Spec. 9, ¶
[0028]).
(7) A predetermined instruction includes an operand associated
with resolution code or reference resolution code (Spec. 1, ¶ [0003]) and
Spec 2, ¶ [0005]).

Lai’s Invention
(8) Source code is compiled using a compiler program into
intermediate instructions that may contain unresolved symbolic references
(col. 8, ll. 48-50).
(9) A decoder decodes the instructions and determines if the
instruction contains an unresolved symbolic reference (unresolved symbolic
operand) (col. 8, ll. 52-55). If an unresolved symbolic reference is
identified, the decoder outputs instructions to the execution stage for
resolving the symbolic reference to a numeric operand (col. 8, ll. 56-59).
(10) The execution unit searches the data object for a numeric
reference that maps the unresolved symbolic reference to a numeric operand
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(col. 8, ll. 59-61). The execution unit stores the numeric operand in a
numeric reference table (col. 8, ll. 59-64).
(11) The execution unit (or stage) executes the decoded operation on
the numeric operand in place of the symbolic reference (col. 8, ll. 1-3).
(12) On subsequent execution of the same instruction, the decoder
will determine if the symbolic reference has been resolved and, in response,
immediately retrieve the numeric operand from the numeric reference table
and execute the decoded instruction on the retrieved numeric operand in
place of the symbolic reference (col. 9, ll. 6-10). In the execution stage, the
numeric operand is substituted for the symbolic reference in the decoded
instruction and the decoded instruction is executed on the numeric operand
(col. 9, ll. 60-64 and Fig. 6 step S20).

PRINCIPLES OF LAW
Claim Construction
"Our analysis begins with construing the claim limitations at issue."
Ex Parte Filatov, No. 2006-1160, 2007 WL 1317144, at *2 (BPAI 2007).
"The Patent and Trademark Office (PTO) must consider all claim
limitations when determining patentability of an invention over the prior
art." In re Lowry, 32 F.3d 1579, 1582 (Fed. Cir. 1994) (citing In re Gulack,
703 F.2d 1381, 1385 (Fed. Cir. 1983)). "Claims must be read in view of the
specification, of which they are a part." Markman v. Westview Instruments,
Inc., 52 F.3d 967, 979 (Fed. Cir. 1995) (en banc). "[T]he PTO gives claims
their 'broadest reasonable interpretation.'" In re Bigio, 381 F.3d 1320, 1324
(Fed. Cir. 2004) (quoting In re Hyatt, 211 F.3d 1367, 1372 (Fed. Cir. 2000)).
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"Moreover, limitations are not to be read into the claims from the
specification." In re Van Geuns, 988 F.2d 1181, 1184 (Fed. Cir. 1993)
(citing In re Zletz, 893 F.2d 319, 321 (Fed. Cir. 1989)).

§ 102 Anticipation
“A claim is anticipated only if each and every element as set forth in
the claim is found, either expressly or inherently described, in a single prior
art reference.” Verdegaal Bros. v. Union Oil Co. of California, 814 F.2d
628, 631 (Fed. Cir. 1987).
Inherency
“In relying upon the theory of inherency, the Examiner must provide a
basis in fact and/or technical reasoning to reasonably support the
determination that the allegedly inherent characteristic necessarily flows
from the teachings of the applied prior art.” Ex parte Levy, 17 USPQ2d
1461, 1464 (BPAI 1990) (emphasis in original). “[A]fter the PTO
establishes a prima facie case of anticipation based on inherency, the burden
shifts to appellant to ‘prove that the subject matter shown to be in the prior
art does not possess the characteristic relied on.’” In re King, 801 F.2d
1324, 1327 (Fed. Cir. 1986) (quoting In re Swinehart, 439 F.2d 210, 212-13
(CCPA 1971)). See also MPEP §§ 2112 (IV.), (V.).

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ANALYSIS
Rejection under 35 U.S.C. §102(b): claims 1-5, 7-22, 24-27, and 29
Issue 1
Appellants recite the decode logic and replacement logic function
together “replace an instruction having an unresolved reference with a
predetermined instruction containing an operand associated with reference
resolution code” (claim 1). An instruction is defined by Appellants as
including two fields: an opcode and one or more operands (FF 2).
The instruction has an unresolved reference (claim 1). Although
“unresolved reference” is not defined explicitly in the specification,
“unresolved” instructions are described as instructions with symbolic
operands (FF 3); therefore, we find an “unresolved” reference is a reference
with a symbolic operand.
In Lai, when an instruction with an unresolved symbolic reference is
identified, a numeric operand is substituted for the symbolic reference (FF
11). Therefore, we find the unresolved reference of Lai is replaced with a
numeric reference or operand.
Although Lai may not disclose replacing the original opcode in the
manner argued by Appellants, Lai does substitute, i.e., replace, the operand
in the decoded instruction and execute the decoded instruction on the
replaced operand (FF 11 and FF 12). Since an operand is part of an
instruction and the new instruction is executed, we find the instruction is
replaced. More specifically, we find replacing an instruction includes
replacing any part of the instruction thus forming a new instruction. This
new instruction may replace the opcode or the operand or both. As a matter
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of claim construction, we conclude that a broad but reasonable interpretation
of “replace an instruction” (as recited in claim 1) does not require changing
both the opcode and the operand as suggested by Appellants (App. Br. 13).
Therefore, we find that executing an instruction that was not the original
instruction is executing a replaced instruction.
In Lai, the decoder outputs instructions to the execution stage for
resolving the symbolic reference to a numeric operand (FF 9). The data
object maps the unresolved symbolic reference to the numeric operand (id.).
The execution unit then executes the decoded operation on the numeric
operand in place of the symbolic reference. Lai discloses the unresolved
symbolic reference or symbolic operand is substituted or replaced through
use of code, with an operand acquired from the data object (id.).
Appellants define resolution code as code executed to replace the
unresolved instructions (FF 6). Lai discloses code is executed to substitute
or replace, through the use of code, an unresolved reference (FF 9). Since
the numeric operand is acquired from a data object, the numeric operand is
predetermined. We find, therefore, the instruction is predetermined. More
specifically, a predetermined instruction may be the original opcode with the
mapped operand. The operand is associated with code that would be
executed to replace the unresolved instruction (FF 9 and FF 12). Therefore
we find Lai describes “a predetermined instruction containing an operand
associated with reference resolution code” (claims 1, 8, 13, 20 and 25).
Based on these findings, we further find Lai discloses code “to replace
an instruction having an unresolved reference with a predetermined
instruction containing an operand associated with reference resolution code”
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as recited in claim 1 as well as claim 25. Additionally, for the reasons set
forth above, we find Lai describes “replacing an instruction having an
unresolved reference with a predetermined instruction containing an operand
associated with reference resolution code” as recited in claims 8 and 13.

Issue 2

Lai describes the decoder determining whether an instruction has a
symbolic reference that has been resolved (FF 12). Lai discloses
determining the instruction which includes an operand associated with
resolution code (i.e., is a pre-determined instruction) (id.). If it is determined
the symbolic reference has been resolved, the decoded instruction substitutes
the numeric operand for the symbolic operand and the instruction is
executed in the execution stage (id.). The numeric operand is retrieved from
the numeric reference table (id.) Therefore, the code is executed to resolve
the memory reference – it is mapping the symbolic operand to the numeric
operand stored in a table in memory.
It is our view that the Examiner has provided a rationale in the
Answer that reasonably supports the finding of inherent anticipation of the
decoder sending the decoded instruction (with the symbolic operand
resolved) to the execution unit for executing the resolution code. We see no
response in the Reply Brief that specifically addresses the Examiner’s
finding (see Ans. 15). Therefore, we find Appellant has not met the burden
of proving that the subject matter shown to be in the prior art does not
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possess the characteristic relied on by the Examiner. See In re King, 801
F.2d at 1327.
We therefore find Lai discloses that a decoder “decodes a plurality of
instructions and determines whether any of the instructions comprise the
predetermined instruction and upon determining that an instruction is the
predetermined instruction, the reference resolution execution logic executes
the resolution code to resolve a memory reference” (claims 1 and 20).

Rejections under 35 U.S.C. § 103(a): claims 6, 23 and 28
Appellants have contended that Lai and Tanenbaum do not render the
invention obvious for the same reasons as argued with respect to claim 1 and
for the additional limitations recited in the claims. We see no deficiencies in
Lai or Tannenbaum. Additionally, Appellants have not pointed out any
specific limitations that are not taught or suggested by the Examiner’s
proffered combination of Lai and Tanenbaum.

CONCLUSION OF LAW
We find Appellants have not met the burden of showing the Examiner
erred in finding Lai discloses replacing an instruction with an unresolved
reference with a predetermined instruction containing an operand associated
with reference resolution code and finding Lai discloses determining
whether any of the instructions comprise the predetermined instruction and,
if so, executing the resolution code to resolve a memory reference. For this
reason and the additional reasons set forth above, we find Appellants have
not met the burden of showing the Examiner erred in rejecting representative
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claim 1 under 35 U.S.C. §102(b) as being anticipated by Lai. Claims 2-5, 7-
22, 24-27, and 29 fall with representative claim 1.
Because we see no deficiencies in Lai (as discussed supra) and also
because Appellants have not pointed to any specific limitations that are not
taught or suggested by the Examiner’s proffered combination of Lai and
Tanenbaum (App. Br. 14), we find Appellants have not met the burden of
showing the Examiner erred in rejecting representative claim 6 under 35
U.S.C. §103(a). Claims 23 and 28 fall with representative claim 6.

With respect to all claims before us on appeal, arguments which
Appellant could have made but chose not to make have not been considered
and are deemed to be waived. See 37 C.F.R, § 41.37(c)(1)(vii). See also In
re Watts, 354 F.3d 1362, 1368 (Fed. Cir. 2004).

DECISION
The Examiner’s rejection of claims 1-5, 7-22, 24-27, and 29 under
35 U.S.C. § 102(b) as being anticipated by Lai is affirmed.
The Examiner’s rejection of claims 6, 23, and 28 under
35 U.S.C. § 103(a) as being unpatentable over Lai in view of Tanenbaum is
affirmed.

No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

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