Ex Parte Chang et al

Patent Trial and Appeal Board

Apr 12, 2013

11772208 (P.T.A.B. Apr. 12, 2013)

UNITED STATES PATENT AND TRADEMARK OFFICE
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BEFORE THE PATENT TRIAL AND APPEAL BOARD
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Ex parte CHIEN-WEI CHANG and TING-HAO LIN
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Appeal 2010-011137
Application 11/772,208
Technology Center 2800
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Before CARL W. WHITEHEAD, JR., ERIC S. FRAHM, and
ANDREW J. DILLON, Administrative Patent Judges.

WHITEHEAD, JR., Administrative Patent Judge.

DECISION ON APPEAL
Appeal 2010-011137
Application 11/772,208

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STATEMENT OF THE CASE
Appellants are appealing claims 6-10. Appeal Brief 2. We have
jurisdiction under 35 U.S.C. § 6(b) (2012).
We reverse.

Introduction
The invention is directed to a high-density fine line circuit structure.
Appeal Brief 2-3.

Illustrative Claim (Emphasis Added)
6. A high-density fine line circuit structure, comprising:
a first board, comprising:
a first fine line circuit layer;
a first insulating layer, formed on a same surface
as the first fine line circuit layer; and
a first semiconductor device, installed on the first
fine line circuit layer;
a second board, comprising:
a second fine line circuit layer;
a second insulating layer, formed on a same surface as
the second fine line circuit layer; and
a second semiconductor device, installed on the second
fine line circuit layer; and
a dielectric layer formed between the first board and the
second board for combining the first board and the
second board to be a combined single board with the first
and second semiconductor devices being embedded in
the dielectric layer between the first and second boards;
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Application 11/772,208

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wherein the first or second fine line circuit layer of the
first board or the second board has portions exposed on
an outer surface of the combined single board for serving
as tin ball pads on which tin balls are formed.

Rejections on Appeal
Claims 6 and 10 stand rejected under 35 U.S.C. §102(b) as being
anticipated by Lee (U.S. Patent Application Publication Number
2004/0201087 A1; published October 14, 2004). Answer 3-5.
Claims 7-9 stand rejected under 35 U.S.C. §103(a) as being
unpatentable over Lee and Appellants’ Admitted Prior Art (AAPA). Answer
5-6.

Issue on Appeal
Do Lee and AAPA, either alone or in combination, disclose a high-
density fine line circuit structure wherein a semiconductor device is installed
on a fine line circuit layer?

ANALYSIS
Appellants argue that the claimed invention differentiates from Lee
because Lee’s:
[S]emiconductor device is attached on the substrate 121
by an adhesive 131 rather than installed on the fine line
circuit layer. Applicant respectfully points out that in a
high density fine line circuit structure, these differences
have significant impact in density and thickness of a
packaged device. Similarly, the second board of Lee
recited by the examiner differs from the instant invention
in the same way. (Please note that the leader line of 111 in
figure 4 of Lee has pointed to an incorrect layer, it should
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Application 11/772,208

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point to the semiconductor chip similarly to the leader line
of 151 .)
Appeal Brief 4.
However, the Examiner finds that:
Figure 4 of Lee clearly shows that semiconductor device
110 is installed on the fine line circuit layer 125.
Appellant’s language does not require that the
semiconductor device be in direct physical contact with
the circuit pattern. The claim language limiting the
semiconductor device to being “installed on the fine line
circuit layer” only requires that the fine line circuit layer
be a supporting part of the semiconductor device. This is
taught by Lee, as the fine line circuit layer 125 is a
supporting part of device 110. The fact that there is an
adhesive and an insulating layer between the
semiconductor device and the circuit pattern does not
preclude Lee from teaching Appellant’s invention as
claimed.

Answer 7.
We do not agree with the Examiner’s findings and we find
Appellants’ arguments to be persuasive. We agree with Appellants’
contention that the leader line 111 in Lee’s Figure 4 incorrectly points to the
circuit layer 121 as opposed to the semiconductor chip 111 as supported by
Lee’s disclosure. Lee, paragraph [0029]. “A claim is anticipated only if
each and every element as set forth in the claim is found, either expressly or
inherently described, in a single prior art reference.” Verdegaal Bros., Inc.
v. Union Oil Co. of Cal., 814 F.2d 628, 631 (Fed. Cir. 1987).

Appeal 2010-011137
Application 11/772,208

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Lee’s Figure 4 is reproduced below:

Lee’s Figure 4 discloses a stack package comprising of two chip scale
packages 110 and 150. Lee, paragraph [0029].

Lee’s fine line circuit layer 121, as shown in Figure 4, is positioned
within the structure of the device package 100/110, as the Examiner finds,
however, we agree with Appellants, as evidenced by Figure 4 that the
semiconductor chip 111 is not “installed on” the fine circuit layer 121, as
required by independent claim 6. A broad interpretation of the claim
language is proper as long as the interpretation is reasonable. See In re
Bigio, 381 F.3d 1320, 1324 (Fed. Cir. 2004) (citing In re Hyatt, 211 F.3d
1367, 1372 (Fed. Cir. 2000)). It is not reasonable to consider Lee’s
semiconductor device to be installed on the fine line circuit layer 121 merely
because the circuit layer ispart of the device package as the Examiner finds.
Therefore we reverse the Examiner’s anticipation rejection of claim 6, as
well as, dependent claim 10.
AAPA does not address the deficiency of Lee and therefore we also
reverse the Examiner’s obviousness rejection of dependent claims 7-9.
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Application 11/772,208

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DECISIONS
The anticipation rejection of claims 6 and 10 is reversed.
The obviousness rejection of claims 7-9 is reversed.

REVERSED

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