Ex Parte Chakravarthi et al

Patent Trial and Appeal Board

Jun 28, 2016

12582841 (P.T.A.B. Jun. 28, 2016)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
12/582,841 10/21/2009 Srinivasan Chakravarthi TI-62914.1 5426
23494 7590 06/30/2016
TEXAS INSTRUMENTS INCORPORATED
P O BOX 655474, M/S 3999
DALLAS, TX 75265
EXAMINER
DIALLO, MAMADOU L
ART UNIT PAPER NUMBER
2895
NOTIFICATION DATE DELIVERY MODE
06/30/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
uspto@ti.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte SRINIVASAN CHAKRAVARTHI,
PERIANNAN CHIDAMBARAM, and JOHAN WEIJTMANS
Appeal 2014-009341
Application 12/582,841
Technology Center 2800
Before MICHAEL P. COLAIANNI, JULIA HEANEY, and JEFFREY R.
SNAY Administrative Patent Judges.
HEANEY, Administrative Patent Judge.
DECISION ON APPEAL
Appellants1 request review pursuant to 35 U.S.C. § 134(a) of a
decision of the Examiner finally rejecting claims 1 and 4—19 of Application
12/582,841. We have jurisdiction under 35 U.S.C. § 6(b). We affirm.
BACKGROUND
The subject matter on appeal relates to a PMOS transistor of an
integrated circuit. Br. 1.
1 Appellants identify the real party in interest as Texas Instruments, Inc. Br.
3.
Appeal 2014-009341
Application 12/582,841
Claim 1, reproduced below from the Claims Appendix of the Appeal
Brief, is illustrative of the claims on appeal:
1. A PMOS transistor, comprising:
a semiconductor substrate;
a PMOS transistor gate stack coupled to said semiconductor
substrate;
source/drain extensions within said semiconductor substrate;
in-situ boron and carbon doped epitaxial SiGe coupled to said
source/drain extensions and said semiconductor substrate; and
source/drain regions within said semiconductor substrate and
coupled to said in-situ carbon-doped epitaxial SiGe;
wherein said in-situ boron and carbon doped epitaxial SiGe has
a graded boron concentration.
REFERENCES
The Examiner relied upon the following prior art in rejecting the
claims on appeal:
Wang et al. US 2007/0093033 A1 Apr. 26, 2007
(hereinafter “Wang”)
Liu US 6,660,605 B1 Dec. 9,2003
(hereinafter “Liu”)
THE REJECTIONS
1. Claims 1, 4—14, and 16—18 are rejected under 35 U.S.C. § 103(a)
as unpatentable over Wang.
2. Claims 15 and 19 are rejected under 35 U.S.C. § 103(a) as
unpatentable over Wang and Liu.
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Appeal 2014-009341
Application 12/582,841
DISCUSSION
First Rejection
Appellants present substantively distinct arguments directed only to
claim 1. Br. 9—23. Therefore, we need address only claim 1; all other
claims subject to the first rejection stand or fall with claim 1.
Appellants argue that Wang does not teach “in-situ boron and carbon
doped epitaxial SiGe plus source/drain regions” and thus does not teach the
claimed invention. Br. 9. We are not persuaded that Appellants identify
reversible error in the rejection. Accordingly, we affirm the rejection for the
reasons expressed in the Non-Final Rejection mailed August 7, 2013
(hereinafter “Non-Final Act.”), Answer, and below.2
Wang discloses a MOS transistor comprising a semiconductor
substrate 12, a MOS transistor gate stack coupled to the substrate 14A+B,
source/drain extensions within the semiconductor substrate 26A, and in-situ
boron and carbon doped epitaxial SiGe 22A+B coupled to the source/drain
extensions and semiconductor substrate (Wang 123) and having a graded
boron concentration {id.). Wang further discloses that the epitaxial SiGe
layers are formed over source/drain recessed regions 20 that extend into the
semiconductor substrate 12. The Examiner determines that it would have
been obvious to a person of ordinary skill in the art to modify Wang by
selecting P-type dopants to form a PMOS transistor device. Non-Final Act.
3.
2 The Examiner’s selection of box 2a in the Aug. 7, 2013 Office Action
cover sheet, designating that Action as “Final,” appears to have been made
in error. No such designation appears in the body of the Office Action.
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Appeal 2014-009341
Application 12/582,841
Appellants argue that Wang teaches away from the claimed invention
because it shows that layers 22A+B are the source/drain, rather than a
separate element from the source/drain regions as recited in claim 1. Br. 9—
10. Appellants’ argument lacks persuasive merit. The Examiner correctly
determines that the ordinary meaning of “region,” consistent with
Appellants’ Specification, is “real estate” or “area.” Ans. 3, citing
Specification | 5 (“CMOS transistors 20, 30 that are formed within a
semiconductor substrate 40 having an NMOS region 50 and a PMOS region
60.”) Applying this construction of “region,” the Examiner correctly
determines that Wang’s source/drain recessed region is a separately defined
area coupled to layers 22A+B. Appellants do not dispute the Examiner’s
construction of “region” or its application to Wang, in that they have not
filed a reply brief. Accordingly, we affirm the rejection of claims 1, 4—14,
and 16—18 as unpatentable over Wang.
Second Rejection
Claims 15 and 19 depend from claims 1 and 8, respectively, and recite
an additional limitation that the PMOS transistor gate stack is covered by a
gate hardmask. Appellants argue that Liu teaches away from the claimed
invention “by teaching the formation of source/drain regions” and that it
“does not teach that the source/drain regions are a separate element from an
in-situ boron and carbon doped epitaxial SiGe.” Br. 25. This is the same
argument that Appellants make against the Examiner’s first rejection; it does
not respond to the Examiner’s determination as to the combination of Wang
and Liu, and is not persuasive of reversible error. In re Keller, 208 USPQ
871, 882 (CCPA 1981) (arguing against references individually cannot
overcome a rejection based on a combination of the references).
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Appeal 2014-009341
Application 12/582,841
Accordingly, we affirm the rejection of claims 15 and 19 as unpatentable
over Wang and Liu.
SUMMARY
We affirm the rejections of claims 1 and 4—19.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED
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