Ex Parte Bandholz et al

Patent Trial and Appeal Board

May 6, 2016

12644704 (P.T.A.B. May. 6, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
12/644,704 12/22/2009
60501 7590 05/10/2016
LENOVO COMPANY (LENOVO-KLS)
c/o Kennedy Lenart Spraggins LLP
8601 Ranch Road 2222
Ste. 1-225
AUSTIN, TX 78730
FIRST NAMED INVENTOR
Justin P. Bandholz
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
XRPS920090107US 1 6865
EXAMINER
CAZAN, LIVIUS RADU
ART UNIT PAPER NUMBER
3729
NOTIFICATION DATE DELIVERY MODE
05/10/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
office@klspatents.com
kate@klspatents.com
hanna@klspatents.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
ExparteJUSTINP. BANDHOLZ, PRAVINPATEL, and
PETER R. SEIDEL
Appeal2014-002942
Application 12/644,704
Technology Center 3700
Before NEALE. ABRAMS, LINDA E. HORNER, and
GORDON D. KINDER, Administrative Patent Judges.
HORNER, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Justin P. Bandholz et al. (Appellants 1) seek our review under
35 U.S.C. § 134 of the Examiner's decision rejecting claims 1-6. 2 Final
1 Appellants identified International Business Machines Corporation as the
real party-in-interest. Br. 1. According to an assignment filed with the
USPTO subsequent to the filing of the Appeal Brief, IBM assigned the
application to Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Appellants
are reminded of their ongoing duty, during the pendency of an appeal, to
provide the Patent Trial and Appeal Board with notice of a change to the real
party-in-interest within 20 days of any such change. 37 C.F.R. § 41.8(a)(l ).
2 Claims 7-20 are pending, but have been withdrawn from consideration.
Final Act. 1.
Appeal2014-002942
Application 12/644,704
Action, dated April 26, 2013 ("Final Act."). We have jurisdiction under
35 U.S.C. § 6(b).
We AFFIRM.
CLAIMED SUBJECT MATTER
Appellants' claimed subject matter relates to methods of
manufacturing integrated circuits with inductive bond wires. Spec. 1, 11. 11-
12. Claim 1 is the sole independent claim before us on appeal. Claim 1 is
reproduced below.
1. A method of manufacturing an integrated circuit
('IC'), the method comprising:
providing a semiconductor die in an IC package, the
semiconductor die comprising an electrical endpoint;
affixing to the semiconductor die a pad, the pad
characterized by a capacitance, the pad coupled to the electrical
endpoint;
determining an inductance of a bond wire for the IC in
dependence upon electrical characteristics of the IC, the
inductance of the bond wire configured to decrease signal
degradation caused by the capacitance of the pad on electrical
signals transmitted between the pin and the electrical endpoint of
the semiconductor die;
creating the bond wire into an inductor characterized by
the determined inductance; and
coupling the pad to an IC package pin with the bond wire.
Br. 12 (Claims App.).
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Application 12/644,704
REJECTIONS
The Final Action from which this appeal is taken contained the
following rejections:
1. Claims 1, 2, and 4 under 35 U.S.C. § 102(b) as anticipated by
Miller (US 6,208,225 B 1; issued March 27, 2001 ).
2. Claim 3 under 35 U.S.C. § 103(a) as unpatentable over Miller and
Ho (US 5,839,184; issued November 24, 1998).
3. Claim 5 under 35 U.S.C. § 103(a) as unpatentable over Miller and
Breed (Breed, Gary, ed., "Analyzing Signals Using the Eye
Diagram," High Frequency Electronics (Nov. 2005)).
4. Claim 6 under 35 U.S.C. § 103(a) as unpatentable over Miller.
ANALYSIS
First Ground of Rejection
Appellants present arguments for the separate patentability of claims
1, 2 and 4, which are subject to the first ground of rejection. Br. 4-8. We
address each claim infra.
Claim 1
Appellants argue that Miller does not anticipate claim 1 because it
does not disclose providing a semiconductor die and affixing to the
semiconductor die a pad, the pad being coupled to the electrical endpoint of
the semiconductor die. Br. 4-5 (arguing that "the terms 'semiconductor' and
'die' do not even appear on[e] time in the entire Miller reference").
Anticipation is not an ipsissimis verbis test. In re Bond, 910 F.2d 831,
832 (Fed. Cir. 1990) (to anticipate, a prior art reference must disclose every
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claimed element in a single reference arranged as in the claim but this is not
an ipsissimis verbis test); Akzo N. V. v. US. Int'! Trade Comm 'n, 808 F.2d
1471, 1479 and n.11 (Fed. Cir. 1986) (noting that "[a]n 'ipsissimis verbis'
test requires the same terminology in the prior art in order to find
anticipation.").
The Examiner found that Miller discloses an integrated circuit (IC)
package ( 54) including a semiconductor die (shown in Fig. 4, unnumbered)
disposed therein and a bond pad (52) affixed to the semiconductor die and
coupled to the electrical endpoint thereof. Ans. 2-3 (explaining that the
semiconductor die having an electrical endpoint is implied by use of the
term "integrated circuit"). We agree with the Examiner's understanding that
the integrated circuit package disclosed in Miller implicitly contains a
semiconductor die having an electrical endpoint.
First, one of ordinary skill in the art would understand by the use of
the term "integrated circuit" that the disclosed package includes a
semiconductor die. Id. at 8 (referring to an Encyclopedia Britannica article
on integrated circuits as extrinsic evidence of the common meaning of
"integrated circuit" in the art as being that of a circuit formed on a
semiconductor substrate (i.e., die)). We further agree with the Examiner that
"there is no reason to believe the meaning of the term "IC" as used in Miller
deviates from the commonly understood meaning." Id. Further, Appellants
have provided no persuasive argument or evidence to support any other
meaning of "IC" in the art.
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Application 12/644,704
Second, as noted by the Examiner, the Specification defines
"electrical endpoint" as "an electrical conductor that electrically couples the
circuit fabricated on the semiconductor die to a bond wire through a pad."
Id. at 8-9 (citing Spec. 4, 11. 20-23). As noted by the Examiner (Ans. 9),
Miller discloses that "[ e Jach node of an integrated circuit (IC) that is to
communicate with external circuits is linked to a bond pad on the surface of
the IC chip" and that "[i]n a packaged IC[,] a bond wire typically connects
the bond pad to a conductive leg extending from the package surrounding
the IC chip." Miller, col. 1, 11. 24-28. We further agree with the Examiner
that "the overall disclosure of Miller is concerned with transmitting a signal
through pad 52, bond wire 60, and package leg 64." Ans. 9. As such, we
find a preponderance of the evidence supports the Examiner's finding that
Miller's pad 52 is coupled to the electrical endpoint of a semiconductor die.
T 1 1a.
Appellants further argue that Miller does not anticipate claim 1
because Miller does not disclose "determining an inductance of a bond wire
for the IC in dependence upon electrical characteristics of the IC, the
inductance of the bond wire configured to decrease signal degradation
caused by the capacitance of the pad on electrical signals transmitted
between the pin and the electrical endpoint of the semiconductor die" and
"creating the bond wire into an inductor characterized by the determined
inductance." Br. 5-6. In particular, Appellants argue that "LI and L2 [of
Miller] refer to an inductance of a physical component that includes both a
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bond wire and a package leg" and thus they "do not represent the inductance
of the bond wire itself." Id. at 6.
The Specification describes, with reference to Figure 3, that:
Determining (306) an inductance of a bond wire for the IC may
also be carried out by iteratively, beginning with a first proposed
inductance and ending when a proposed inductance is selected as
the inductance for the bond wire: simulating (316) operation of
the IC with the bond wire having a proposed inductance to
generate an eye diagram; and determining (326) whether a width
of an eye of the eye diagram is greater than a predetermined
threshold; if the width is not greater than the predetermined
threshold, increasing (318) the proposed inductance; and if the
width is greater than the predetermined threshold, selecting
(320), as the inductance for the bond wire, the proposed
inductance.
Spec. 10, 11. 13-22; see also Br. 13 (Claims App.) (claim 5 further defining
the determining step of claim 1 as this iterative determining process). Based
on this disclosure in the Specification, one having ordinary skill in the art
would understand the "determining" step of claim 1 to encompass a process
in which the inductance of the bond wire may be settled upon through
iterative testing of bond wires having various inductances.
We agree with the Examiner that Miller discloses adjusting the
inductance of the bond wire taking into consideration the pad capacitance.
Ans. 11 (citing Miller, col. 2, 11. 14-24 ). The cited passage of Miller
discloses adjusting the bond wire inductance, the IC pad capacitance, and the
additional circuit board capacitance relative to one another to optimize
relevant characteristics of the interconnect system frequency response.
Miller, col. 2, 11. 14-24. In light of the meaning of "determining" as
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discussed supra, the Examiner's finding that Miller discloses determining
the inductance of the bond wire through optimization of the bond wire
inductance, the IC pad capacitance, and the additional circuit board
capacitance relative to one another to achieve a desired frequency response
is supported by a preponderance of the evidence.
For these reasons, the Examiner's findings as to the disclosure of
Miller are supported by a preponderance of the evidence. Appellant's
arguments do not demonstrate error in the rejection of claim 1. Accordingly,
we sustain the Examiner's rejection of claim 1under35 U.S.C. § 102(b) as
anticipated by Miller.
Claim 2
Claim 2 depends from claim 1 and recites that "creating the bond wire
further comprises adding an inductive metal to a base bond metal of the
bond wire." Br. 12 (Claims App.). The Examiner found that l\1iller
anticipates claim 2 because Miller discloses joining inductive elements in
series with bond wires to adjust the magnitudes of LI and L2. Ans. 3--4
(citing Miller, col. 5, 11. 20-24). We agree with the Examiner's reading of
the language of claim 2 that "adding" is not limited to alloying and is broad
enough to encompass "simply connecting two pieces of metal together."
Ans. 12. The Examiner's interpretation of the claim language is reasonable
in light of Appellants' Specification, which describes that "an inductive
metal may be 'added' to a base bond metal in various ways including for
example, by creating an alloy of the base bond and inductive metals, by
coating the base bond metal with the inductive metal, and in other ways as
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will occur to readers of skill in the art." Id. at 12-13 (quoting Spec. 7,
11. 20-29). Based on this description, "adding an inductive metal to a base
bond metal of the bond wire" recited in claim 2 would not be understood by
one of ordinary skill in the art to exclude joining two pieces of metal
together in series to adjust the inductance of the bond wire. For these
reasons, we sustain the Examiner's rejection of claim 2 under 35 U.S.C.
§ 102(b) as anticipated by Miller.
Claim 4
Claim 4 depends from claim 1 and recites "determining the inductance
of the bond wire for the IC in dependence upon electrical characteristics of
the IC further comprises determining the inductance in dependence upon the
capacitance of the pad, an average frequency of electrical signals to be
transmitted between the pin and the electrical endpoint of the semiconductor
die, electrical characteristics of the IC package, and electrical characteristics
of the pin." Br. 13 (Claims App.). Appellants acknowledge that Miller
discloses sizing L 1, L2, C 1 vrA, and C2vrA to maximize the total area under
the frequency response curve in the passband between 0 and 3 GHz, and that
these variables should be adjusted depending on which frequency response
and impedance characteristics are most important for the particular
application. Br. 7-8 (citing Miller, col. 5, 11. 51-64 and col. 6, 11. 22--46)
Appellants contend that Miller's "generalized disclosure indicating that
various values can be adjusted, however, includes no specific disclosure at
all indicating that the inductance of the bond wire is determined [as specified
in claim 4]." Id. at 8.
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Application 12/644,704
The Examiner sets forth in detail on pages 13-14 of the Examiner's
Answer the basis for the finding that Miller takes into account each of the
factors recited in claim 4 in determining the inductance of the bond wire.
We find that the Examiner has set forth in this explanation in the Answer
and in the passages of Miller relied on in the rejection (Miller, col 5, 11. 51-
64 and col. 6, 11. 22-46) a prima facie case of anticipation. Appellants'
argument that Miller does not explicitly disclose all of the factors recited in
claim 4 for determining inductance of the bond wire does not persuade us of
error in the Examiner's determination that the factors recited in claim 4 must
necessarily be taken into account in the practice of the method disclosed in
Miller. For these reasons, we sustain the Examiner's rejection of claim 4
under 35 U.S.C. § 102(b) as anticipated by Miller.
Second through Fourth Grounds of Rejection
Appellants rely on the same arguments presented for the patentability
of claim 1 over Miller as the basis for the patentability of claims 3, 5, and 6.
Br. 8-9. For the reasons provided supra in our analysis of claim 1, we
likewise sustain the rejections of claims 3, 5, and 6 under 35 U.S.C.
§ 103(a).
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DECISION
The decision of the Examiner to reject claims 1-6 is AFFIRMED.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(l )(iv).
AFFIRMED
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