Ex Parte 6900462 et al

Board of Patent Appeals and Interferences

Nov 9, 2010

90010214 (B.P.A.I. Nov. 9, 2010)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
90/010,214 07/01/2008 6900462 0553-0172.99 2481
26568 7590 11/09/2010
COOK ALEX LTD
SUITE 2850
200 WEST ADAMS STREET
CHICAGO, IL 60606
EXAMINER
TIBBITS, PIA FLORENCE
ART UNIT PAPER NUMBER
3992
MAIL DATE DELIVERY MODE
11/09/2010 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte SEMICONDUCTOR ENERGY LABORATORY COMPANY,
LTD.
Appellant
___________

Appeal 2010-009180
Reexamination Control 90/010,214
Technology Center 3900
Patent No. 6,900,462
____________

Before MICHAEL P. TIERNEY, SCOTT R. BOALICK, and
JEFFREY B. ROBERTSON, Administrative Patent Judges.

BOALICK, Administrative Patent Judge.

DECISION ON APPEAL1

1 The two-month time period for filing an appeal or commencing a civil
action, as recited in 37 C.F.R. § 1.304, or for filing a request for rehearing,
as recited in 37 C.F.R. § 41.52, begins to run from the “MAIL DATE”
shown on the PTOL-90A cover letter attached to this decision.
Appeal 2010-009180
Reexamination Control 90/010,214
Patent No. 6,900,462

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Semiconductor Energy Laboratory Company, Ltd. appeals under 35
U.S.C. § 134(b) and 35 U.S.C. § 306 from a final rejection of claim 1. The
rejection of claim 7 has been withdrawn by the Examiner. (Ans. 3.)
Claims 4, 10-18, 21, 22, 25 and 26 have been cancelled and claims 2, 3, 5, 6,
8, 9, 19, 20, 23 and 24 are not subject to reexamination. We have
jurisdiction under 35 U.S.C. §§ 134(b) and 306.
We reverse.
STATEMENT OF THE CASE
Appellant’s invention relates a method of manufacturing a
semiconductor device (Abstract), in particular, a thin film transistor (TFT)
for an electro-optical device (col. 1, ll. 10-16). The manufacturing method
includes forming a first conductive film, forming an inorganic insulating
film on the first conductive film, forming an organic resin film on the
inorganic insulating film, forming a contact hole in a laminated film formed
of the inorganic insulating film and the organic resin film (col. 3, ll. 18-25)
and forming a pixel electrode in the contact hole (col. 3, ll. 12-13, 25-26).
Claim 1 recites (with underlining and bracketing showing additions
and deletions relative to the claim of the issued patent):
1. A semiconductor device comprising:
a first conductive film formed over an insulating substrate;
an inorganic insulating film covering said first conductive film;
an organic resin film covering said inorganic insulating film;
a contact hole that goes through said inorganic insulating film
and said organic resin film;
an edge portion of said inorganic insulating film that comes in
contact with a bottom surface of said contact hole is taper like having
an angle range of 30 degrees to 80 degrees from a horizontal surface;
[and]
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an edge portion of said organic resin film that comes in contact
with said inorganic insulating film has an angle range of 50 degrees to
90 degrees from a horizontal surface; and
a [second conductive film] pixel electrode formed over said
organic resin film and connected to said first conductive film at a
bottom surface of said contact hole.
Claim 1 stands rejected under 35 U.S.C. § 103(a) as being obvious
over the combination of Zhang ‘732 (U.S. Patent 5,940,732), Auda (U.S.
Patent 4,814,041) and Zhang ‘121 (U.S. Patent 5,481,121).2
ISSUES
Appellant argues that the combination of Zhang ‘732, Auda and
Zhang ‘121 does not teach or suggest “an edge portion of said inorganic
insulating film that comes in contact with a bottom surface of said contact
hole” (App. Br. 9-10; see also Reply Br. 3-5).
The following dispositive issue is presented:
Does the combination of Zhang ‘732, Auda and Zhang ‘121 provide a
reason to form the claimed semiconductor having “an edge portion of said
inorganic insulating film that comes in contact with a bottom surface of said
contact hole”?

2 The rejection of claim 7 under 35 U.S.C. §103(a) as being obvious over
the combination of Zhang ‘732 and Yamazaki (U.S. Patent 6,399,988) or, in
the alternative, as being obvious over the combination of Appellant’s
admitted prior art, Auda and Zhang ‘121 and the rejection of claims 1 and 7
under 35 U.S.C. §103(a) as being obvious over the combination of Matsuo
(JP 06175156), Auda and Zhang ‘121 has been withdrawn by the Examiner.
(Ans. 3.)
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Patent No. 6,900,462

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FINDINGS OF FACT
Appellant’s U.S. Patent 6,900,462 (‘462 Patent)
1. The ‘462 patent relates to “a semiconductor device having a circuit in
which a thin film transistor (hereinafter referred to as TFT) is formed
on a substrate having an insulating surface, and to a manufacturing
method thereof.” (Col. 1, ll. 10-13.) In the “Background to the
Invention” section, the ‘462 patent describes that the “TFT is
normally connected to wirings through a contact hole” and “it is
necessary to form a contact hole for connecting to the upper layer
wiring in the inorganic insulating film and the organic resin film
which covers a TFT gate electrode, a source electrode, or a drain
electrode.” (Col. 1, ll. 37-43.) Furthermore, “the contact hole is
formed for connecting a drain electrode of a pixel TFT with a pixel
electrode in an active matrix liquid crystal display using TFT.”
(Col. 1, ll. 43-45.)
2. In “Experiment 3,” the ‘462 patent describes that “[a]n edge portion of
the inorganic insulating film . . . comes in contact with the bottom
surface of the contact hole (FIG. 5C, a).” (Col. 6, ll. 22-24.) In
Figure 5C, reference character “a” illustrates a region in which the
edge portion of the inorganic insulating “Si NO FILM” intersects the
“Ti FILM” at the bottom surface of the contact hole. Figure 5C also
illustrates that an “ITO FILM” is formed in the contact hole, directly
overlying the “Ti FILM.”
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Zhang ‘732
3. Zhang describes “a method of fabricating planar type thin-film
transistors.” (Col. 1, ll. 8-9.) In a first embodiment for fabricating
thin-film transistors (TFTs) on a glass substrate 101 (col. 4, ll. 9-12), a
silicon semiconductor layer 102 is formed over the glass substrate 101
(col. 4, ll. 13-21). A silicon oxide film 103, functioning as a gate-
insulating layer, is formed over the silicon semiconductor layer 102.
(Col. 4, ll. 22-23; fig. 1A.) After forming a gate electrode 108 (col. 5,
ll. 9-10) that is covered with an anodic oxide film 107 (col. 4, ll. 61-
63), a source region 109 and a drain region 110 are formed by ion
implanting phosphorus into the silicon semiconductor layer 102
(col. 5, ll. 10-16; fig. 1C). Figure 1C illustrates that the silicon oxide
film 103 directly overlays the source region 109 and the drain
region 110.
4. Interlayer insulating films 114 and 115 are formed (col. 5, ll. 35-36)
over the silicon oxide film 103 and the gate electrode 108 (fig. 1D).
Source/drain contact regions 202 and 203 and a gate electrode
region 204 are formed by dry etching (col. 6, ll. 8-12) through the
interlayer insulating films 114 and 115 (fig. 2A). “Then, the gate-
insulating film 103 at the bottom surface of the contact hole is etched
with buffered hydrofluoric acid, thus completing the contact holes in
the source/drain regions.” (Col. 6, ll. 16-19; fig. 2B.) “Thereafter, [a]
chromium mixed acid solution . . . is used to etch the anodic oxide
film 107, thus completing the contact hole in the gate electrode
region.” (Col. 6, ll. 20-23; fig. 2B.) After completing of the contact
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holes, interconnect electrodes 205, 206 and 207 are formed. (Col. 6,
ll. 48-49.)
5. Figure 3 illustrates a cross-sectional view of the contact hole after
etching (col. 3, ll. 62-63), in which an edge of the interlayer insulating
films 114 is defined by a tilt angle α (col. 5, ll. 53-57). Figures 2D
and 3 also illustrate that the silicon oxide film 103 is located between
the interlayer insulating film 114 and the source region 109 (or the
drain region 110).
ANALYSIS
We are convinced by Appellant’s argument (App. Br. 9-10; see also
Reply Br. 3-5) that the combination of Zhang ‘732, Auda and Zhang ‘121
does not teach or suggest “an edge portion of said inorganic insulating film
that comes in contact with a bottom surface of said contact hole.”
The Examiner found that the insulating film 114 of Zhang ‘732
corresponds to the claimed “inorganic insulating film” (Ans. 5-6), the
insulating film 115 of Zhang ‘732 corresponds to the claimed “organic resin
film” (Ans. 6) and that contact holes formed through the insulating films 114
and 115 above the source/drain contact regions 202 and 203 correspond to
the claimed “contact hole” (Ans. 6). The Examiner also found that a tapered
section of the insulating film 114 with a tilt angle α corresponds to “an edge
portion of said inorganic insulating film that comes in contact with a bottom
surface of said contact hole.” (Ans. 6-7.) The Examiner further articulated
that “there is no claimed requirement for the bottom surface of the contact
hole to exist [sic] solely of the conductive film” and thus “Zhang ‘732’s
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insulating film 103 can be taken to be part of the ‘bottom surface’ of the
contact hole.” (Ans. 17.) We do not agree.
Under the broadest reasonable interpretation consistent with the
Specification of the ‘462 patent, we agree with Appellant’s argument that
the inorganic insulating film 114 “is above and not in contact with the
bottom of the contact hole” (App. Br. 10; FF 3-5). The ‘462 patent describes
that for a TFT, “it is necessary to form a contact hole for connecting to the
upper layer wiring in the inorganic insulating film and the organic resin film
which covers a TFT gate electrode, a source electrode, or a drain electrode.”
(FF 1.) In “Experiment 3,” the ‘462 patent describes that “[a]n edge portion
of the inorganic insulating film . . . comes in contact with the bottom
surface of the contact hole (FIG. 5C, a).” (FF 2.) From Figure 5C, reference
character “a” illustrates a region in which the edge portion of the inorganic
insulating “Si NO FILM” intersects the “Ti FILM” (i.e., the bottom surface
of the contact hole) and that an “ITO FILM” is formed in the contact hole,
directly overlying the “Ti FILM.” (FF 2.) Thus, reading the term in the
context of the entire ‘462 patent, a “contact hole” is formed through
insulating layers and electrically connects upper layer wiring with a TFT
electrode, such that that a “bottom surface” of the contact hole contacts the
underlying TFT electrode.
In addition, the limitation “an edge portion . . . comes in contact with
a bottom surface of said contact hole” implicitly defines the location of the
“bottom surface” because claim 1 further recites “a pixel electrode . . .
connected to said first conductive film at a bottom surface of said contact
hole.” In other words, the “contact hole” is formed such that it intersects the
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“first conductive film” in order for the contact hole to be electrically
connected to the first conductive film (see FF 1). Thus, the “first conductive
film” is located at the “bottom surface” of the contact hole.
Therefore, the Examiner’s interpretation of “bottom surface” as
encompassing the silicon oxide insulating film 103 of Zhang ‘732 is overly
broad and not consistent with the Specification of the ‘462 patent.
Accordingly, the Examiner has erred in finding that the combination
of Zhang ‘732, Auda and Zhang ‘121 teaches or suggests “an edge portion
of said inorganic insulating film that comes in contact with a bottom surface
of said contact hole.”
CONCLUSION
Based on the findings of fact and analysis above, we conclude that the
Examiner has erred in rejecting claim 1 under 35 U.S.C. § 103(a).
DECISION
The rejection of claim 1 under 35 U.S.C. § 103(a) is reversed.
REVERSED

cu

FOR APPELLANT:

MARK J. MURPHY
COOK ALEX LTD
SUITE 2850
200 WEST ADAMS STREET
CHICAGO, IL 60606