Ex Parte 6633187 et al

Board of Patent Appeals and Interferences

Apr 13, 2010

95000198 (B.P.A.I. Apr. 13, 2010)

UNITED STATES PATENT AND TRADEMARK OFFICE
_____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
_____________

ACTIONS SEMICONDUCTOR, LTD.
Requester
v.
SIGMATEL, INC.
Patent Owner and Appellant
_____________

Appeal 2010-001866
Reexamination Control 95/000,198
Patent 6,663,187 B11
Technology Center 3900
______________

Decided: April 13, 2010
_______________

Before ROBERT E. NAPPI, KARL D. EASTHOM, and KEVIN F.
TURNER, Administrative Patent Judges.

EASTHOM, Administrative Patent Judge.

DECISION ON APPEAL

1 Issued to Michael R. May and Marcus W. May on October 14, 2003,
based on Application 09/716,731, filed November 20, 2000.
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STATEMENT OF THE CASE
Appellant, Patent Owner, appeals from the Examiner’s rejection of
claim 9 of Patent 6,663,187 B1 (“‘187 patent”). Requester has not appealed
from the Examiner’s refusal to enter Requester’s proposed rejections of
claims 1-5, 9, 12, 13, and 15-18 of the ‘187 patent.
Claim 9, the sole claim on appeal, has not been amended during these
reexamination proceedings.
We have jurisdiction under 35 U.S.C. §§ 134(b), 134(c), and 315.
We AFFIRM.
A. Related proceedings
According to Appellant, there are no related appeals or interferences.
(App. Br. 1.)
B. The invention disclosed in the ‘187 patent2
The ‘187 patent discloses an apparatus and method for enabling a
stand-alone integrated circuit. A stand-alone integrated circuit includes an
on-chip power converter, a reset circuit, and some functional circuitry which
may include a microprocessor, digital signal processor circuitry, state
machine, logic circuitry, analog circuitry, and/or any type of components
and/or circuits that perform a desired electrical function. When a power
enable signal is received, the on-chip power converter is enabled to generate
at least one supply from the power source. The processing continues by

2 The following description of the ‘187 patent constitutes findings of fact
that are supported by a preponderance of the evidence.
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enabling functionality of the stand-alone integrated circuit when the at least
one supply has substantially reached a steady-state condition. (Abstract.)
Figure 1 of the ‘187 patent is reproduced below (in a rotated and
reduced form).

Figure 1 above represents a block diagram of one apparatus disclosed
in the ‘187 patent.
Figure 1 shows reset circuit 16, on-chip power converter 18, supply
lock circuitry 20, supply 42 generated via the converter 18 from the external
power source 12, and functional circuitry 22.
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C. The ‘187 patent claim 9
Claim 9. A stand-alone integrated circuit (IC) comprises:
a reset circuit operable to place the stand-alone IC in an idle state until
a supply lock signal is enabled;
an on-chip power converter that generates a supply from an external
power source upon assertion of a power enable signal; and
supply lock circuitry operably coupled to enable the supply lock
signal when the supply substantially reaches a steady-state condition.

(App. Br. 16, Claims Appendix.)
D. The Prior Art.
Ciccone 5,917,255 June 29, 1999
Yasuda 5,936,443 Aug. 10, 1999
E. The Rejections
Claim 9 stands rejected under 35 U.S.C. § 103(a) for obviousness
based on Ciccone and Yasuda. The Examiner couched the rejection under
two separate rationales. One employed Yasuda as the primary reference and
Ciccone as the secondary reference. (Ans. 11-16.) The other employed
Ciccone as the primary reference and Yasuda as the secondary reference.
(Ans. 7-11.)
THE ISSUES
Appellant’s primary argument against the rejection of claim 9 based
on Yasuda as the primary reference and Ciccone as the secondary reference
is that the Examiner erred in combining Ciccone’s power enable signal
circuit with Yasuda’s power-on-reset (POR) circuit. Appellant’s primary
argument against the rejection of claim 9 based on Ciccone as the primary
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reference and Yasuda as the secondary reference is that the Examiner erred
in interpreting certain portions of Ciccone’s circuit as constituting a power
converter. (App. Br. 3-14.) Consequently, Appellant’s contentions present
the following issues:
(1) Did the Examiner err in finding and concluding that it would have
been obvious to employ a power enable signal, similar to that employed in
Cyclone’s POR circuit, in Yasuda’s POR circuit?
(2) Did the Examiner err in construing Ciccone’s PWK and PMAN
transistors as power converters?
ISSUE 1:
A. Findings of fact related to Yasuda
1. Yasuda’s Figure 10 is reproduced below:

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Figure 10 above discloses Yasuda’s reset circuit 4 comprising voltage
converter circuit 4 connected to an external power source ExVdd.
2. Yasuda’s circuit uses POR (power-on-reset) signals to reset the
internal circuit 3 on a semiconductor chip “when a power source is turned
ON” or keeps the “circuit operation halted until an internal potential is
stabilized in order to prevent the unstable state from occurring when the
power source is turned ON.” (Col. 1, ll. 12-15.)
3. “[T]he internal circuit 3 is not reset, or is not started by the internal
voltage generating circuit 4 in the unstable state so that the POR signal can
be generated with the internal voltage intVdd stable easily.” (Col. 7, ll. 56-
60.) By using the voltage generating circuit to generate the POR signal,
malfunctions to the POR signal caused by fluctuations in the external power
source ExVdd can be reduced. (Col. 7, ll. 5-10.)

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B. Findings of fact related to Ciccone
4. Ciccone’s Figure 3 is reproduced below (in a reduced version):

Figure 3 above shows Ciccone’s POR circuit which includes a manual
reset switch for enabling power from source Vps to the remainder of the
circuit. (Abstract.)
5. Ciccone describes the operation of the “MANUAL” signal as
follows:
“In the case of a power down mode, signal MANUAL is HIGH,
devices PWK and PMAN are off such that both the first and second stages
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are disabled. Consequently . . . the integrated circuit is kept in a reset state.”
(Col. 5, ll. 4-9.)
In the case in which the circuit is in power-up mode (i.e.,
when MANUAL is LOW) and the power supply voltage is
below the two MOS threshold voltages required to turn-on
devices ND1 And ND2, both of the first and second stages are
disabled. In addition, since [the] device PMAN is on and
device PTRIP is off, the TRIP voltage signal is LOW. . . .
As the power supply voltage level increases . . . the first
stage is enabled and signal PDPATH is pulled low so as to turn
device PTRIP on. As Vps increases further the TRIP signal
increases until it exceeds the trip voltage of the PORDC
inverter . . . . [which] outputs a LOW level indicator signal
causing the delay portion to be enabled.
(Col. 4, l. 54 to col. 5, l. 3.)
C. Principles of law
The Examiner bears an initial burden of factually supporting any
rejection. In re Oetiker, 977 F.2d 1443 (Fed. Cir. 1992). On appeal,
Appellant may rebut the Examiner’s findings with opposing evidence or
argument. Failure to do so may constitute a waiver of potential arguments.
See Hyatt v. Dudas, 551 F.3d 1307, 1313-14 (Fed. Cir. 2008) (the Board
may treat arguments appellant failed to make for a given ground of rejection
as waived); In re Baxter Travenol Labs, 952 F.2d 388, 391 (Fed. Cir. 1991)
(“It is not the function of this court to examine the claims in greater detail
than argued by appellant . . . .”); 37 C.F.R. 41.37(c)(1)(vii).
A rejection under 35 U.S.C. § 103(a) must be based on the following
factual determinations: (1) the scope and content of the prior art; (2) the
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level of ordinary skill in the art; (3) the differences between the claimed
invention and the prior art; and (4) any objective indicia of non-obviousness.
DyStar Textilfarben GmbH & Co. Deutschland KG v. C.H. Patrick Co., 464
F.3d 1356, 1360 (Fed. Cir. 2006) (citing Graham v. John Deere Co., 383
U.S. 1, 17 (1966)). “‘[T]here must be some articulated reasoning with some
rational underpinning to support the legal conclusion of obviousness.’” KSR
Int’l Co. v. Teleflex, Inc., 550 U.S. 398, 418 (2007) (citation omitted).
D. Analysis
The issue here is whether the Examiner erred by proposing the use of
a power enable circuit, similar to that employed in Ciccone’s POR circuit, in
Yasuda’s POR circuit. Ciccone and Yasuda each disclose a POR circuit
which controls the operation of an integrated circuit as the circuit power
becomes stable during power-up. (See FF 1-5.) The Examiner’s position is
that adding Ciccone’s MANUAL power enable scheme (FF 4, 5) to enable,
in a similar fashion, Yasuda’s external source ExVdd (FF 1), amounts to
simply adding an “on/off switch for the circuit that controls application of
power to its components.” (Ans. 13.)
Appellant describes the Examiner’s position as “tautological” because
“[o]f course, adding a circuit that turns something on and off, will allow you
to turn it on and off.” (App. Br. 14.) The Examiner responded to this
argument as follows: “Here, Patent Owner is on the same page as the Office
in acknowledging how very slight and predictable the modification to
Yasuda that is needed in order to meet claim 9. Also, it is true “that adding a
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switch allows one ‘to turn it on and off’ . . . .” (Ans. 25.) The Examiner’s
rationale for adding the switch “was to provide additional control.” (Ans.
26.)
The Examiner’s position is more persuasive. Appellant’s argument
that the Examiner failed to “articulate a reason” (App. Br. 14) does not
address the Examiner’s stated rationale of providing more control.
Appellant’s argument that Yasuda’s circuit already has control (App. Br. 13)
does not undermine the Examiner’s position of providing additional control.
The proposed modification provides Ciccone’s simple on/off switch control,
a different kind of control, as an addition to what Appellant describes as an
internal power saving control in Yasuda (id.). Moreover, while Appellant
alleges that Yasuda’s “INTERNAL VOLTAGE GENERATING CIRCUIT”
(4) already includes a mechanism to disable the power (id.), Appellant does
not explain how that occurs.
Any disabling of power, if it does occur in Yasuda, only disables
power to an internal circuit 3. But this has nothing to do with what occurs
when the external power source itself is turned “ON”. In other words,
Yasuda’s circuit 4 controls the timing of when power is provided to an
internal circuit 3, and does not control disabling of the external power
supply ExVdd from the entire circuit at junction 2. (It is not clear that power
to the internal circuit is disabled as Appellant contends, but resolution of this
finding is not necessary to the holding here.) (See FF 1-3.)
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Appellant does not contest the Examiner’s description of Ciccone’s
MANUAL enable circuitry as an on/off switch. Ciccone’s MANUAL
enable signal allows power to flow from an external source to the reset
circuit by switching on certain transistors. (FF 4, 5.) In addition to
describing Ciccone’s circuit as an “on/off switch” (Ans. 13), the Examiner
also provided the rationale of “using an indicator signal to show that an
external power supply has been turned on.” (Ans. 26.) Appellant does not
respond to the Examiner’s latter rationale.
The Examiner also provided the rationale of an additional control and
proposed measuring the external power supply (e.g., to ensure its stability)
to provide an enable signal as part of this additional control. (Ans. 26.) This
rationale, in conjunction with the Examiner’s other findings, implies using a
manual on/off switch connected to the external power source which, when
switched on, then provides an enable signal (which also serves as an
indication signal as proposed by the Examiner) to Ciccone’s transistor
connected between the external power and the remaining circuit, as
Ciccone’s MANUAL enable scheme suggests. (See Ans. 13, 25-26; FF 4.)
Notwithstanding the Examiner’s explanation and Appellant’s
arguments, additional (and more complicated) external power supply sensing
would not be required to implement Ciccone’s simple additional on/off
control (or to satisfy clam 9). That is, Ciccone’s use of the word
“MANUAL” in the circuit of Figure 3 to describe the enable signal suggests
a manual switch as invoking the enable signal (via an (un-disclosed)
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additional control component) without necessarily measuring the external
voltage for stability. (This explanation is not intended to imply that bodily
incorporation of Ciccone’s circuit is required to support obviousness.)
Further, common knowledge and common sense suggest that external
power sources for electronic circuits typically employ a switch and an
indication that power is on. “‘Our suggestion test is in actuality quite
flexible and not only permits, but requires, consideration of common
knowledge and common sense.’” KSR Int’l Co. v. Teleflex, Inc., 550 U.S.
398, 421 (2007) (citation omitted).
Setting aside this common knowledge for a moment, Yasuda’s
external power supply ExVdd is connected to a POR circuit. As described
supra, Ciccone also discloses a power source connected to a POR circuit.
(Compare FF 1-3 with FF 4-5.) Yasuda describes certain events as
occurring “when a power source is turned ON.” (FF 2.) Yasuda’s
description of turning the power “ON” at least suggests a switch, or some
type of power enabling scheme. In any event, adding a switch, as suggested
by Ciccone’s MANUAL enable switch scheme, to Yasuda’s POR circuit
“‘only unites old elements with no change in their respective functions’” id.
at 416 (citation omitted), and thereby amounts to no “more than the
predictable use of prior art elements according to their established
functions,” id. at 417.
“‘The combination of familiar elements according to known methods
is likely to be obvious when it does no more than yield predictable results.’”
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Leapfrog Enters., Inc. v. Fisher-Price, Inc., 485 F.3d 1157, 1161 (Fed. Cir.
2007) (quoting KSR, 550 U.S. at 416)). Despite Appellant’s arguments,
Appellant does not argue that adding a switch and enable signal as suggested
by Ciccone’s POR circuit switch scheme to Yasuda’s POR circuit would
have been “uniquely challenging or difficult for one of ordinary skill in the
art.” Id. at 1162 (citation omitted).
F. Conclusion regarding Issue 1
The Examiner did not err in finding and concluding that it would
have been obvious to employ a power enable signal, similar to that
employed in Cyclone’s POR circuit, in Yasuda’s POR circuit.
ISSUE 2
A. Additional findings of fact regarding the ‘187 Patent
6. Appellant refers to an embodiment of an on-chip power converter
18 by reference to a co-pending application, 09/551,123, titled “METHOD
AND APPARATUS FOR REGULATNG A DC OUTPUT VOLTAGE.”
(Col. 2, ll. 60-64.)
7. Appellant discloses that the “on-chip power converter 18 includes
a band-gap reference 36, switching transistors 38 and a regulation module
40. (Col. 2, ll. 49-51.)
8. Claim 12 (not on appeal) follows:
12. The stand alone IC of claim 9, wherein the on-
chip power converter further comprises:
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a band-gap reference that produces a reference
voltage upon assertion of the power enable signal.
9. “The on-chip power converter may produce one or more supplies,
which may be a voltage supply, or a current supply, for powering different
functional circuits of the stand-alone integrated circuit.” (Col. 3, ll. 63-66.)
“The on-chip power converter 18 may produce multiple supply voltages for
powering different types of functional circuitries. For example, analog
circuitry may require a 5 volt supply while digital circuitry may require a 3
volt supply.” (Col. 3, ll. 14-18.)
10. The reason for employing a voltage converter follows: “The
stand-alone integrated circuit 10 is operably coupled to an external power
source 12, which may be a battery, solar power generator, or other power
source that produces a voltage that is not the proper voltage for powering at
least a portion of the stand-alone integrated circuit 10.” (Col. 2, ll. 20-25.)
11. Appellant’s invention overcomes problems associated with on-
chip converters and power supplies. Problems occur before the external
power becomes stable. (Col. 1, ll. 11 to col. 2, l. 14.) “[O]nce the power
supply is up and running, the integrated circuit may be activated in a known
state.” (Col. 1, ll. 21-22.) “To ensure that the digital circuitry begins
functioning in a known state, it is important to delay activation of the digital
circuit until the power supply is producing a stable supply voltage . . . .”
(Col. 1, ll. 27-30.)

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B. Additional findings of fact regarding Ciccone
12. Ciccone’s Figures 4B and 4C (rotated) appear below:

Figures 4B and 4C above show the voltage versus time (in micro-
seconds) at PDPATH and TRIP points in Ciccone’s circuit as depicted above
(FF 4).
The line A represents the source voltage Vps as it is quickly ramped to
VDD and superimposed on the PDPATH voltage C and the TRIP voltage D.
(Col. 2, ll. 56-58; col. 5, ll. 33-45.)
13. Ciccone’s Figures 5B and 5C (rotated) appear below:

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Figures 5B and 5C above show the voltage versus time in seconds at
PDPATH and TRIP points in Ciccone’s circuit as depicted above (FF 4).
The line A represents the source voltage Vps, as it is slowly ramped to VDD,
superimposed on the PDPATH voltage C and the TRIP voltage D. (Col. 2,
ll. 59-61; col. 6, ll. 24-36.)
14. A converter is defined as follows: “General term for an
equipment which changes: . . . 2. The voltage of a power supply, e.g. one
converting a 12 V DC supply into a 240 V DC.” Newnes Dictionary of
Electronics (1999), available at
http://www.credoreference.com/entry/bhelec/converter.
B. Principles of law
Claims under reexamination are given their broadest reasonable
interpretation consistent with the patent disclosure. In re Trans Texas
Holdings Corp., 498 F.3d 1290, 1298 (Fed. Cir. 2007) (citing In re
Yamamoto, 740 F.2d 1569, 1571 (Fed. Cir. 1984)).
Although giving claims their broadest reasonable interpretation must
take into account any definitions given in the specification, In re Morris,
127 F.3d 1048, 1054 (Fed. Cir. 1997), it is improper to read into the claims
limitations from examples given in the specification. In re Zletz, 893 F.2d
319, 321-22 (Fed. Cir. 1989). See also Phillips v. AWH Corp., 415 F.3d
1303, 1323 (Fed. Cir. 2005) (“[A]lthough the specification often describes
very specific embodiments of the invention, we have repeatedly warned
against confining the claims to those embodiments. . . . In particular, we
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have expressly rejected the contention that if a patent describes only a single
embodiment, the claims of the patent must be construed as being limited to
that embodiment.”) (citations omitted).
C. Analysis
The Examiner found that the PWK and PMAN transistors in
Ciccone’s circuit constitute the on-chip power converter recited in claim 9.
(Ans. 9.) Appellant argues that the Examiner erred in this broad
interpretation. (App. Br. 3-9.)
Appellant and the Examiner agree that “the on-chip power converter
should perform a conversion on a source of power” as that construction “is
consistent with the Specification.” (App. Br. 3.) Appellant also states that
“the specification discloses a converter that could be used for on-chip power
converter 18 that regulates the output voltage and would be suitable for
converting a variable input voltage, such as that provided from a battery, to a
stable output voltage. See also col. 2 . . . which references application no.
09/551,123 . . . .” (App. Br. 4 (emphasis added).)
Appellant’s reference to what “could be used” shows that claim 9 is
not limited to the preferred embodiment 18 as depicted in block diagram
form (see Fig. 1 supra), and/or the converter described in application no.
09/551,123. Inspection of Appellant’s Figure 1 (supra), in light of this
statement, indicates that claim 9, even if limited by to some extent by
aspects of that embodiment, may include transistors 38. (As discussed
below, claim 9 is open-ended and does not require the band-gap reference 36
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as recited in claim 12 – indicating that other blocks in Figure 1 may not be
required either.) In an analogous fashion, the Examiner found that
Ciccone’s PWK and PMAN transistors provide different stable voltages
from an external source to a portion of Ciccone’s circuit. (Ans. 21.)
The record supports the Examiner’s finding and also fits Appellant’s
implied definition above of what “could be used” as “suitable for converting
a variable input voltage.” That is, Figures 4B and 4C show that PWK and
PMAN produce lower stable voltages, as evidenced by C and D, relative to
the source voltage A. (FF 12.)
Notwithstanding Appellant’s further arguments to the contrary,
Ciccone’s transistors, producing lower voltages from the external source,
also satisfy Appellant’s broad definition implied by the purpose for
Appellant’s converter – to provide, from a source, lower voltages or currents
to portions of the circuit. (FF 9, 10.) The Examiner found that Ciccone’s
lower converter voltages are consistent with Appellant’s Specification which
discloses a desire for lower converter voltages. (Ans. 21; FF 9, 10.)
As indicated above, Appellant does not dispute that these lower
voltage conversions represent conversions in a manner consistent with the
Specification. Rather, Appellant argues that Ciccone’s lower voltages are
not stable or in a steady state condition. (See App. Br. 4.)
This argument is not persuasive. Appellant relies on Figure 5 (see FF
13) to support the argument that Ciccone’s voltages are not stable. (App. Br.
6-7.) Contrary to Appellant’s argument, as the Examiner found, Figure 5
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only shows what happens during a slow transition phase of ramping the
power supply on and off. (See Ans. 20.) The Examiner stated: “In fact,
Patent Owner appears to admit that the on-chip power converter of Ciccone
does provide a stable output ‘after Vps itself is stable.’” (Id.) Appellant
does not provide a meaningful response to this finding. Notwithstanding
Appellant’s arguments based on Figure 5, Ciccone’s Figure 4 reveals
extremely stable voltages C and D after fast ramp times of the power supply
(represented by A), supporting the Examiner’s finding. (FF 4, FF 12.)
Appellant also argues that “[o]nly by interaction of transistors of ND1
and ND2 with transistor PWK, and transistors PTRIP and PWK with
transistor PMAN, is any stable voltage formed, and then only after Vps itself
is stable.” (App. Br. 6-7 (emphasis supplied).) In other words, Appellant
admits, as the Examiner found, that the voltage is stable after Vps becomes
stable. (Ans. 20.)
As the Examiner explained, Ciccone’s circuit operates similar to
Appellant’s invention. That is, Appellant describes how the circuit must
wait until the source becomes stable before providing clock signals, reset
functions, etc. (See Ans. 20-21, FF 11.)
Appellant’s related argument (App. Br. 8-9) that PWK and PMAN do
not themselves create a lower stable voltage also is not persuassive. Voltage
converters typically do not operate without other elements, for example, a
load, a reference voltage, and a source, as Appellant’s disclosure indicates.
(See Appellant’s Fig. 1 supra.) Moreover, Appellant’s claim 12, specifically
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reciting a band-gap reference voltage, reveals that open-ended claim 9 does
not necessarily include a stand-alone converter – i.e., one with the required
band-gap reference according to the preferred embodiment. (FF 7, 8.) In
other words, Appellant discloses a converter as including a band-gap
reference (FF 7), but claim 12 (FF 8) indicates that claim 9 does not require
such a band-gap reference. In line with this discussion is Appellant’s above-
discussed disavowal of the converter 18 as limited by any preferred
embodiment (i.e., that disclosed in Figure 1 or Appellant’s related
application.)
Ciccone’s transistors ND2, ND1, NWK, and PTRIP do appear to aid
in providing stable voltage as Appellant’s argument implies, but these
transistors can be considered similar to Appellant’s band-gap reference
circuit (which is not required in claim 9 as explained supra) or a load,
because they similarly couple the voltage converter portion PWK and
PMAN to another reference, VSS. (See FF 4.) Therefore, Appellant’s broad
disclosure of a converter as simply providing lower voltages or currents to
other circuit components (FF 9, 10) is consistent with Ciccone’s PWK and
PMAN as similarly providing lower voltages and currents to other circuit
components. The Examiner’s interpretation is also consistent with an art-
based dictionary. (FF 14.) See Phillips, 415 F.3d at 1322-23 (“judges are
free . . . at any time . . . to . . . rely on dictionary definitions when construing
claim terms, so long as the dictionary definition does not contradict any
definition found in or ascertained by a reading of the patent documents”).
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Appellant’s related argument (App. Br. 7-8) that PWK and PMAN do
not form a stable supply to another circuit is not persuasive. Claim 9 does
not require the converter to provide voltage to another circuit. Thus, the
argument is not commensurate in scope with claim 9. (See Ans. 18.) (The
stability aspect is addressed supra.) Further, Appellant acknowledges that
PWK and PMAN provide voltage to ND2, ND2, PTRIP, and NWK. (App.
Br. 7.) The Examiner interpreted those components to be part of another
circuit - the supply lock circuit recited in claim 9. (Ans. 9.) Appellant did
not contest that interpretation.
The Examiner’s interpretation of a converter applying power to a
circuit portion is consistent with Appellant’s disclosure. That is, the
disclosure indicates that a converter is required because a battery “produces
a voltage that is not the proper voltage for powering at least a portion of the
stand-alone integrated circuit 10.” (FF 10 (emphasis added).)
As stated supra, components ND2, ND2, PTRIP, and NWK (with
inverter PORDC) constitute the supply lock circuitry recited in claim 9
according to the Examiner’s rejection. (Ans. 9.) Therefore, Appellant’s
argument that PWK and PWM cannot produce a stable voltage without the
former four components amounts to an assertion that the power converter of
claim 9 requires the cooperation of the supply lock circuitry to generate a
stable supply. Nothing in claim 9 clearly precludes this cooperation. Nor
does Appellant explain why claim 9 precludes this cooperation. To the
contrary, claim 9 may require some interaction between the converter
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generated supply and the supply lock circuitry. According to the analysis in
light of Appellant’s arguments and the Examiner’s findings, Ciccone’s
supply lock circuitry performs two functions: (1) acting akin to a reference
voltage circuit for the power converter to aid in creating a stable supply, and
(2) “enabl[ing] the supply lock signal when the supply substantially reaches
a steady-state condition” as recited in claim 9.
Appellant’s argument, starting at the last paragraph on page 8 and
spanning to page 9 of the Appeal Brief and pertaining to the alleged lack of a
“power enable signal” in Yasuda, does not address the Examiner’s finding
under the rationale here (i.e., with Ciccone as the primary reference), that
Ciccone provides the MANUAL “power enable signal.” (Ans. 8-9.)
“[T]he PTO must give claims their broadest reasonable construction
consistent with the specification . . . Therefore, we look to the specification
to see if it provides a definition for claim terms, but otherwise apply a broad
interpretation.” In re Icon Health and Fitness, Inc., 496 F.3d, 1374, 1379
(Fed. Cir. 2007). Accord In re Bigio, 381 F.3d 1320, 1325 (Fed. Cir. 2004)
(“Absent claim language carrying a narrow meaning, the PTO should only
limit the claim based on the specification or prosecution history when those
sources expressly disclaim the broader definition.”).
Appellant’s arguments do not provide a clear definition or otherwise
clearly define the claim scope, and reduce to the assertion that somewhere
between the preferred embodiments and Ciccone’s different voltage levels
produced by transistors PWK and PMAN, a defined distinction exists which
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Patent 6,663,187 B1

23
the Board can determine. “Such an approach puts the burden in the wrong
place. It is the applicants’ burden to precisely define the invention, not the
PTO’s.” In re Morris, 127 F.3d 1048, 1056 (Fed. Cir. 1997) (reasoning that
a “veiled attempt to avoid the potential future effects of prosecution history
estoppel” cannot be condoned). “The problem in this case is that the
appellants failed to make their intended meaning explicitly clear.” Id.
C. Conclusion regarding Issue 2
The Examiner did not err in construing Ciccone’s PWK and PMAN
transistors as power converters.

DECISION
The Examiner’s decision to reject claim 9 is AFFIRMED.
Requests for extensions of time in this ex parte reexamination
proceeding are governed by 37 C.F.R. § 1.550(c). See 37 C.F.R. § 41.50(f).

rvb

Patent Owner

Polansky & Associates, P.L.L.C.
1250 Capital of Texas Hwy, South
Building 3, Suite 400
Austin, TX 78746

Appeals 2010-001866
Reexamination Control 95/000,198
Patent 6,663,187 B1

24
Third Party Requester

Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
901 New York Avenue, NW
Washington, DC 2001-4413