EMC IP Holding Company LLC

Patent Trials and Appeals Board

Jul 30, 2020

2019002762 (P.T.A.B. Jul. 30, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
14/751,507 06/26/2015 Bo Wu 1003-357 1018
47653 7590 07/30/2020
BAINWOOD HUANG AND ASSOCIATES LLC
2 CONNECTOR ROAD
WESTBOROUGH, MA 01581
EXAMINER
ALSIP, MICHAEL
ART UNIT PAPER NUMBER
2136
MAIL DATE DELIVERY MODE
07/30/2020 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte BO WU, GUANGLIANG LEI and SCOTT DAVID VON RHEE
Appeal 2019-002762
Application 14/751,507
Technology Center 2100
Before ST. JOHN COURTENAY III, LARRY J. HUME, and
PHILLIP A. BENNETT, Administrative Patent Judges.
HUME, Administrative Patent Judge.
DECISION ON APPEAL
Pursuant to 35 U.S.C. § 134(a), Appellant,1 EMC IP Holding
Company LLC, appeals from the Examiner’s decision rejecting claims 1, 3,
5–14, and 16–23, which are all claims pending in the application. Claims 2,
4, and 15 are cancelled. We have jurisdiction under 35 U.S.C. § 6(b).
We REVERSE.

1 We use the word “Appellant” to refer to “applicant” as defined in
37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as EMC IP
Holding Company LLC. Appeal Br. 2.
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Application 14/751,507
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STATEMENT OF THE CASE2
Appellant’s disclosed embodiments and claimed invention relate to
“Utilizing a Flash Memory Drive which includes Single-level Cell Flash
Memory and Multi-level Cell Flash Memory.” Spec., Title.
Claim 1, reproduced below, is representative of the subject matter on
appeal (emphasis added to dispositive prior-art limitations):
Exemplary Claim
1. In a flash memory drive which includes single-level cell
(SLC) flash memory and multi-level cell (MLC) flash memory,
a method of managing data, the method comprising:
within the flash memory drive, performing data placement
operations on data which has been written to the flash memory
drive;
based on the data placement operations, storing hot data in
the SLC flash memory; and based on the data placement
operations, storing cold data in the MLC flash memory, the hot
data being accessed more frequently than the cold data;
wherein performing the data placement operations
includes detecting existence of cold data in the SLC flash
memory;
wherein storing the cold data in the MLC flash memory
includes, in response to detecting existence of the cold data in the
SLC flash memory, moving the cold data from the SLC flash
memory into the MLC flash memory;
wherein the method further comprises:
detecting occurrence of an idle time event within the flash
memory drive; and

2 Our decision relies upon Appellant’s Appeal Brief (“Appeal Br.,” filed
Dec. 29, 2017); Reply Brief (“Reply Br.,” filed Sept. 20, 2019); Examiner’s
Answer (“Ans.,” mailed Dec. 21, 2018); Final Office Action (“Final Act.,”
mailed June 26, 2017); and the original Specification (“Spec.,” filed
June 26, 2015).
Appeal 2019-002762
Application 14/751,507
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wherein moving the cold data from the SLC flash memory
into the MLC flash memory is performed in response to detection
of the occurrence of the idle time event.
Prior Art
The Examiner relies upon the following prior art as evidence in
rejecting the claims on appeal:
Garratt US 8,209,466 B2 June 26, 2012
Pittelko US 2013/0254458 A1 Sept. 26, 2013
Henderson et al.
(“Henderson”)
US 2014/0304566 Al Oct. 9, 2014
Rejections on Appeal
R1. Claims 1, 3, 5, 6, 12, 14, and 20 stand rejected under 35 U.S.C.
§ 102(a)(2) as being anticipated by Garratt. Final Act. 2.
R2. Claims 7–11, 13, and 16–19 stands rejected under 35 U.S.C.
§ 103 as being unpatentable over the combination of Garratt and Pittelko.
Final Act. 4.
R3. Claim 21 stands rejected under 35 U.S.C. § 103 as being
unpatentable over the combination of Garratt and Henderson. Final Act. 7.
R4. Claims 22 and 23 stand rejected under 35 U.S.C. § 103 as being
unpatentable over the combination of Garratt, Henderson, and Pittelko.
Final Act. 8.

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Application 14/751,507
4
ISSUES AND ANALYSIS
For essentially the same reasons argued by Appellant (Appeal Br. 12 –
14; Reply Br. 5) we reverse the Examiner’s rejection of independent claim 1,
and also the rejection of independent claims 14 and 20, which recite the
dispositive limitation in commensurate form. For the same reasons, we also
reverse the rejections of all claims 3, 5–13, 16–19, and 21–23 that depend
therefrom.3
1. § 102(a)(2) Rejection R1 of Claims 1, 3, 5, 6, 12, 14, and 20
Issue
Appellant argues (Appeal Br. 13–14; Reply Br. 2–4) the Examiner’s
rejection of claim 1 under 35 U.S.C. § 102(a)(2) as being anticipated by
Garratt is in error. These contentions present us with the following issue:
Did the Examiner err in finding the cited prior art discloses a method
of managing data, inter alia, “wherein moving the cold data from the SLC
flash memory into the MLC flash memory is performed in response to
detection of the occurrence of the idle time event,” as recited in claim 1?
Principles of Law
Anticipation of a claim under 35 U.S.C. § 102 occurs when each
claimed element and the claimed arrangement or combination of those
elements is disclosed, inherently or expressly, by a single prior art reference.
Therasense, Inc. v. Becton, Dickinson & Co., 593 F.3d 1325, 1332 (Fed. Cir.

3 Because we agree with at least one of the dispositive arguments advanced
by Appellant, we need not reach the merits of Appellant’s other arguments.
See Beloit Corp. v. Valmet Oy, 742 F.2d 1421, 1423 (Fed. Cir. 1984)
(finding an administrative agency is at liberty to reach a decision based on “a
single dispositive issue”).
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2010). A reference inherently discloses an element of a claim “if that
missing characteristic is necessarily present, or inherent, in the single
anticipating reference.” Schering Corp. v. Geneva Pharms., 339 F.3d 1373,
1377 (Fed. Cir. 2003) (citation omitted) (emphasis added). “Inherency,
however, may not be established by probabilities or possibilities. The mere
fact that a certain thing may result from a given set of circumstances is not
sufficient.” Therasense, 593 F.3d at 1332 (citing Cont’l Can Co. USA, Inc.
v. Monsanto Co., 948 F.2d 1264, 1269 (Fed. Cir. 1991)).
During prosecution, claims must be given their broadest reasonable
interpretation when reading claim language in light of the specification as it
would be interpreted by one of ordinary skill in the art. In re Am. Acad. of
Sci. Tech. Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004). Under this standard,
we interpret claim terms using “the broadest reasonable meaning of the
words in their ordinary usage as they would be understood by one of
ordinary skill in the art, taking into account whatever enlightenment by way
of definitions or otherwise that may be afforded by the written description
contained in the applicant’s specification.” In re Morris, 127 F.3d 1048,
1054 (Fed. Cir. 1997).
Analysis
Appellant argues, “Garratt does not teach moving cold data from SLC
flash memory into MLC flash memory in response to detection of the
occurrence of an idle time event.” Appeal Br. 13 (emphasis omitted).
Appellant further argues:
There is no detecting occurrence of any idle time event as
recited in claim 1 mentioned anywhere in this cited section.
Rather, Garratt explains that the Garratt methods do not require
participation by a user or operating system. For example, as
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Application 14/751,507
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mentioned elsewhere in Garratt, mapping and/or re-mapping are
performed upon receipt of write requests from a host process or
host system (e.g., see Fig. 1, ref 102 and column 2, lines 11-14
of Garratt). If mapping (or re-mapping) are performed upon
receipt of write requests from a host process or host system,
such activity cannot be in response to detecting occurrence of
an idle time event as required by claim 1.
Appeal Br. 14.
The Examiner cites Garratt’s background environment without user or
operating system involvement, as disclosing the recited “idle time event” in
claim 1. Final Act. 3 (citing Garratt Col. 5, ll. 46–49). The Examiner
further finds:
Garratt is disclosing that methods 100, 300, 400 and 500 are
performed during a time when background operations are being
performed, which in turn is a time when the user/OS is
inactive/idle and does not need to be involved. Further the
claim does not explicitly state what the idle time event is or
what must actually be idle. . . .
As stated in the paragraph directly above, the methods 100,
300, 400 and 500, which include the operations used by the
Examiner throughout the office action to reject the claim
language including remapping, are performed in a background
environment without user or operating system involvement.
Ans. 3.
Appellant argues “Here, the Examiner's Answer is clearly in error
since methods 100, 300, and 400 involve receiving write requests. That is,
the operations of methods 100, 300, and 400 that Garratt performs are in
response to receiving write requests, not in response to detection of the
occurrence of the idle time event.” Reply Br. 5.
We are persuaded the Examiner’s findings are in error. While the
Examiner’s claim construction is broad, we conclude it is unreasonable in
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Application 14/751,507
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light of the Specification, discussed above, and in consideration of the
specific disclosure of Garratt, which is directed to selectively mapping
higher-usage addresses to higher-endurance memory cells (and lower-usage
addresses to lower-endurance memory cells) of a flash memory, (Garratt
(Abstract)), but does not disclose moving data in response to the detection of
the occurrence of an idle time event, i.e., detection of a lack of I/O
operations. Appellant’s Specification describes idle time as when the
controller 52 is not performing I/O operations, but instead performs low
priority or background data placement operations. Spec. 9. Appellant’s
Specification further describes that the controller detects idle time events.
Id. We further agree with Appellant’s argument that Garratt’s methods 100,
300, and 400 involve receiving write requests, which we determine are I/O
operations.
We find the Examiner’s claim interpretation of the disputed limitation
“wherein moving the cold data from the SLC flash memory into the MLC
flash memory is performed in response to detection of the occurrence of the
idle time event” is not consistent with Appellant’s Specification. Our
reviewing Court guides:
The correct inquiry in giving a claim term its broadest
reasonable interpretation in light of the specification is not
whether the specification proscribes or precludes some broad
reading of the claim term adopted by the examiner.
[Moreover,] it is not simply an interpretation that is not
inconsistent with the specification. It is an interpretation that
corresponds with what and how the inventor describes his
invention in the specification, i.e., an interpretation that is
“consistent with the specification.”
In re Smith Int'l, Inc., 871 F.3d 1375, 1382–83 (Fed. Cir 2017). “Construing
individual words of a claim without considering the context in which those
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Application 14/751,507
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words appear is simply not ‘reasonable.’” Trivascular, Inc. v. Samuels, 812
F.3d 1056, 1062 (Fed. Cir. 2016).
Therefore, based upon the findings above, on this record, we are
persuaded of at least one error in the Examiner’s reliance on the cited prior
art to disclose the dispositive limitation of claim 1, such that we find error in
the Examiner’s resulting finding of anticipation.
Accordingly, we do not sustain the Examiner’s anticipation rejection
of independent claim 1, nor do we sustain the anticipation rejection of
independent claims 14 and 20 which recite the dispositive limitation in
commensurate form. For the same reasons, we also do not sustain the
Examiner’s anticipation Rejection R1 of dependent claims 3, 5, 6, and 12,
which variously depend from independent claim 1.
2. Obviousness Rejections R2–R4 of Claims 7–11, 13, 16–19, and 21–23
In light of our reversal of anticipation Rejection R1 of independent
claims 1, 14, and 20, supra, we also reverse obviousness Rejections R2
through R4 under § 103 of claims 7–11, 13, 16–19, and 21–23, which
variously and ultimately depend from independent claims 1, 14, and 20. On
this record, the Examiner has not shown how the additionally cited
Henderson and Pittelko references overcome the aforementioned
deficiencies with Garratt, as discussed above regarding claim 1.

Appeal 2019-002762
Application 14/751,507
9
CONCLUSIONS
(1) The Examiner erred with respect to anticipation Rejection R1 of
claims 1, 3, 5, 6, 12, 14 and 20 under 35 U.S.C. § 102(a)(2), and we do not
sustain the rejection.
(2) The Examiner erred with respect to obviousness Rejections R2
through R4 of claims 7–11, 13, 16–19, and 21–23 under 35 U.S.C. § 103(a)
over the cited prior art combinations of record, and we do not sustain the
rejections.
DECISION SUMMARY
Claims
Rejected
35 U.S.C.
§
Basis /
References Affirmed Reversed
1, 3, 5, 6,
12, 14, 20 102(a)(2)
Anticipation
Garratt
1, 3, 5, 6,
12, 14, 20
7–11, 13,
16–19 103
Obviousness
Garratt and
Pittelko
7–11, 13, 16–19
21 103
Obviousness
Garratt and
Henderson

21
22, 23 103
Obviousness
Garratt,
Henderson and
Pittelko

22, 23
Overall
Outcome
1, 3, 5–14,
16–23
REVERSED