Edward Fuergut et al.

Patent Trials and Appeals Board

Sep 2, 2020

2019000207 (P.T.A.B. Sep. 2, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/256,640 09/05/2016 Edward FUERGUT 2013P51353 US01 9106
30499 7590 09/02/2020
CLIFFORD B. PERRY
270 N. El Camino Real
No. F-347
ENCINITAS, CA 92024
EXAMINER
TAYLOR, EARL N
ART UNIT PAPER NUMBER
2896
MAIL DATE DELIVERY MODE
09/02/2020 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte EDWARD FUERGUT and MANFRED MENGEL
Appeal 2019-000207
Application 15/256,640
Technology Center 2800
Before LINDA M. GAUDETTE, RAE LYNN P. GUEST, and LILAN REN,
Administrative Patent Judges.
GUEST, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the
Examiner’s decision to reject claims 1–7 and 10–15.2 We have jurisdiction
under 35 U.S.C. § 6(b).

1 We use the word “Appellant” to refer to “applicant” as defined in 37
C.F.R. § 1.42. Appellant identifies the real party in interest as Infineon
Technologies AG. Appeal Br. 3.
2 The Examiner has indicated that pending claims 8 and 9 include allowable
subject matter but stand objected to due to their dependency upon rejected
claims. Final Act. 2, 11.
Appeal 2019-000207
Application 15/256,640
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We AFFIRM.3
CLAIMED SUBJECT MATTER
The claims on appeal are directed to a method for manufacturing an
electronic semiconductor package comprising an encapsulated electronic
chip. See Appeal Br. 16, Claim App’x, Claim 1. According to the
Specification, providing a discontinuity in the encapsulation structure and
filling the discontinuity with a thermal interface structure (1) reduces
electrical current leakage, due to the improved adhesion of the thermal
interface structure to the encapsulation structure with increased contact
surfaces and an increased path length over which the leaked current has to
travel, and (2) improves reliability under mechanical and electrical stress.
Spec. 3:9–4:10. Claim 1, reproduced below, is illustrative of the claimed
subject matter:
1. Method for manufacturing an electronic semiconductor
package, wherein the method comprises:
coupling an electronic chip to a carrier;
encapsulating the electronic chip at least partially and
encapsulating the carrier partially by an encapsulation structure
having a discontinuity;
covering at least a part of the discontinuity and a volume
connected thereto, which adjoins an exposed surface section of
the carrier, with an electrically insulating thermal interface
structure, which electrically decouples at least a part of the
carrier with respect to a surrounding.

3 In our Decision, we refer to the Specification (“Spec.”) filed Sept. 5, 2016;
the Final Office Action dated Sept. 19, 2017 (“Final Act.”); the Appeal Brief
filed Apr. 13, 2018 (“Appeal Br.”); the Examiner’s Answer dated Aug. 7,
2018 (“Ans.”); and the Reply Brief filed Oct. 7, 2018 (“Reply Br.”).
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Application 15/256,640
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REFERENCES
The prior art relied upon by the Examiner is:
Name Reference Date
Endo US 4,950,427 Aug. 21, 1990
Sun et al. US 2011/0049704 Al Mar. 3, 2011
Chau et al. US 8,404,520 Bl Mar. 26, 2013
Kachi et al.4 JP 04-299848 A Oct. 23, 1992
Tabuchi5 JP 09-153576 A Oct. 6, 1997
REJECTIONS
1. Claims 1, 2, 10–15 are rejected under 35 U.S.C. § 103 as being
unpatentable over Endo in view of Tabuchi.
2. Claims 3 and 4 are rejected under 35 U.S.C. § 103 as being
unpatentable over Endo in view of Tabuchi and further in view of
Kachi.
3. Claims 5–7 are rejected under 35 U.S.C. § 103 as being
unpatentable over Endo in view of Tabuchi and further in view of
Chau.
4. Alternatively, claims 5 and 7 are rejected under 35 U.S.C. § 103 as
being unpatentable over Endo in view of Tabuchi and further in
view of Sun.
OPINION
We review the appealed rejections for error based upon the issues
identified by Appellant and in light of the arguments and evidence produced
thereon. Ex parte Frye, 94 USPQ2d 1072, 1075 (BPAI 2010) (precedential),

4 The Examiner and Appellant refer to the Figures of the Japanese references
as well as the English language abstract of record.
5 The Examiner and Appellant refer to the Figures of the Japanese reference
as well as the English language computer translation of record.
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Application 15/256,640
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cited with approval in In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011)
(“[I]t has long been the Board’s practice to require an applicant to identify
the alleged error in the [E]xaminer’s rejections.”). After considering the
evidence presented in this Appeal and each of Appellant’s arguments, we
affirm the Examiner’s decision to reject the claims on appeal.
Appellant presents separate arguments for claim 1, as representative
of all of the claims on appeal, and for claims 3 and 4 as a group. For claims
5–7, Appellant presents substantially identical arguments to those made for
claims 3 and 4 under separate heading. Accordingly, we select claims 1 and
3 as representative claims in addressing Appellant’s arguments.
Claim 1
With respect to claim 1, Appellant contends that Endo teaches away
from the modification argued by the Examiner because Endo is directed
towards an improved chip having an entirely different structure than the
prior art embodiment relied upon in the Examiner’s rejection (compare
Figure 1B (prior art), with Figure 2B). Appeal Br. 10–11. According to
Appellant, the Examiner’s proposed modification “would compromise the
intended high frequency performance of the transistor package” of Endo and
“the compromise in performance accompanying such an arrangement would
result in the transistor package not being useful for its intended purpose.”
Id. at 11.
The Examiner explains that the rejection relies on modifying the prior
art Figure 1B teaching in Endo and “the Tabuchi reference having the
discontinuity for the mold and heat sink to improve the prior art device
structure of Fig. 1A and 1B connection in a different way than the
improvement Endo made with the device structure of Fig. 2A and 2B.” Ans.
2 (emphasis added). According to the Examiner, Figure 1B of Endo is “an
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enabled and functional device even without the improvement the Endo
makes” and Appellant has not shown the prior art structure to be inoperable
or that the proposed modification would change the principle of operation of
the device of Figure 1B. Id. at 3.
In response, Appellant asserts that the Examiner’s reasoning is
“speculative” and that a rejection must not “compromise . . . the stated
intended goal of the reference” as the skilled artisan “would [not] adopt such
a modification at the expense of the intended goal.” Reply Br. 3.
Appellant’s argument is not persuasive of error in the Examiner’s
rejection. The Supreme Court has made clear that “any need or problem
known in the field of endeavor at the time of invention and addressed by the
patent can provide a reason for combining the elements in the manner
claimed.” KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 420 (2007)
(emphasis added). In this case, the Examiner relied on the specific problem
and solution taught in Tabuchi and determined that a skilled artisan would
understand its relevance to the prior art structure taught by Endo. Final Act.
6; Ans. 3.
We consider all the teachings of Endo. Panduit Corp. v. Dennison
Mfg. Co., 810 F.2d 1561, 1568 (Fed. Cir. 1987) (“[A] prior patent must be
considered in its entirety, i.e., as a whole, including portions that would lead
away from the invention in suit.”). Yet, review of Endo indicates that the
improvement shown in Figure 2B, as noted by the Appellant (see Reply Br.
3–4), is specifically for “[s]ome circuits [that] require use of the transistor
devices with a small feedback capacitance Cob” such as “a high frequency
output circuit, e.g., an ultra-fine video signal output circuit.” Endo, col. 1, ll.
54–57. We note the claims on appeal are not limited to any particular
electronic semiconductor package use, and particularly not to those
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semiconductors used for a high frequency output circuit or a circuit requiring
any particular feedback capacitance. Appellant directs us to no evidence of
record that the prior art “conventional bi-polar transistor,” taught in Figure
1B of Endo (see Endo, col. 1, ll. 10–11, col. 3, ll. 13–16), would not have
been a suitable transistor for a variety of non-high frequency output circuits,
which are encompassed within the broad scope of the recited electronic
semiconductor package of claim 1. See Ans. 3 (“[T]he prior art structure of
Fig. 1A and 1B in the Endo reference is an enabled and functional device
even without the improvement that Endo makes with the structure of Fig. 2A
and 2B.”). Thus, the additional teachings of Endo, while an interesting
technological advance for transistors used in a particular way, is not
particularly relevant to and does not teach away from the claimed invention,
in light of the broader scope of Appellant’s claim 1.
We agree with the Examiner (see Ans. 3) that the skilled artisan
would have recognized improvements, such as those taught by Tabuchi, to a
Figure 1B conventional circuit for more conventional uses. “[T]he question
is whether there is something in the prior art as a whole to suggest the
desirability, and thus the obviousness, of making the combination,” not
whether there is something in the prior art as a whole to suggest that the
combination is the most desirable combination available. In re Fulton, 391
F.3d 1195, 1200 (Fed. Cir. 2004). Accordingly, the Examiner has provided
a sufficient reason the skilled artisan would have modified a conventional
transistor, taught by Figure 1B of Endo, with discontinuities in its
encapsulation filled by a thermal interface structure as taught by Tabuchi,
“in order to establish an improved mechanical connection between the
encapsulation and the heat dissipation element.” Final Act. 6; Ans. 3.

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Claim 3
Appellant argues that the Examiner has not provided a reason for the
skilled artisan “to modify the manufacturing method of Endo ’427 in the
manner argue[d] by the Examiner” because such modification “does not
appear to have been necessitated by any problem described in Endo ’427.”
Appeal Br. 12; see also id. at 13, 14 (applying the same argument to claims
5–7).
We do not find these arguments persuasive for the reasons set forth by
the Examiner in the Final Rejection and the Answer. See Final Act. 8; Ans.
4–6. As is quite clear in the Final Office Action (Final Act. 8), which is
quoted in the Answer (see Ans. 4–6),6 the Examiner’s rejection is based on
modifying the teachings of Endo in combination with Tabuchi in light of the
lack of teaching in Tabuchi as to precisely how the discontinuity in the
encapsulation is achieve therein. We agree with the Examiner that the
skilled artisan would have looked to known methods of forming
discontinuities in chip encapsulations, such as those taught by Kachi (or
Chau or Sun).
CONCLUSION
The Examiner’s rejections are affirmed.

6 Accordingly, we are also not persuaded by Appellant’s argument that the
Examiner failed to present an articulated reason as to why the claims were
obvious during prosecution. See Reply Br. 4.
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Application 15/256,640
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DECISION SUMMARY
In summary:
Claims
Rejected
35
U.S.C. §
Reference(s)/Basis Affirmed Reversed
1, 2, 10–15 103 Endo/Tabuchi 1, 2, 10–15
3, 4 103 Endo/Tabuchi/Kachi 3, 4
5–7 103 Endo/Tabuchi/Chau 5–7
5, 7 103 Endo/Tabuchi/Sun 5, 7
Overall
Outcome
1–7, 10–15

TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).
AFFIRMED