DSSD, Inc.

Patent Trials and Appeals Board

Aug 4, 2020

2019000795 (P.T.A.B. Aug. 4, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/087,445 03/31/2016 Jeffrey S. Bonwick 170360-000407US 4781
125568 7590 08/04/2020
DSSD/CHWWA
Two Allen Center
1200 Smith Street, 14th Floor
Houston, TX 77002
EXAMINER
DUNCAN, MARC M
ART UNIT PAPER NUMBER
2113
NOTIFICATION DATE DELIVERY MODE
08/04/2020 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
Dossa.IP@chamberlainlaw.com
patents@chamberlainlaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte JEFFREY S. BONWICK
Appeal 2019-000795
Application 15/087,445
Technology Center 2100
Before BRADLEY W. BAUMEISTER, MICHAEL J. STRAUSS and
CHARLES J. BOUDREAU, Administrative Patent Judges.
STRAUSS, Administrative Patent Judge.
DECISION ON APPEAL1
Appellant2 appeals under 35 U.S.C. § 134(a) from the Examiner’s
final rejection of claims 30–49, which constitute all of the pending claims.
Appeal Br. 7. These claims stand rejected under 35 U.S.C. § 101 as being
directed to a judicial exception to patent-eligible subject matter (an abstract
idea) without significantly more (Final Act. 2–4) and on the ground of

1 We refer to the Specification, filed March 31, 2016 (“Spec.”); Final Office
Action, mailed February 14, 2018 (“Final Act.”); Appeal Brief, filed July 10,
2018 (“Appeal Br.”); and the Examiner’s Answer, mailed September 10,
2018 (“Ans.”).
2 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R.
§ 1.42. Appellant identifies the real party in interest as EMC IP HOLDING
COMPANY LLC. Appeal Br. 4.
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nonstatutory double patenting (id. at 4–12). Appellant only presents
argument contesting the rejection under 35 U.S.C. § 101 (Appeal Br. 7–19),
holding in abeyance the double patenting rejections (id. at 19). We have
jurisdiction under 35 U.S.C. § 6(b). We AFFIRM.

STANDARD OF REVIEW
The Board conducts a limited de novo review of the appealed
rejections for error based upon the issues identified by Appellant, and in
light of the arguments and evidence produced thereon. Ex parte Frye,
94 USPQ2d 1072, 1075 (BPAI 2010) (precedential).

CLAIMED SUBJECT MATTER
Appellant describes the present invention as follows:
A method for storing data. The method includes receiving
data to write to persistent storage, calculating parity values for a
grid using the data, where each of the parity values is associated
with one selected from of the Row Q Parity Group, the Row P
Parity Group, the Column Q Parity Group, the Column P Parity
Group, and the Intersection Parity Group. The method further
includes writing the data to a data grid in the persistent storage,
where the data grid is part of the grid, and writing the parity
values for the grid to a portion of the grid, where the portion of
the grid comprises physical locations associated with a Row Q
Parity Group, a Row P Parity Group, a Column Q Parity Group,
a Column P Parity Group, and an Intersection Parity Group,
wherein the portion of the grid is distinct from the data grid.
Abstract.
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Independent claim 30, representative of the appealed claims,3 is
reproduced below with paragraph designators added for clarity and emphasis
added to language found to recite an abstract idea:
30. A non-transitory computer readable medium comprising
instructions, which when executed perform a method for storing
data, the method comprising:
[(a)] receiving the data to write to persistent storage;
[(b)] calculating parity values for a grid using the data, wherein
the grid comprises a Row Q Parity Group, a Row P Parity
Group, a Column Q Parity Group, a Column P Parity
Group, and an Intersection Parity Group, wherein each of
the parity values is associated with one selected from a
group consisting of the Row Q Parity Group, the Row P
Parity Group, the Column Q Parity Group, the Column P
Parity Group, and the Intersection Parity Group, and
wherein the parity values associated with the Intersection
Parity Group are calculated using the parity values from
at least one selected from a group consisting of the Row Q
Parity Group, the Row P Parity Group, the Column Q
Parity Group, and the Column P Parity Group;
[(c)] writing the data to a data grid in the persistent storage,
wherein the data grid is part of the grid; and
[(d)] writing the parity values for the grid to a portion of the
grid, wherein the portion of the grid comprises physical
locations associated with the Row Q Parity Group, the Row
P Parity Group, the Column Q Parity Group, the Column
P Parity Group, and the Intersection Parity Group,

3 Appellant argues all of the claims together as a group. Appeal Br. 7 (“For
the purpose of this Appeal, claims 30–49 stand or fall together. Independent
claim 30 is representative of the group including claims 30–49.”)
Accordingly, we likewise select independent claim 30 as representative. See
37 C.F.R. § 41.37(c)(1)(iv) (“When multiple claims subject to the same
ground of rejection are argued as a group or subgroup by appellant, the
Board may select a single claim from the group or subgroup and may decide
the appeal as to the ground of rejection with respect to the group or subgroup
on the basis of the selected claim alone.”).
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wherein the portion of the grid is distinct from the data
grid.
Appeal Br. 21 (Claims Appendix).

REJECTION UNDER 35 U.S.C. § 101
The Examiner’s Determinations
The Examiner determines that the claims are directed to, inter alia,
“computing parity values for a set of incoming data and then writing the data
and computed parity values to storage.” Final Act. 3. The Examiner equates
the method to the concepts of “collecting data, encoding data, and storing
data,” concepts found to correspond to abstract ideas. Id. at 3–4 (citing
Recognicorp , LLC v. Nintendo Co., Ltd., 855 F.3d 1322 (Fed. Cir. 2017),
Content Extraction & Transmission LLC v. Wells Fargo Bank, Nat’l Ass’n,
776 F.3d 1343, 1347 (Fed. Cir. 2014)). The Examiner further determines
that the claims do not add any meaningful limitations to the abstract idea
because the additional elements were “generic, conventional computer
elements . . . that perform generic computer functions.” Id. at 4.
Appellant presents various arguments. Appeal Br. 7–19. We address
these arguments individually in the Analysis section, below.
Principles of Law
A. SECTION 101
Inventions for a “new and useful process, machine, manufacture, or
composition of matter” generally constitute patent-eligible subject matter.
35 U.S.C. § 101. However, the U.S. Supreme Court has long interpreted
35 U.S.C. § 101 to include implicit exceptions: “[l]aws of nature, natural
phenomena, and abstract ideas” are not patentable. Alice Corp. v. CLS Bank
Int’l, 573 U.S. 208, 216 (2014).
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In determining whether a claim falls within an excluded category, we
are guided by the Court’s two-step framework, described in Mayo
Collaborative Services v. Prometheus Laboratories, Inc., 566 U.S. 66
(2012), and Alice. Alice, 573 U.S. at 217–18 (citing Mayo, 566 U.S. at 75–
77). In accordance with that framework, we first determine what concept
the claim is “directed to.” See Alice, 573 U.S. at 219 (“On their face, the
claims before us are drawn to the concept of intermediated settlement, i.e.,
the use of a third party to mitigate settlement risk.”); see also Bilski v.
Kappos, 561 U.S. 593, 611 (2010) (“Claims 1 and 4 in petitioners’
application explain the basic concept of hedging, or protecting against
risk.”).
Concepts determined to be abstract ideas, and thus patent ineligible,
include certain methods of organizing human activity, such as fundamental
economic practices (Alice, 573 U.S. at 219–20; Bilski, 561 U.S. at 611);
mathematical formulas (Parker v. Flook, 437 U.S. 584, 594–95 (1978)); and
mental processes (Gottschalk v. Benson, 409 U.S. 63, 67 (1972)). Concepts
determined to be patent eligible include physical and chemical processes,
such as “molding rubber products” (Diamond v. Diehr, 450 U.S. 175, 191
(1981)); “tanning, dyeing, making water-proof cloth, vulcanizing India
rubber, smelting ores” (id. at 182 n.7 (quoting Corning v. Burden, 56 U.S.
252, 267–68 (1853))); and manufacturing flour (Benson, 409 U.S. at 69
(citing Cochrane v. Deener, 94 U.S. 780, 785 (1876))).
In Diehr, the claim at issue recited a mathematical formula, but the
Court held that “a claim drawn to subject matter otherwise statutory does not
become nonstatutory simply because it uses a mathematical formula.”
Diehr, 450 U.S. at 187; see also id. at 191 (“We view respondents’ claims as
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nothing more than a process for molding rubber products and not as an
attempt to patent a mathematical formula.”). Having said that, the Court
also indicated that a claim “seeking patent protection for that formula in the
abstract . . . is not accorded the protection of our patent laws, and this
principle cannot be circumvented by attempting to limit the use of the
formula to a particular technological environment.” Id. at 191 (citing
Benson and Flook); see also, e.g., id. at 187 (“It is now commonplace that an
application of a law of nature or mathematical formula to a known structure
or process may well be deserving of patent protection.”).
If the claim is “directed to” an abstract idea, we turn to the second
step of the Alice and Mayo framework, where “we must examine the
elements of the claim to determine whether it contains an ‘inventive
concept’ sufficient to ‘transform’ the claimed abstract idea into a patent-
eligible application.” Alice, 573 U.S. at 221 (internal quotation marks
omitted). “A claim that recites an abstract idea must include ‘additional
features’ to ensure ‘that the [claim] is more than a drafting effort designed to
monopolize the [abstract idea].’” Id. (alterations in original) (quoting Mayo,
566 U.S. at 77). “[M]erely requir[ing] generic computer implementation[]
fail[s] to transform that abstract idea into a patent-eligible invention.” Id.
B. USPTO SECTION 101 GUIDANCE
In January 2019, the U.S. Patent and Trademark Office (“USPTO”)
published revised guidance on the application of 35 U.S.C. § 101. See
2019 Revised Patent Subject Matter Eligibility Guidance, 84 Fed. Reg. 50
(Jan. 7, 2019) (“2019 Guidance”), updated by USPTO, October 2019
Update: Subject Matter Eligibility (available at https://www.uspto.gov/sites/
default/files/documents/peg_oct_2019_update.pdf) (“October 2019
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Guidance Update”); see also October 2019 Patent Eligibility Guidance
Update, 84 Fed. Reg. 55,942 (Oct. 18, 2019) (notifying the public of the
availability of the October 2019 Guidance Update). “All USPTO personnel
are, as a matter of internal agency management, expected to follow the
guidance.” 2019 Guidance, 84 Fed. Reg. at 51; see also October 2019
Guidance Update at 1.
Under the 2019 Guidance, we first look to whether the claim recites
the following:
(1) any judicial exceptions, including certain groupings of abstract
ideas (i.e., mathematical concepts, certain methods of organizing
human activities such as a fundamental economic practice, or mental
processes); and
(2) additional elements that integrate the judicial exception into a
practical application (see MPEP §§ 2106.05(a)–(c), (e)–(h)).
2019 Guidance, 84 Fed. Reg. at 52–55.
Only if a claim (1) recites a judicial exception and (2) does not
integrate that exception into a practical application, do we then look to
whether the claim:
(3) adds a specific limitation beyond the judicial exception that is not
“well-understood, routine, [and] conventional” in the field (see MPEP
§ 2106.05(d)); or
(4) simply appends well-understood, routine, conventional activities
previously known to the industry, specified at a high level of
generality, to the judicial exception.
2019 Guidance, 84 Fed. Reg. at 56.

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Analysis
STEP 2A, PRONG 1
Under step 2A, prong 1, of the 2019 Guidance, we first look to
whether the claim recites any judicial exceptions, including certain
groupings of abstract ideas (i.e., mathematical concepts, certain methods of
organizing human activities such as a fundamental economic practice, or
mental processes). 2019 Guidance, 84 Fed. Reg. at 52–54.
Limitation (a) recites “receiving the data to write to persistent
storage.” Appeal Br. 20, Claim App’x. Appellant’s Specification indicates
that the receiving step of limitation (a) entails data gathering: “The RAID
grid (200) includes (i) a data grid (202), which includes RAID grid locations
that store data received from the client.” Spec. ¶ 26.
Gathering or receiving data constitutes a mental process, e.g., a mental
observation. The 2019 Guidance recognizes mental processes, including
observations, as constituting a patent-ineligible abstract idea.
2019 Guidance, 84 Fed. Reg. at 52. Accordingly, limitation (a) recites an
abstract idea.
Limitation (b) recites
calculating parity values for a grid using the data, wherein the
grid comprises a Row Q Parity Group, a Row P Parity Group, a
Column Q Parity Group, a Column P Parity Group, and an
Intersection Parity Group, wherein each of the parity values is
associated with one selected from a group consisting of the Row
Q Parity Group, the Row P Parity Group, the Column Q Parity
Group, the Column P Parity Group, and the Intersection Parity
Group, and wherein the parity values associated with the
Intersection Parity Group are calculated using the parity values
from at least one selected from a group consisting of the Row Q
Parity Group, the Row P Parity Group, the Column Q Parity
Group, and the Column P Parity Group.
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Appeal Br. 20, Claim App’x. Appellant’s Specification indicates that these
calculating steps entail implementing parity functions using, for example, a
Reed-Solomon syndrome:
[0037] In one embodiment of the invention, the P parity value is
a Reed-Solomon syndrome and, as such, the P Parity function
may correspond to any function that can generate a Reed-
Solomon syndrome. In one embodiment of the invention, the P
parity function is an XOR function.
[0038] In one embodiment of the invention, the Q parity value is
a Reed-Solomon syndrome and, as such, the Q Parity function
may correspond to any function that can generate a Reed-
Solomon syndrome. In one embodiment of the invention, a Q
parity value is a Reed-Solomon code. In one embodiment of the
invention, Q = g0·D0 + g1·D1 +g2·D2 + . . . + gn-l·Dn-1, where Q
corresponds any one of the Q parity values defined with respect
to FIG. 2, g is a generator of the field, and the value of D
corresponds to the data (which may include both values from the
data grid and/or values from one or more rows or columns that
include P or Q parity values).
Spec. ¶¶ 37–38.
In interpreting limitation (b), we further refer to dictionary definitions
of parity, an example of such definition being as follows:
parity n. The quality of sameness or equivalence, in the case of computers
usually referring to an error-checking procedure in which the number of ls
must always be the same--either even or odd-for each group of bits trans-
mitted without error. If parity is checked on a per-character basis, the
method is called vertical redundancy checking, or VRC; if checked on a
block-by-block basis, the method is called longitudinal redundancy
checking, or LRC. In typical modem-to-modem communications, parity is
one of the parameters that must be agreed upon by sending and receiving
parties before transmission can take place. See the table. See also parity
bit, parity check, parity error.

Table P.1 Types of Parity.
Type Description
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Even parity The number of ls in each successfully
transmitted set of bits must be an even
number.
Odd parity The number of ls in each successfully
transmitted set of bits must be an odd
number.
No parity No parity bit is used.
Space parity A parity bit is used and is always set
to 0.
Mark parity A parity bit is used and is always set
to 1.

parity bit n. An extra bit used in checking for errors in groups of data bits
transferred within or between computer systems. With PCs, the term is
frequently encountered in modem-to-modem communications, in which a
parity bit is often used to check the accuracy with which each character is
transmitted, and in RAM, where a parity bit is often used to check the
accuracy with which each byte is stored.
MICROSOFT COMPUTER DICTIONARY 391 (5th ed. 2002).
Based on the example calculation provided in Appellant’s
Specification and the definitions above, the parity calculations recited by
limitation (b) constitute evaluations that can be performed in the human
mind or with the aid of pencil and paper. The “mental processes” judicial
exception includes concepts that can be performed by a human with a pen
and paper as well as those that can be performed entirely in the mind. See
October 2019 Guidance Update at 9 (“A claim that encompasses a human
performing the step(s) mentally with the aid of a pen and paper recites a
mental process”) (emphasis omitted). Thus, parity value calculating step (b)
constitutes a mental process. The 2019 Guidance recognizes mental
processes, including evaluations, as constituting a patent-ineligible abstract
idea. 2019 Guidance, 84 Fed. Reg. at 52.
Furthermore, calculating parity values, as recited by limitation (b),
also constitutes performing mathematical calculations. This fact is
evidenced by Appellant’s description of calculating the P Parity function
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using an exclusive-OR4 (XOR) operation and calculating the Q Parity value
according to the equation Q = g0·D0 + g1·D1 +g2·D2 + . . .+ gn-l·Dn-1. Spec.
¶ 38. Computing parity values using specified equations, then, constitutes
performing a mathematical concept, such as determining a mathematical
relationship or performing a mathematical calculation. The 2019 Guidance
expressly recognizes mathematical relationships and calculations as
constituting patent-ineligible abstract ideas. 2019 Guidance, 84 Fed. Reg.
at 52. Accordingly, on this additional basis, we further determine that
limitation (b) recites an abstract idea.
Limitation (c) recites, “writing the data to a data grid in the persistent
storage, wherein the data grid is part of the grid.” Limitation (d) recites,
writing the parity values for the grid to a portion of the grid,
wherein the portion of the grid comprises physical locations
associated with the Row Q Parity Group, the Row P Parity
Group, the Column Q Parity Group, the Column P Parity Group,
and the Intersection Parity Group, wherein the portion of the grid
is distinct from the data grid.
Appeal Br. 20, Claim App’x. Writing (i.e., storing) values computed
according to step (b) can be performed in the human mind (e.g.,
remembering calculation results) or with the aid of pencil and paper (e.g.,
recording calculation results on paper). Accordingly, limitations (c) and (d)
recite an abstract idea under the 2019 Guidance. 2019 Guidance, 84 Fed.
Reg. at 52.

4 “exclusive OR n. A Boolean operation that yields ‘true’ if and only if one
of its operands is true and the other is false.” MICROSOFT COMPUTER
DICTIONARY 199.
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For these reasons, each of limitations (a) through (d) recites one or
more judicial exceptions to patent-eligible subject matter under step 2A,
prong 1, of the 2019 Guidance. See RecogniCorp, 855 F.3d at 1327
(“Adding one abstract idea . . . to another abstract idea . . . does not render
the claim non-abstract.”)
STEP 2A, PRONG 2
Under step 2A, prong 2, of the 2019 Guidance, we next analyze
whether claim 30 recites additional elements that individually or in
combination integrate the judicial exception into a practical application.
2019 Guidance, 84 Fed. Reg. at 53–55. The 2019 Guidance identifies
considerations indicative of whether an additional element or combination of
elements integrates the judicial exception into a practical application, such as
an additional element reflecting an improvement in the functioning of a
computer or an improvement to other technology or technical field. Id. at
55; MPEP § 2106.05(a).
As indicated above in reproduced claim 30, the only additional
element beyond the recited abstract ideas is “A non-transitory computer
readable medium comprising instructions, which when executed perform a
method for storing data.” That is, the preamble of claim 1 merely recites
computer code for instructing a computer to perform the abstract ideas
recited by the body of the claim. Nothing in claim 30 reasonably indicates
that anything other than a generic computer needs to be used to carry out the
abstract idea.
Moreover, even if we were to interpret the data-receiving and writing
steps of limitations (a), (c), and (d) narrowly such that the data and parity
values exist in an electronic format and are received and stored by a
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computer or the like, limitations (a), (c), and (d) still would not integrate the
recited abstract ideas into a practical application. Even under such a narrow
interpretation, the steps of limitations (a), (c), and (d) merely would
constitute insignificant extra-solution activity, i.e., pre-solution and post-
solution activities.
An example of pre-solution activity is a step of gathering data for
use in a claimed process, e.g., a step of obtaining information
about credit card transactions, which is recited as part of a
claimed process of analyzing and manipulating the gathered
information by a series of steps in order to detect whether the
transactions were fraudulent.
MPEP § 2106.05(g). As such, even if we consider limitation (a) as reciting
an additional element under prong 2 rather than an abstract idea under prong
1, that limitation at most recites the insignificant extra-solution activity of
gathering data.
As explained in the prong 1 analysis above, limitations (c) and (d)
reasonably can be characterized as reciting a mental process of storing lists
of information. Limitations (c) and (d) additionally can be characterized as
merely being directed to the insignificant extra-solution activity of writing or
storing data. Storing data is merely an insignificant intermediary step
between collecting data and displaying data, both of which courts have held
constitute insignificant extra-solution activity. See, e.g., FairWarning IP,
LLC v. Iatric Sys., Inc., 839 F.3d 1089, 1097–98 (Fed. Cir. 2016). As such,
even if we consider them as an additional elements under prong 2 rather than
as reciting abstract ideas under prong 1, limitations (c) and (d) recite at most
the insignificant extra-solution activity of storing data.
Appellant argues:
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[T]he claims in the instant case improve the functioning of the
computer by increasing the resilience of the data stored in the
persistent storage. More specifically, when data is stored in
persistent storage, due to the nature of the storage medium, some
of the data may become corrupted. See e.g., originally-filed
specification (“Specification”), [0018]-[0019]. When an attempt
is made to retrieve this data, the system may determine that a
portion of the data is corrupted. See e.g., Specification, [0074].
When data (and corresponding parity values) are stored in the
persistent storage in the manner claimed, then the corrupted
portion of the data may be recovered using all or a portion of the
parity values and all or a portion of the non-corrupted data. See
e.g., Specification, FIGS. 8-9D.
Appeal Br. 11.
Appellant’s argument is unpersuasive of reversible Examiner error.
As explained by the Examiner, “Applicant does not claim any particular
process for storing the data, nor does applicant claim any process for
selecting data locations that would describe a particular ‘manner’ of
storing.” Ans. 13. Claim elements (c) and (d) merely store or “write” data
to named areas of persistent storage, i.e., memory. More specifically, data is
written to a portion of memory called a data grid, and parity values are
written to a physical portion of memory distinct from physical locations
storing the data, i.e., distinct from the data grid. Although Appellant’s parity
value naming convention (i.e., names including designations of “row” and
“column”) implies a particular data structure (e.g., a table), none is explicitly
recited. Appellant’s high-level recitation of writing data to storage is devoid
of details about any particular process for writing the data and parity values
to storage, or how the data and values are to be stored.
Appellant also fails to explain adequately why what appears to be a
generic storage process improves computer operations. The increased data
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resilience, argued by Appellant, is not implemented by or a result of
operations performed according to claim 30. Claim 30 only recites the
storage of data that would allow data to be corrected. That is, if a computer
does not use the stored parity values, then computer operations (e.g.,
detection and correction of errors) are not improved. Instead, at most, the
computer performs routine computer operations to implement a
mathematical calculation (e.g., counting how many data bits are set
(i.e., “1’s”) and observing if the last bit of a binary count is a one (odd
parity) or zero (even parity)). However, absent use of this information,
which is not required by claim 30, computer operations are not improved.
Although Appellant argues “the corrupted portion of the data may be
recovered using all or a portion of the parity values and all or a portion of
the non-corrupted data” (id.), claim 30 does not recite the argued step of data
recovery. Merely writing data and parity values to a grid without using the
parity values to detect and correct data error does not improve the
functioning of a computer, as argued. Instead, the argued improvement is to
the underlying abstract concept of calculating parity values rather than to
any “additional elements” beyond the identified mathematical concepts or
mental processes. Thus, we conclude the claim does not integrate the
judicial exception into a practical application.
Appellant further argues
[E]ven assuming arguendo that the pending independent claims
are somehow directed towards “computing parity values for a set
of incoming data and then writing the data and computed parity
values to storage”, there is no risk that the claims will “tie-up”
the excepted subject matter and preempt others from using this
allegedly abstract idea. This alone should be sufficient to deem
the independent claims patent eligible.
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Appeal Br. 13. The Examiner responds, explaining the absence of
preemption does not demonstrate patent-eligibility. Ans. 15 (citing Ariosa
Diagnostics, Inc. v. Sequenom, Inc., 788 F.3d 1371, 1379 (Fed. Cir. 2015))
Appellant’s contention is unpersuasive of reversible Examiner error.
We recognize that the Court has described “the concern that drives this
exclusionary principle [i.e., the exclusion of abstract ideas from patent
eligible subject matter] as one of pre-emption.” Alice, 573 U.S. at 216.
However, characterizing preemption as a driving concern for patent
eligibility is not the same as characterizing preemption as the sole test for
patent eligibility. As our reviewing court has explained: “The Supreme
Court has made clear that the principle of preemption is the basis for the
judicial exceptions to patentability” and “[f]or this reason, questions on
preemption are inherent in and resolved by the § 101 analysis.” Ariosa, 788
F.3d at 1379 (citing Alice, 573 U.S. at 216). Although “preemption may
signal patent ineligible subject matter, the absence of complete preemption
does not demonstrate patent eligibility.” Id.
Appellant’s also contends that the Examiner’s citation to RecogniCorp
is inapposite. Appeal Br. 15. This argument also is unpersuasive.
In RecogniCorp, the claim at issue was “directed to the abstract idea
of encoding and decoding image data.” RecogniCorp, 855 F.3d at 1326.
The court determined a “process that start[s] with data, add[s] an algorithm,
and end[s] with a new form of data [is] directed to an abstract idea.” Id. at
1327. Furthermore, “[A]n inventive concept must be evident in the claims.”
Id. Similar to the claim in RecogniCorp, Appellant’s claim 30 includes
encoding of data in that it receives data and stores it together with parity
information for the data. Thus, claim 30 starts with data, adds an algorithm,
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and ends with a new form of data, as was found patent-ineligible in
RecogniCorp.
Furthermore, contrary to Appellant’s argument and as explained
above, claim 30 does not use the parity value data to identify and correct
data errors, a feature argued by Appellant as providing improved computer
operations. See Appeal Br. 15. Thus, Appellant’s argument that claim 30
improves the ability of the computer to retrieve data and increases the
resilience of data is not commensurate in scope with the claim. See id. at 12,
15. For the same reasons, we are unpersuaded the Examiner’s citation to
Content Extraction5 is inapposite. See Appeal Br. 16–17.
For the reasons discussed above, Appellant does not persuade us that
claim 30 is directed to an improvement in the function of a computer or to
any other technology or technical field. MPEP § 2106.05(a). Nor does
Appellant persuasively demonstrate that claim 30 is directed to a particular
machine or transformation, or that claim 30 adds any other meaningful
limitations for the purposes of the analysis under Section 101. MPEP
§§ 2106.05(b), (c), (e). Accordingly, Appellant does not persuade us that
claim 30 integrates the recited abstract ideas into a practical application
within the meaning of the 2019 Guidance. See 2019 Guidance, 84 Fed.
Reg. at 52–55.
STEP 2B
Under the 2019 Guidance, only if a claim: (1) recites a judicial
exception, and (2) does not integrate that exception into a practical
application, do we then look to whether the claim adds a specific limitation

5 Content Extraction & Transmission LLC v. Wells Fargo Bank, Nat’l Ass’n
776 F.3d 1343 (Fed. Cir. 2014).
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beyond the judicial exception that is not “well-understood, routine,
conventional” in the field (see MPEP § 2106.05(d)); or simply appends
well-understood, routine, conventional activities previously known to the
industry, specified at a high level of generality, to the judicial exception.
The Examiner finds “[t]he instant claims[6] recite generic,
conventional computer elements (persistent storage, a controller, and storage
modules) that perform generic computer functions.” Final Act. 3, Ans. 4.
Appellant’s Specification discloses the invention may be implemented
using a field programmable gate array (FPGA) or any number of alternative
devices including a general-purpose processor. Spec. ¶ 25. Appellant’s
disclosure of a wide range of suitable controllers and the lack of details
describing implementation of the recited functions (such as might have been
indicated by inclusion of a detailed flow chart depicting unconventional
computer operations and/or routines for performing each of the claimed
steps), persuades us that the omitted details are well-understood, routine, and
conventional.
Consistent with guidance provided in the USPTO’s Berkheimer
Memorandum,7 claim 30 merely recites generic computer components (e.g.,
computer devices or “controllers” having memories and processors)
performing generic computing functions that are well-understood, routine,
and conventional (e.g., receiving data, calculating parity values, and storing

6 Although representative claim 30 only recites “[a] non-transitory computer
readable medium,” for completeness, we additionally address hardware
components recited by independent claim 39.
7 Memorandum on Changes in Examination Procedure Pertaining to Subject
Matter Eligibility, Recent Subject Matter Eligibility Decision (Berkheimer v.
HP, Inc.) (Apr. 19, 2018) available at: https://www.uspto.gov/sites/default/
files/documents/memo-berkheimer-20180419.PDF (“Berkheimer Memo”).
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the data and parity values). See Alice, 573 U.S. at 225 (the “use of a
computer to obtain data, adjust account balances, and issue automated
instructions; all of these computer functions are ‘well-understood, routine,
conventional activit[ies]’ previously known to the industry”) (alteration in
original) (quoting Mayo, 566 U.S. at 71–73); see also Benson, 409 U.S. at
65 (noting that a “computer operates then upon both new and previously
stored data. The general-purpose computer is designed to perform operations
under many different programs.”); FairWarning, 839 F.3d at 1096 (noting
that using generic computing components like a microprocessor or user
interface does not transform an otherwise abstract idea into eligible subject
matter); Mortg. Grader, Inc. v. First Choice Loan Servs. Inc., 811 F.3d
1314, 1324–25 (Fed. Cir. 2016) (indicating components such as an
“interface” are generic computer components that do not satisfy the
inventive concept requirement); MPEP § 2106.05(d)(II) (citing Alice and
Mayo); accord Berkheimer Memo 3–4.
For these reasons, we determine that claim 30 does not recite
additional elements that, either individually or as an ordered combination,
amount to significantly more than the judicial exception within the meaning
of the 2019 Guidance. 84 Fed. Reg. at 52–55; MPEP § 2106.05(d).
Accordingly, we sustain the Examiner’s rejection of independent claims 30
and 39 together with the rejection of dependent claims 31–38 and 40–49 that
are not argued separately.

DOUBLE PATENTING REJECTION
In addition to the § 101 rejection, discussed above, several
obviousness double patent rejections also are pending. Final Act. 4–12.
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Appellant requests “the non-statutory double patenting rejections [of claims]
30–49 [be held] in abeyance pending the resolution of the rejection of claims
30–49 under 35 U.S.C. § 101.” Appeal Br. 19. Because Appellant presents
no arguments pertaining to these pending obviousness double patenting
rejections, we summarily sustain these rejections. See MPEP § 1205.02 (“If
a ground of rejection stated by the examiner is not addressed in the
appellant's brief, that ground of rejection will be summarily sustained by the
Board.”).

DECISION
We affirm the Examiner’s decision rejecting claims 30–49 under
35 U.S.C. § 101, as being directed to a judicial exception, without
significantly more.
We summarily affirm the Examiner’s decision rejecting claims 30–36,
39, 44, and 46-49 on the ground of nonstatutory double patenting as being
unpatentable over claims 2 and 6 of US 8,448,021; over claims 2 and 6 of
US 8,316,260; and over claims 2 and 6 of US 8,327,185.
We summarily affirm the Examiner’s decision rejecting claims 37 and
38 on the ground of nonstatutory double patenting as being unpatentable
over claim 2 of US 8,448,021, US 8,316,260, and US 8,327,185 in view of
Stojanovic (2003/0093740 A1, published May 15, 2003).
We summarily affirm the Examiner’s decision rejecting claim 40 on
the ground of nonstatutory double patenting as being unpatentable over
claim 2 of US 8,448,021, US 8,316,260, and 8,327,185 in view of Meehan
(2004/0177219).
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We summarily affirm the Examiner’s decision rejecting claims 41–43
and 45 on the ground of nonstatutory double patenting as being unpatentable
over claim 2 of US 8,448,021, US 8,316,260, and US 8,327,185 in view of
Lubbers (2005/0229023 A1, published Oct. 13, 2005).
In summary:

TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1). See 37 C.F.R.
§ 1.136(a)(1)(iv).

AFFIRMED
Claims Rejected 35 U.S.C. § Basis Affirmed Reversed
30–49 101 Eligibility 30–49
30–49

Non-statutory
Double
Patenting
30–49
Overall
Outcome
30–49