3M INNOVATIVE PROPERTIES COMPANY

Patent Trials and Appeals Board

Jul 2, 2020

2019004901 (P.T.A.B. Jul. 2, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/554,251 08/29/2017 Ravi Palaniswamy 71198US005 9215
32692 7590 07/02/2020
3M INNOVATIVE PROPERTIES COMPANY
PO BOX 33427
ST. PAUL, MN 55133-3427
EXAMINER
SAWYER, STEVEN T
ART UNIT PAPER NUMBER
2847
NOTIFICATION DATE DELIVERY MODE
07/02/2020 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
LegalUSDocketing@mmm.com
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte RAVI PALANISWAMY
Appeal 2019-004901
Application 15/554,251
Technology Center 2800
Before JEFFREY T. SMITH, MONTÉ T. SQUIRE, and
BRIAN D. RANGE, Administrative Patent Judges.

RANGE, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the
Examiner’s decision to reject claims 1–10. We have jurisdiction under
35 U.S.C. § 6(b).
We AFFIRM.

1 We use the word “Appellant” to refer to “applicant” as defined in 37
C.F.R. § 1.42. Appellant identifies the real party in interest as 3M Company
and its affiliate 3M Innovative Properties Company. Appeal Br. 2.
Appeal 2019-004901
Application 15/554,251

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CLAIMED SUBJECT MATTER2
Appellant describes the invention as relating to a multilayer substrate
for a light emitting semiconductor device (LESD). Spec. 1:26–37. In
particular, the invention seeks to address excessive heat buildup that can
deteriorate LESD materials. Id. at 6:13–24. Claims 1 and 10 are the only
independent claims on appeal. Claim 1, which we reproduce below with
emphases added to certain key recitations, is illustrative:
1. A flexible multilayer substrate for attaching a light
emitting semiconductor device comprising:
a first dielectric layer having a first side and a second side;
a plurality of conductive vias extending from the first side
to the second side of the first dielectric layer;
a circuit layer disposed on the second side of the first dielectric
layer in communication with the plurality of conductive vias;
a first thermally conductive layer disposed on the circuit
layer opposite the first dielectric layer;
a discontinuous metal support layer disposed on the first
thermally conductive layer opposite the circuit layer, wherein the
discontinuous metal support layer is electrically continuous and
includes an array of openings extending through the discontinuous
metal support layer; and
a second thermally conductive layer disposed on the
discontinuous metal support layer opposite the first thermally
conductive layer, wherein the second thermally conductive layer is in
contact with the first thermally conductive layer in the openings
through the discontinuous metal support layer.

Appeal Br. 7 (Claim Appendix).

2 In this Decision, we refer to the Final Office Action dated September 6,
2018 (“Final Act.”), the Appeal Brief filed December 27, 2018 (“Appeal
Br.”), the Examiner’s Answer dated April 5, 2019 (“Ans.”), and the Reply
Brief filed June 3, 2019 (“Reply Br.”).
Appeal 2019-004901
Application 15/554,251

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REFERENCES
The Examiner relies upon the prior art below in rejecting the claims
on appeal:
Name Reference Date
Conlon et al.
(“Conlon”)
US 5,035,939 July 30, 1991
Bunyan US 2004/0081843 A1 Apr. 29, 2004
Sunohara US 2009/0139751 A1 June 4, 2009
Park et al.
(“Park”)
US 2013/0075144 A1 Mar. 28, 2013
Kaiya US 2013/0092421 A1 Apr. 18, 2013
Uehara US 2015/0003083 A1 Jan. 1, 2015

REJECTIONS
The Examiner maintains (Ans. 3) the following rejections on appeal:
A. Claims 1, 6, 8, and 10 under 35 U.S.C. § 103 as obvious over Park in
view of Uehara. Final Act. 2.
B. Claims 2 and 7 under 35 U.S.C. § 103 as obvious over Park in view of
Uehara and Conlon. Id. at 6.
C. Claim 3 under 35 U.S.C. § 103 as obvious over Park in view of
Uehara and Bunyan. Id. at 6.
D. Claim 4 under 35 U.S.C. § 103 as obvious over Park in view of
Uehara and Kaiya. Id. at 6.
E. Claims 5 and 9 under 35 U.S.C. § 103 as obvious over Park in view of
Uehara and Sunohara. Id. at 9.

Appeal 2019-004901
Application 15/554,251

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OPINION
We review the appealed rejections for error based upon the issues
identified by Appellant and in light of the arguments and evidence produced
thereon. Ex parte Frye, 94 USPQ2d 1072, 1075 (BPAI 2010) (precedential),
(cited with approval in In re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011)
(“[I]t has long been the Board’s practice to require an applicant to identify
the alleged error in the examiner’s rejections.”)). After considering the
evidence presented in this Appeal and each of Appellant’s arguments, we are
not persuaded that Appellant identifies reversible error. Thus, we affirm the
Examiner’s rejections for the reasons expressed in the Final Office Action
and the Answer. We add the following primarily for emphasis.
The Appellant does not separately argue any claim other than claim 1.
We therefore limit our discussion to claim 1. All other claims stand or fall
with claim 1.
The Examiner finds that Park teaches a multilayer substrate having
claim 1’s recited structure. Appeal Br. 2–3. The Examiner finds that Park’s
“vias shown in dielectric layer 90 having solder S therein” correspond to
claim 1’s “plurality of conductive vias.” Id. at 2. The Examiner finds that
Park teaches “insulating layer 50” as a thermally conductive layer. Id. The
Examiner finds that Park does not teach that its substrate is “for attaching a
light emitting semiconductor device.” Id. at 3. The Examiner finds that
Uehara teaches a multilayer substrate for attaching such a device and
determines it would have been obvious to modify Park as taught by Uehara
to form a lighting feature. Id.
Appellant argues that Park’s solder S is not a conductive via. Appeal
Br. 4. This argument does not identify error in the Examiner’s findings.
Appeal 2019-004901
Application 15/554,251

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Appellant acknowledges that Appellant’s “conductive vias 190 may be filled
metal.” Id. The vias of Park are similarly filled with metal (i.e., solder).
Appellant further argues that solder S does not extend from the first
side of the second side of solder resist layer 90. Appeal Br. 4. With respect to
the first side, Appellant argues that solder S “extends well above the top side
of the solder resist layer.” Appeal Br. 4–5; see also Reply Br. 1. Appellant’s
argument is unpersuasive because the language of claim 1 requires vias
“extending from the first side to the second side of the first dielectric layer.”
Appeal Br. 7 (Claims App.). Claim 1’s language does not prohibit the vias
extending past the first and second sides of the first dielectric layer. Indeed,
Appellant’s Specification indicates that the vias may have a domed surface.
Spec. 5:32–36 (“The via plug can extend from the second side of the first
dielectric layer . . . to a position at or near the first side of the first dielectric
layer and can have a domed surface disposed adjacent to the first side of the
first dielectric layer.”). Park’s solder-filled via is similarly domed.
With respect to the second side, Appellant argues that Park’s solder S
does not extend “down through the entire thickness of solder resist layer 90
[which the Examiner maps to the claim 1’s first dielectric layer].” Appeal
Br. 4–5. Claim 1 does not, however, require the recited via to extend all the
way through the first dielectric layer. Rather, claim 1 requires that the
dielectric layer have a first side and a second side and that the via extend
from the first side to the second side. The Examiner finds that Park’s top
surface of solder resist layer 90 is a first side and the lower edge of the upper
lip of solder resist layer 90 is a second side. Ans. 4 (providing annotated
version of Park Fig. 1). Park’s solder S extends from the Examiner’s
identified first and second sides of layer 90. Id.; see also Park Fig. 1.
Appeal 2019-004901
Application 15/554,251

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Appellant does not persuasively establish error in the Examiner’s findings in
this regard.
Appellant further argues that the Examiner errs in identifying Park’s
“insulating layer 50” as being a “thermally conductive layer” as claim 1
recites. Appeal Br. 5–6. Appellant argues that Park’s electrically insulating
layer is instead “likely to be a poor conductor of heat.” Id. at 5. Claim 1,
however, does not require that the “thermally conductive layer” meet any
particular standard for thermal conductivity. Ans. 5. Moreover, Appellant’s
Specification states that Appellant’s thermally conductive layers “can be any
suitable insulating interface material.” Spec. 6:30–38; see also Ans. 5.
Park’s insulating layer thus falls within the scope of claim 1’s “thermally
conductive layer” recitation.
Because Appellant’s arguments do not identify Examiner error, we
sustain the Examiner’s rejections.

DECISION SUMMARY
In summary:
Claims
Rejected
35 U.S.C. § Reference(s)/Basis Affirmed Reversed
1, 6, 8, 10 103 Park, Uehara 1, 6, 8, 10
2, 7 103 2, 7
3 103 3
4 103 4
5, 9 103 5, 9
Overall
Outcome
1–10

Appeal 2019-004901
Application 15/554,251

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TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).

AFFIRMED