Hewlett Packard Enterprise Development LPDownload PDFPatent Trials and Appeals BoardJun 2, 20212020004475 (P.T.A.B. Jun. 2, 2021) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 16/121,570 09/04/2018 Christopher Allan Poirier 90647707 8090 56436 7590 06/02/2021 Hewlett Packard Enterprise 3404 E. Harmony Road Mail Stop 79 Fort Collins, CO 80528 EXAMINER CHENG, DIANA ART UNIT PAPER NUMBER 2849 NOTIFICATION DATE DELIVERY MODE 06/02/2021 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): chris.mania@hpe.com hpe.ip.mail@hpe.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte CHRISTOPHER ALLAN POIRIER, RYAN BARNHILL, and DACHENG ZHOU Appeal 2020-004475 Application 16/121,570 Technology Center 2800 Before N. WHITNEY WILSON, BRIAN D. RANGE, and SHELDON M. McGEE, Administrative Patent Judges. RANGE, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the Examiner’s decision to reject claims 1–19 and 21. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE the prior art rejections and AFFIRM the double patenting rejections, leaving all claims rejected. 1 “Appellant” refers to “applicant” as defined in 37 C.F.R. § 1.42. Appellant identifies the real party in interest as Hewlett Packard Enterprise Development LP. Appeal Br. 1. Appeal 2020-004475 Application 16/121,570 2 CLAIMED SUBJECT MATTER2 Appellant describes the invention as relating to set-reset (“SR”) latch circuits that may reduce input-to-output propagation delays. Spec. ¶ 18. Claim 1 is illustrative, and we reproduce it below while emphasizing key recitations: 1. A circuit, comprising: an inverter storage loop for storing state information; first and second p-channel field-effect transistors (PFETs) connected to a first node of the inverter storage loop; and third and fourth PFETs connected to a second node of the inverter storage loop; wherein gate terminals of the first and fourth PFETs are connected to a first control input, and gate terminals of the second and third PFETs are connected to a second control input. Appeal Br. 17. The other two independent claims on appeal, claims 14 and 17, similarly require first and fourth field-effect transistors connected to different nodes of an inverter storage loop and connected to a first control input. Id. at 20–21. 2 In this Decision, we refer to the Final Office Action dated July 5, 2019 (“Final Act.”), the Appeal Brief filed December 9, 2019 (“Appeal Br.”), the Examiner’s Answer dated March 31, 2020 (“Ans.”), and the Reply Brief filed May 29, 2020 (“Reply Br.”). Appeal 2020-004475 Application 16/121,570 3 REFERENCES The Examiner relies upon the prior art below in rejecting the claims on appeal: Name Reference Date Zhang et al. (“Zhang”) US 8,058,901 B2 Nov. 15, 2011 Lovitt US 9,628,055 B1 Apr. 18, 2017 Poirier et al. (“Poirier ’150”) US 10,075,150 B2 Sept. 11, 2018 REJECTIONS The Examiner maintains (Ans. 3) the following rejections on appeal: A. Claims 1–19 and 21 on the ground of nonstatutory double patenting as unpatentable over claims 1–9 and 11–19 of Poirier ’150. Final Act. 3.3 B. Claims 1–3, 7, 8, 14, and 17 under 35 U.S.C. § 102(a)(1) as anticipated by Zhang. Id. at 5. C. Claims 4, 5, 9, 15, 16, and 21 under 35 U.S.C. § 103 as obvious over Zhang in view of Lovitt. Id. at 7. D. Claims 6, 18, and 19 under 35 U.S.C. § 103 as obvious over Zhang and under the reasoning of In re Thorpe, 777 F.2d 695, 698 (Fed. Cir. 1985). Id. at 10. 3 The Examiner’s nonstatutory double patenting rejection refers to claims 1– 9 and 12–20 and separately refers to claims 10 and 11. Final Act. 3–4. Claim 20, however, has been cancelled. The Office Action Summary indicates that claims 1–9, 14–19, and 21 are rejected (i.e., not claims 10–13). While unclear, it appears on this record that the Examiner intended to reject claims 1–19 and 21 based upon obviousness type double patenting. In the event of further prosecution, the Examiner and Appellant may wish to clarify. Appeal 2020-004475 Application 16/121,570 4 OPINION Rejection A. The Examiner rejects Claims 1–19 and 21 on the ground of nonstatutory double patenting as unpatentable over claims 1–9 and 11–19 of Poirier ’150. Final Act. 3. The Examiner rejects claims 10 and 11 as claiming the same invention as claims 1 and 10 of Poirier ’150. Id. at 4. Appellant does not address either double patenting rejection, and we therefore summarily sustain the rejections. Rejection B. The Examiner rejects Claims 1–3, 7, 8, 14, and 17 under 35 U.S.C. § 102(a)(1) as anticipated by Zhang. Final Act 5. To resolve the issues before us on appeal, we focus on the Examiner’s findings and determinations that relate to the error Appellant alleges. Because we decide this appeal based on limitations recited, in substance, by each independent claim, we focus our analysis on claim 1. This analysis is equally applicable to each of the independent claims and, by extension, all of the dependent claims. The Examiner finds that Zhang teaches that its first and fourth PFETs (M1A and M1B, respectively) “are connected to a first control input (CK and CKB are connected to M1A and M1B, respectively; where CKB is inverted CK).” Final Act. 5. Appellant argues that CK and CKB are not the same signal and therefore cannot be “one control input (i.e., a first control input).” Appeal Br. 11. The Examiner responds by emphasizing that “CK generates both CK and CKB” so that the first and fourth PFETs “are both connected to a first control input CK.” Ans. 4. The Examiner further emphasizes that “the gate of M1A is connected to the first control input CK; the gate of M1B is connected to the first control input CK, inverted (for example, by an inverter) (CKB).” Id. Appeal 2020-004475 Application 16/121,570 5 Appellant’s argument persuades us of reversible error. Claim 1 cannot be reasonably construed so broadly that it would encompass Zhang’s configuration that inputs different signals to the first and fourth PFETs simultaneously. Claim 1 and the Specification’s context indicate that a single “first control input” must provide input to the first and fourth PFETs. Claims 14 and 17 are similar in this regard. If the “first control input” passes through an inverter prior to reaching the fourth PFET (as in Zhang), there would no longer be an identical “first control input” providing input to both the “first and fourth PFETs.” This interpretation of Appellant’s claims is consistent with the Specification because the Specification’s embodiments illustrate first and fourth PFETs being controlled by an identical first control input. See, e.g., Fig. 1 (showing identical control input sx connected to PFETs 120 and 150); see also Spec. ¶¶ 28–32 (explaining operation based on a control input being asserted high or low such that PFETs 120 and 150 may, for example, be “turned on and conducting” simultaneously). Because the Examiner fails to adequately establish a “first and fourth PFETs are connected to a first control input” (and similar recitations for independent claims 14 and 17), we do not sustain this rejection. Rejection C. The Examiner rejects claims 4, 5, 9, 15, 16, and 21 under 35 U.S.C. § 103 as being unpatentable over Zhang (as stated for claim 1) in further view of Lovitt. Final Act. 7.4 4 Although this rejection only addresses dependent claims, we assess Appellant’s arguments regarding this rejection because, due to the factual nature of this rejection, the Examiner’s explanation of this rejection could possibly cure the error we identify above with regard to the independent claims if the rejection were sustained. Appeal 2020-004475 Application 16/121,570 6 Claim 4 recites, for example, that “the first control input is a Set control input.” Appeal Br. 17 (Claims App.). The Examiner finds that Zhang does not explicitly disclose that the first control input is a Set control input. Final Act. 7. The Examiner finds that Lovitt teaches a set and reset latch similar to the latch of Zhang’s Figure 1A. Id. The Examiner determines that “[i]t would have been obvious to use the set and reset inputs of Lovitt in place of D and DB inputs of Zhang et al., for the purpose of working ‘independently of control signals and relies only on the state of the S and R inputs.’” Ans. 8 (quoting Lovitt 1:11–12). Appellant argues that the Examiner’s proposed combination of Zhang and Lovitt would improperly change Zhang’s principle of operation. Appeal Br. 14–15. We agree with Appellant that, on this record, the Examiner has not adequately explained the rationale for combining the teachings of Zhang and Lovitt. As we explain above with regard to Rejection B, Zhang teaches that different inputs (CK and the inversion of CK, CKB) should be applied to what the Examiner identifies as the first and fourth PFETs. Zhang Fig. 1A, 3:43–47. The Examiner’s stated reason to combine the references’ teachings (Final Act. 8; Ans. 8–9) does not persuasively address why a person of skill in the art would have modified Zhang so that an identical input would be applied to the first and fourth PFETs. We, thus, do not sustain this rejection. Rejection D. This rejection applies to dependent claims 6, 18, and 19, and the Examiner’s statement of this rejection does not cure the error addressed above. Final Act. 10. We, thus, do not sustain this rejection. Appeal 2020-004475 Application 16/121,570 7 DECISION SUMMARY In summary: Claim(s) Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 1–19, 21 Nonstatutory Double Patenting Poirier ’150 1–19, 21 1–3, 7, 8, 14, 17 102(a)(1) Zhang 1–3, 7, 8, 14, 17 4, 5, 9, 15, 16, 21 103 Zhang, Lovitt 4, 5, 9, 15, 16, 21 6, 18, 19 103 Zhang 6, 18, 19 Overall Outcome 1–19, 21 TIME PERIOD FOR RESPONSE No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED Copy with citationCopy as parenthetical citation