Hewlett-Packard Development Company, L.P.

Patent Trials and Appeals Board

Mar 8, 2021

2019005977 (P.T.A.B. Mar. 8, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/521,760 04/25/2017 Andrew David BODLEY 84618606 2395
22879 7590 03/08/2021
HP Inc.
3390 E. Harmony Road
Mail Stop 35
Fort Collins, CO 80528-9544
EXAMINER
WONG, TITUS
ART UNIT PAPER NUMBER
2185
NOTIFICATION DATE DELIVERY MODE
03/08/2021 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
ipa.mail@hp.com
jessica.pazdan@hp.com
yvonne.bailey@hp.com
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
________________

Ex parte ANDREW DAVID BODLEY,
BYRON A. ALCORN, and SHANE WARD
________________

Appeal 2019-005977
Application 15/521,760
Technology Center 2100
________________

Before BRADLEY W. BAUMEISTER, JASON V. MORGAN, and
MICHAEL J. STRAUSS, Administrative Patent Judges.

MORGAN, Administrative Patent Judge.

DECISION ON APPEAL
STATEMENT OF THE CASE
Pursuant to 35 U.S.C. § 134(a), Appellant1 appeals from the
Examiner’s decision to reject claims 1–20. We have jurisdiction under 35
U.S.C. § 6(b).
We reverse and enter a new ground of rejection.

1 “Appellant” refers to “applicant” as defined in 37 C.F.R. § 1.42. Appellant
identifies the real party in interest as Hewlett-Packard Development
Company, L.P., a wholly-owned affiliate of HP Inc. with HPQ Holdings,
LLC, as the general or managing partner. Appeal Br. 2.
Appeal 2019-005977
Application 15/521,760

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SUMMARY OF THE DISCLOSURE
Appellant’s claimed subject matter relates to establishing a high speed
connection between a system and an apparatus through use of an adapter that
facilitates concatenating functionality of first and second connectors to the
system. Abstract.
EXEMPLARY CLAIM
(disputed limitations emphasized and bracketing added)
1. An apparatus comprising:
a first connector to connect with a first interface of a system;
a second connector to connect with a second interface of the
system; and
an adapter controller to:
[1] combine functionality of the first connector and the
second connector when the apparatus is communicatively
coupled to the system via the first connector and the
second connector; and
[2] establish a high speed connection between the system
and a single peripheral connector of the apparatus via
the combined functionality of the first connector and the
second connector.
REFERENCE
The Examiner relies on the following prior art:
Name Reference Date
Douglas et al. (“Douglas”) US 2013/0335430 A1 Dec. 19, 2013
REJECTION
The Examiner rejects claims 1–20 under 35 U.S.C. § 102(a)(1) as
anticipated by Douglas.
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ANALYSIS
The Specification illustrates an adapter controller, as recited in
claim 1, in Figure 1, which is reproduced below.

The Specification’s Figure 1 is a block diagram depicting connection
adapter 110 connecting peripheral device 130 to computing platform 120.
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Peripheral connection 160 connects connection adapter 110 to peripheral
device 130. Connection adapter 110 is connected to first platform connector
126 of computing platform 120 through first connection 140 and to second
platform connector 128 of computing platform 120 through second
connection 150. This configuration facilitates a high speed connection
between peripheral device 130 and computing platform 120 by combining
the information transfer capabilities of first connection 140 and second
connection 150. Spec. ¶ 19.
The Examiner relies on Douglas—which discloses a housing to adapt
a graphics port to support communication of peripheral information—to
disclose an adapter controller to [1] “combine functionality of the first
connector and the second connector” and [2] “establish a high speed
connection between the system and a single peripheral connector of the
apparatus via the combined functionality of the first connector and the
second connector.” Final Act. 3 (citing Douglas ¶¶ 18, 22, Fig. 2); Ans. 3–4.
Appellant contends the Examiner errs because “Douglas addresses
connecting peripherals, such as a mouse or webcam, to a display device for a
computer, rather than to the computer directly.” Appeal Br. 11. Appellant
notes that Douglas “provides for a communication channel for the
peripheral(s) within a display cable between the display device and the host
computer.” Reply Br. 6. Thus, Appellant argues that, unlike the claimed
connection of a single peripheral through two combined connectors to a host
computer system, “Douglas describes that two peripherals (the display
device and mouse/webcam/etc.) share a single connection to the host
computer system.” Id. at 8.
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Appellant’s contentions accord with the Douglas, which discloses a
switching device interfaced with the graphics connector [that]
selectively adapts the auxiliary link and data lines [of the
display cable] to communicate peripheral information between
the display and the information handling systems, such as video
from [a] webcam, inputs from a mouse, or information from a
transceiver connected as a peripheral to [a] display.
Douglas ¶ 9.
The portions of Douglas the Examiner cites teach that “[s]witching
device 50 communicates peripheral information over display cable 12 in
several ways” (Douglas ¶ 18) and that “[h]ousing 52 adapts an existing
graphics port to support communication of peripheral information by adding
the capabilities for supporting selection of protocols” by disposing
peripheral ports 58 in the housing “so that peripheral . . . information [can be
sent] through a display cable” (id. ¶ 22). Thus, instead of teaching
combining connector functionality to establish a high speed connection, the
cited portions of Douglas teach an adapter that enables multiple peripherals
to communicate over a display cable. Therefore, we agree with Appellant
that the Examiner’s findings do not show that Douglas discloses disputed
recitations [1] and [2].
Accordingly, we do not sustain the Examiner’s 35 U.S.C. § 102(a)(1)
rejection of claim 1, or claims 2–20, which have corresponding recitations.
NEW GROUND OF REJECTION
Although we do not sustain the Examiner’s anticipation rejection
based on Douglas, we newly reject claims 1, 9, and 13 as anticipated by
Bhanu Prakash Reddy Tholeti, Chapter 16: Hypervisors, Virtualization, and
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Networking, 392–93, in HANDBOOK OF FIBER OPTIC DATA COMMUN-
ICATIONS, available at https://www.sciencedirect.com/topics/computer-
science/link-aggregation (Casimer DeCusatis ed., 4th ed. 2014) (“Tholeti”).
Specifically, Tholeti teaches a link aggregation, or EtherChannel, device,
that
is a network port-aggregation technology that allows several
Ethernet adapters to be aggregated. The adapters can then act as
a single Ethernet device. Link aggregation helps to provide
more throughput over a single IP address than would be
possible with a single Ethernet adapter.
For example, ent0 and ent1 can be aggregated to ent3.
The system considers these aggregated adapters as one adapter,
and all adapters in the link aggregation device are given the
same hardware address, so they are treated by remote systems
as if they are one adapter.
Link aggregation can help provide more redundancy
because individual links might fail, and the link aggregation
device will fail over to another adapter in the device to maintain
connectivity. For example, in the previous example, if ent0
fails, the packets are automatically sent on the next available
adapter, ent1, without disruption to existing user connections.
ent0 automatically returns to service on the link aggregation
device when it recovers.
Tholeti 392–93.
This passage shows that Tholeti teaches a first connector (adapter
ent0) to connect with a first interface of a system; a second connector
(adapter ent1) to connect with a second interface of the system; and an
adapter controller (link aggregation device) to combine functionality of the
first connector and the second connector when the apparatus is
communicatively coupled to the system via the first connector and the
second connector (to aggregate ent0 and ent1 to ent3) and establish a high
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speed connection between the system and a single peripheral connector of
the apparatus via the combined functionality of the first connector and the
second connector (to provide more throughput over a single IP address than
would be possible with a single Ethernet adapter). We note for completeness
and clarity that the recitations “to connect with a first interface of a system”
and “to connect with a second interface of the system” are intended use
recitations—the system having the first and second interfaces is not part of
the claimed apparatus itself.
Accordingly, we newly reject claim 1 under 35 U.S.C. § 102(a)(1) as
anticipated by Tholeti. Claims 9 and 13, respectively directed to a method
and a non-transitory computer readable storage medium, contain
corresponding recitations. Therefore, we similarly reject claims 9 and 13
under 35 U.S.C. § 102(a)(1) as anticipated by Tholeti.
We are primarily a body of review. Therefore, we leave it to the
Examiner to ascertain whether the claims that depend from independent
claims 1, 9, and 13 should also be newly rejected in light of the teachings of
Tholeti. We further suggest the Examiner review IEEE Standard for
Information Technology – Local and Metropolitan Area Networks – Part 3:
Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access
Method and Physical Layer Specifications-Aggregation of Multiple Link
Segments, in IEEE Std 802.3ad-2000, available at https://ieeexplore.ieee.org/
document/850426 (June 28, 2000). This standard provides detailed teachings
regarding link aggregation that may be pertinent to whether the additional
claimed inventions are anticipated or obvious.

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CONCLUSION
Claim(s)
Rejected
35 U.S.C. §

Reference(s)/Basis

Affirmed

Reversed

New
Ground
1–20 102(a)(1) Douglas 1–20
1, 9, 13 102(a)(1) Tholeti 1, 9, 13
Overall
Outcome
1–20 1, 9, 13
TIME PERIOD FOR RESPONSE
No time period for taking subsequent action in connection with this
appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).
37 C.F.R. § 41.50(b) also provides that the Appellant, WITHIN TWO
MONTHS FROM THE DATE OF THE DECISION, must exercise one of
the following two options with respect to the new ground of rejection to
avoid termination of the appeal as to the rejected claims:
(1) Reopen prosecution. Submit an appropriate amendment of
the claims so rejected or new Evidence relating to the claims so
rejected, or both, and have the matter reconsidered by the
examiner, in which event the prosecution will be remanded to
the examiner. . . .
(2) Request rehearing. Request that the proceeding be reheard
under § 41.52 by the Board upon the same Record. . . .
Further guidance on responding to a new ground of rejection can be
found in the Manual of Patent Examining Procedure § 1214.01.
REVERSED
37 C.F.R. § 41.50(b)