Ex Parte Zhong et alDownload PDFBoard of Patent Appeals and InterferencesApr 23, 200910029829 (B.P.A.I. Apr. 23, 2009) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE ________________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ________________ Ex parte ZHUN ZHONG and YINGWEI CHEN ________________ Appeal 2009-0095 Application 10/029,829 Technology Center 2600 ________________ Decided: April 23, 2009 ________________ Before KENNETH W. HAIRSTON, JOHN A. JEFFERY, and THOMAS S. HAHN, Administrative Patent Judges. HAIRSTON, Administrative Patent Judge. DECISION ON APPEAL Appeal 2009-0095 Application 10/029,829 2 Appellants appeal under 35 U.S.C. § 134 from a final rejection of claims 1 to 21. We have jurisdiction under 35 U.S.C. § 6(b). We will reverse the rejections. Appellants have invented a method and system for adjusting the encoding complexity of an encoder based on a comparison of a fullness level of a buffer with a predetermined threshold range. If the fullness level of the buffer is higher than an upper threshold limit, then the complexity of the encoder is lowered. On the other hand, if the fullness level of the buffer is lower than a lower threshold limit, then the complexity of the encoder is increased (Figs. 1, 2; Spec. 3, 4, 11, 12; Abstract). Claim 1 is representative of the claims on appeal, and it reads as follows: 1. A method for encoding a stream of data blocks using a scalable encoder, the method comprising: receiving a stream of data blocks; storing said received data blocks in an input buffer; encoding a first sequence of said stored data blocks from said input buffer to produce a first encoded data block; monitoring the fullness level of said input buffer for comparison with a predetermined threshold range to yield an outcome of said comparison; and adjusting the complexity of said encoder based on said outcome. The prior art relied upon by the Examiner in rejecting the claims on appeal is: Iwahashi US 5,197,087 Mar. 23, 1993 Ishiyama US 2001/0008544 A1 Jul. 19, 2001 Appeal 2009-0095 Application 10/029,829 3 The Examiner rejected claims 1 to 6, 8 to 15, and 17 to 21 under 35 U.S.C. § 102(b) based upon the teachings of Iwahashi. The Examiner rejected claims 7 and 16 under 35 U.S.C. § 103(a) based upon the teachings of Iwahashi and Ishiyama. ISSUES Anticipation Appellants argue (Br. 9) that “Iwahashi fails to teach controlling the complexity of an encoder based on the fullness of an input buffer.” Thus, the issue before us is: Have Appellants shown that the Examiner erred by finding that Iwahashi describes a method and system for controlling the complexity of an encoder based on the fullness of an input buffer? Obviousness Appellants argue (Br. 7) that Iwahashi does not teach adjusting the complexity of an encoder based on a comparison of a fullness level of an input buffer and a predetermined threshold, and that Ishiyama does not cure such a deficiency in the teachings of Iwahashi. Thus, the issue before us is: Have Appellants shown that Iwahashi and the feedback disclosure of Ishiyama neither teach nor would have suggested the claimed subject matter? FINDINGS OF FACT 1. Iwahashi describes a method and apparatus that controls the amount of data to be encoded by encoder 10 by monitoring the energy levels of two input buffers 11 and 12 (Fig. 1). When comparator 15 determines that the Appeal 2009-0095 Application 10/029,829 4 difference between the energy level of buffer 11 and the energy level of buffer 12 is small, an output from the comparator 15 turns switch 16 on so that the data from the buffer memories 11 and 12 are supplied simultaneously to the orthogonal converting circuit/encoder 17 (col. 4, ll. 30 to 35). When the comparator 15 determines that the difference between the energy level of buffer 11 and the energy level of buffer 12 is large, an output from the comparator 15 turns switch 16 off so that only the data from the buffer 12 is supplied to the orthogonal converting circuit/encoder 17 (col. 4, ll. 46 to 50). 2. Ishiyama was cited by the Examiner for the teachings of “storing of the encoded data blocks in a memory medium 40 for subsequent retrieval; and processing feedback information 105 from encoder 2 after producing the first encoded data block” (Ans. 4). PRINCIPLES OF LAW Anticipation Anticipation is established when a single prior art reference discloses expressly or under the principles of inherency each and every limitation of the claimed invention. Atlas Powder Co. v. IRECO Inc., 190 F.3d 1342, 1347 (Fed. Cir. 1999); In re Paulsen, 30 F.3d 1475, 1478-79 (Fed. Cir. 1994). Obviousness The Examiner bears the initial burden of presenting a prima facie case of obviousness, and Appellants have the burden of presenting a rebuttal to the prima facie case. In re Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992). Appeal 2009-0095 Application 10/029,829 5 ANALYSIS Anticipation As indicated supra (FF 1), Iwahashi is concerned with a comparison of the energy levels of the data that resides in the two input buffers 11 and 12. Iwahashi is silent as to determining the “fullness” of the energy levels in the two input buffers, let alone comparing buffer “fullness” with a predetermined threshold range to adjust encoder complexity as claimed. Thus, we agree with Appellants’ argument (Br. 9) that “Iwahashi fails to teach controlling the complexity of an encoder based on the fullness of an input buffer.” It follows that anticipation has not been established by the Examiner because Iwahashi does not disclose each and every limitation of the claimed invention set forth in claims 1 to 6, 8 to 15, and 17 to 21. See Atlas Powder, 190 F.3d at 1347; see also Paulsen, 30 F.3d at 1478-79. Obviousness A prima facie case of obviousness of the claimed subject matter set forth in dependent claims 7 and 16 has not been established by the Examiner because the teachings of the reference to Ishiyama fail to cure the noted shortcomings in the teachings of Iwahashi. See Oetiker, 977 F.2d at 1445. CONCLUSIONS OF LAW Anticipation Appellants have demonstrated that the Examiner erred by finding that Iwahashi describes a method and system for controlling the complexity of an encoder based on the fullness of an input buffer. Appeal 2009-0095 Application 10/029,829 6 Obviousness Appellants have demonstrated that the Examiner erred by finding that the applied references teach or would have suggested the claimed subject matter. ORDER The decision of the Examiner rejecting claims 1 to 6, 8 to 15, and 17 to 21 under 35 U.S.C. § 102(b) is reversed, and the decision of the Examiner rejecting claims 7 and 16 under 35 U.S.C. § 103(a) is reversed. REVERSED babc PHILIPS INTELLECTUAL PROPERTY & STANDARDS P.O. BOX 3001 BRIARCLIFF MANOR NY 10510 Copy with citationCopy as parenthetical citation