Ex Parte Yuan et al

Patent Trial and Appeal Board

Jul 5, 2016

12843693 (P.T.A.B. Jul. 5, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
12/843,693 07/26/2010
43859 7590 07/07/2016
SLATER MATSIL, LLP
17950 PRESTON ROAD, SUITE 1000
DALLAS, TX 75252
FIRST NAMED INVENTOR
Feng Yuan
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
TSM09-0531 6647
EXAMINER
GOODWIN, DAVID J
ART UNIT PAPER NUMBER
2817
NOTIFICATION DATE DELIVERY MODE
07/07/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
docketing@slatermatsil.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte FENG YUAN, TSUNG-LIN LEE, HUNG-MING CHEN, and
CHANG-YUN CHANG
Appeal2014-003006
Application 12/843,693
Technology Center 2800
Before ADRIENE LEPIANE HANLON, CATHERINE Q. TIMM, and
JAMES C. HOUSEL, Administrative Patent Judges.
HOUSEL, Administrative Patent Judge.
DECISION ON APPEAL 1
A. STATEMENT OF THE CASE
Pursuant to 35 U.S.C. § 134(a), Appellants2 appeal from the
Examiner's decision finally rejecting under 35 U.S.C. § 103(a) claims 10,
1 Our decision refers to the Specification (Spec.) filed July 26, 2010,
Appellants' Appeal Brief (App. Br.) filed June 24, 2013, the Examiner's
Answer (Ans.) mailed November 7, 2013, and Appellants' Reply Brief
(Reply Br.) filed January 2, 2014.
2 According to Appellants, the real party in interest is Taiwan
Semiconductor Manufacturing Co., Ltd. App. Br. 3.
Appeal2014-003006
Application 12/843,693
14, 17, and 18 as unpatentable over Horita3 in view of Draeger4 and Gu; 5
claim 19 as unpatentable adding Miyoshi. 6 We have jurisdiction over the
appeal under 35 U.S.C. § 6(b).
We AFFIRM.
The invention relates to methods of manufacturing an integrated
circuit structure, particularly a Fin field effect transistor (FinFET). Spec. i-f
3. Appellants disclose that a conventional FinFET includes a plurality of
semiconductor fins separated by shallow trenches filled with dielectric
material which are recessed to provide a profile where the center portion
between the fins is lower than portions close to the fins (a "smiling profile").
Id. at i-f 4--5. According to Appellants, a parasitic capacitance is generated
between the gate of the FinFET and the fins that adversely affects the
performance of the integrated circuit. Id. at i-f 6. To solve this problem,
Appellants disclose providing the recessed dielectric material between the
fins with a divot profile having a center portion higher than the portions
close to the fins. Id. at i-f 26.
Claim 10, reproduced below from the Claims Appendix to Appellants'
Appeal Brief, is illustrative of the subject matter on appeal. The limitations
at issue are italicized.
10. A method of forming an integrated circuit structure, the method
compnsmg:
forming a plurality of shallow-trench isolation (STI) regions in
a silicon substrate;
3 Horita et al., US 6,399 ,985 B2, issued June 4, 2002 ("Horita").
4 Draeger et al., US 8,058, 179 B 1, issued November 15, 2011 ("Draeger").
5 Gu et al., US 6,893,937 Bl, issued May 17, 2005 ("Gu").
6 Miyoshi, US 6,479,369 Bl, issued November 12, 2002.
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Application 12/843,693
removing top portions of the plurality of STI regions using HF
and NH3 as process gases to form a first silicon fin and a second
silicon fin, wherein the first silicon fin and the second silicon fin are
horizontally between, and above, remaining lower portions of the
plurality of S TI regions, and wherein one of the plurality of S TI
regions (an intermediate STI region) is between and contacting the
first silicon fin and the second silicon fin and has a divot top surface,
with the highest point of a top surface of the intermediate STI region
being close to a middle line between the first silicon fin and the
second silicon fin, and lower than top surfaces of the first and the
second silicon fins; and
forming a FinFET comprising:
forming a gate dielectric on top surfaces and sidewalls of
the first silicon fin and the second silicon fin; and
forming a gate electrode on the gate dielectric, wherein
the gate electrode extends from directly over the first silicon fin
to directly over the second silicon fin.
B. DISCUSSION
The Examiner found Horita discloses a method of forming an
integrated circuit structure substantially as claimed, except for using HF and
ammonia (NH3) as process gases to form the silicon fins where the top of the
intermediate STI region is lower than the tops of the fins. Final 2-3. The
Examiner found Draeger teaches use of HF and ammonia as the etching
process gas for etching oxide. Id. at 3. In addition, the Examiner found Gu
teaches etching trench isolation regions and silicon fins such that the top
surface of trench isolation regions is below the top surface of the fins. Id.
The Examiner concluded it would have been obvious to use HF and
ammonia as the etch process gases in Horita because the etch is self-limiting
and prevents over etching as taught by Draeger. Id. The Examiner also
concluded it would have been obvious to recess the top surface of the trench
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Application 12/843,693
isolation region in Horita in order to make space for subsequent layers as
taught by Gu. Id.
Appellants contend that Horita teaches away from being combined
with Gu. Appeal Br. 8. In particular, Appellants assert that Horita teaches
that when the groove portions GP are formed, the trench isolation oxide film
should not be etched down entirely, which may otherwise cause
irregularities in the gate electrode to be formed on the first and second
silicon fins PP 1, PP2. Id. at 9. As a result, Appellants argue that Horita
discredits and, therefore, teaches away from having the top surfaces of the
trench isolation oxide film recessed below the top surfaces of the fins when
the divots are formed. Id.
Further, Appellants argue that Horita's Figure 7 teaches the trench
isolation oxide film recessed below the top surfaces of the fins, but does not
have any divot. Appeal Br. 11. Appellants also argue that Horita's Figure
13 does not teach "the highest point of a top surface of the intermediate STI
region being ... lower than top surfaces of the first and the second silicon
fins." Appeal Br. 8 (emphasis omitted). As such, Appellants assert that
"Horita does not have any single embodiment teaching all claim elements in
claim 10." Appeal Br. 11. Moreover, Appellants urge that Horita teaches
away from combining Figure 7 with Figure 13, as indicated above. Appeal
Br. 11-12.
Appellants' arguments fail to persuade us of reversible error in the
Examiner's obviousness rejection. "A reference may be said to teach away
when a person of ordinary skill, upon reading the reference, would be
discouraged from following the path set out in the reference, or would be led
in a direction divergent from the path that was taken by the applicant." In re
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Gurley, 27 F.3d 551, 553 (Fed. Cir. 1994). Further, references in a
combination may be said to teach away where their combined teachings
would produce a "seemingly inoperative device". See In re Sponnoble, 405
F.2d 578, 587 (CCPA 1969). Teaching an alternative or equivalent method,
however, does not teach away from the use of a claimed method. See In re
Dunn, 349 F.2d 433, 438 (CCP A 1965).
Moreover, "[a]lthough a reference that teaches away is a significant
factor to be considered in determining unobviousness, the nature of the
teaching is highly relevant, and must be weighed in substance." Gurley. For
instance, when there is nothing within the reference teaching that the
claimed element should not, or cannot, be used, and further cited prior art
teaches the propriety of employing the missing element, the teachings of
both reference must be weighed together. Para-Ordnance Mfg., Inc. v. SGS
Importers Int'!, Inc., 73 F.3d 1085, 1090 (Fed. Cir. 1995).
Here, Horita teaches that where the trench is entirely dug, instead of
employing the groove portions (divots), irregularities may take place in the
surface of the gate electrode due to a step between the trench isolation oxide
film and the active region. Horita, col. 10, 11. 27-33. This teaching is not a
teaching away from further digging the trench isolation oxide film, but a
recognition that doing so may allow irregularities to form in the surface of
the gate electrode and overlying layers. In addition, in the modification
proposed by the Examiner, the trench isolation oxide film is not being etched
down entirely ("entirely dug" as in Horita Fig. 7). Rather, the Examiner is
proposing that the material forming the divot in Horita, Figure 13, is being
etched just below the surface of the silicon fins PPl and PP2 as in Gu, i.e.,
partially dug. There is no disclosure in Horita that teaches the formation of
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irregularities in the surface of the gate electrode and overlying layers where
the trench oxide layer is not entirely dug as shown in Horita, Figure 7.
Indeed, Horita, Figure 13, demonstrates that partial digging of the trench
oxide layer does not result in such irregularities.
Gu teaches a divot top surface is formed by further etching or digging
into the edges of the trench isolation material such that a gap GP is formed
in the material adjacent the upper end of the fin sidewall. Gu, col. 4, 1. 53-
col. 5, 1. 21. As depicted in Gu's Figure 13, such further digging of the
trench isolation oxide film 808 allows small irregularities in the overlying
layer 1304. Gu's teaching supports the Examiner's position that further
digging Horita's trench isolation oxide film 21, 22 in Figure 13 below the
height of the fins was a known alternative to those skilled in the art
notwithstanding the resulting irregularities in the surface of the gate
electrode. Thus weighing the teachings of both Gu and Horita together, one
of ordinary skill in the art would not have been led away or discouraged
from further digging Horita's trench isolation oxide film as taught by Gu.
For the reasons discussed above and for the reasons expressed in the
Final Office Action and the Answer, the Examiner's§ 103(a) rejection of
claim 10 over the combination of Horita, Draeger, and Gu is sustained.
Appellants have not advanced separate arguments for any of claims 14, 17,
and 18. Appeal Br. 10.
In addition, the Examiner rejected claim 19 over the combination of
Horita, Draeger, and Gu, adding Miyoshi for its teaching of a liner. Final
Act. 4. Appellants rely on the same "teaching away" argument asserted
against the rejection of claim 10, further asserting that Miyoshi fails to
remedy this deficiency. Appeal Br. 13. As the "teaching away" argument is
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not persuasive as set forth above, Appellants have not shown the claim 19
obviousness rejection to be deficient.
Therefore, the § 103 (a) rejections of claims 10, 14, and 17-19 is
sustained.
DECISION
Upon consideration of the record, and for the reasons given above and
in the Answer, the decision of the Examiner rejecting claims 10, 14, and
17-19 under 35 U.S.C. § 103(a) as unpatentable over the combination of
Horita, Draeger, and Gu, alone or further in view of Miyoshi, is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l).
AFFIRMED
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