Ex Parte Warnes et al

Patent Trial and Appeal Board

May 2, 2014

11878860 (P.T.A.B. May. 2, 2014)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD

____________

Ex parte LIDIA WARNES, MICHAEL BOZICH CALHOUN,
DENNIS CARR, TEDDY LEE, DAN VU,
and
RICARDO ERNESTO ESPINOZA-IBARRA
____________

Appeal 2011-011228
Application 11/878,860
Technology Center 2100
____________

Before CARLA M. KRIVAK, JEFFREY S. SMITH, and
CATHERINE SHIANG, Administrative Patent Judges.

KRIVAK, Administrative Patent Judge.

DECISION ON APPEAL
Appellants appeal under 35 U.S.C. § 134(a) from a final rejection of
claims 1-8, 10-12, and 14-23. We have jurisdiction under 35 U.S.C. § 6(b).
We reverse.

Appeal 2011-011228
Application 11/878,860

2
STATEMENT OF THE CASE
Appellants’ claimed invention is directed to a memory controller
having one or more DIMM channels coupled thereto. Each DIMM channel
includes one or more DIMMS, and each of the one or more DIMMs includes
at least one rank of DRAM devices. The memory controller is loaded with
programming to test the DIMMs to designate at least one specific rank of
DRAM devices as a spare rank (Abstract).
Claim 1, reproduced below, is representative of the subject matter on
appeal.
1. A system for implementing rank sparing, comprising:

a memory controller; and

one or more DIMM channels coupled to the memory controller,
wherein each DIMM channel comprises one or more DIMMs, wherein each
of the one or more DIMMs comprises at least one rank of DRAM devices,
and wherein the memory controller comprises programming to test all the
DIMMs (ranks) installed in the DIMM channels to designate at least one
specific rank of DRAM devices as a spare rank.

REFERENCE and REJECTION
The Examiner rejected claims 1-8, 10-12, and 14-23 under 35 U.S.C.
§ 102(e) based upon the teachings of Nagaraj (US 2008/0270675 A1,
published Oct. 30, 2008).

ANALYSIS
The Examiner finds Nagaraj teaches all the limitations of Appellants’
claimed invention. The Examiner asserts Appellants have not shown how
Appeal 2011-011228
Application 11/878,860

3
designating a specific rank as claimed is different from the spare memory
locations in Nagaraj (Ans. 12).
We agree with the Examiner Nagaraj’s paragraph [0024] teaches
monitoring in-use memory locations or data errors that have been detected
(Ans. 4, 11). However, the Examiner’s reliance on Nagaraj’s paragraph
[0023] as teaching “specifying the amount of data or the whole rank” to
meet the limitation of “designate at least one specific rank” is unfounded as
paragraph [0023] makes no such assertion (Ans. 12). That is, paragraph
[0023]’s statement “multiple spare regions may be allocated, with each of
these spare regions being located on different rows of the DRAMS” does not
teach testing all DIMMs (ranks) in the DIMM channels “to designate at least
one specific rank of DRAM” as a spare rank, as claimed.
Although the Examiner has pointed to spare memory locations, the
Examiner has not provided where Nagaraj teaches designating at least one
specific rank of DRAM devices as a spare rank. Thus, “Nagaraj’s ‘set of
spare locations’ is not equivalent to, and does not teach, ‘rank sparing’”
(App. Br. 11).
As Nagaraj does not teach every limitation of Appellants’ claimed
invention (all claims were argued together), we are constrained by this
record to find Appellants’ claims not anticipated by Nagaraj. We do not
consider an obviousness rejection as the Examiner did not make such a
rejection.

Appeal 2011-011228
Application 11/878,860

4
DECISION
The Examiner’s decision rejecting claims 1-8, 10-12, and 14-23 under
35 U.S.C. § 102(e) is reversed.

REVERSED

cdc