Ex Parte UEDA

Board of Patent Appeals and Interferences

Jun 30, 2004

08869592 (B.P.A.I. Jun. 30, 2004)

The opinion in support of the decision being entered today was not written for
publication and is not binding precedent of the Board.
Paper No. 26
UNITED STATES PATENT AND TRADEMARK OFFICE
____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________
Ex parte MAMORU UEDA
____________
Appeal No. 2001-2013
Application No. 08/869,592
____________
ON BRIEF
____________
Before KRASS, JERRY SMITH, and GROSS, Administrative Patent
Judges.
GROSS, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on appeal from the examiner's final
rejection of claims 3 through 5 and 10 through 13, which are all
of the claims pending in this application. Claims 1, 2, and 6
through 9 have been canceled.
Appellant's invention relates to a signal processing
apparatus which divides an input signal into a plurality of pixel
blocks, shuffles the blocks, adds header information including
timing and shuffling data to the shuffled blocks, and performs a
DCT process on the shuffled blocks. Claim 10 is illustrative of
the claimed invention, and it reads as follows:
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Application No. 08/869,592
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10. Apparatus for processing a signal, comprising:
a plurality of signal processing circuits, which are
sequentially connected;
at least a first of said plurality of signal processing
circuits including means for dividing and shuffling an input
signal into predetermined units;
at least a second of said plurality of signal processing
circuits including means for adding header information which
includes timing data and shuffling data to each of said
predetermined units of said input signal; and
wherein signal processing circuits succeeding said at least
a second of said plurality of signal processing circuits perform
predetermined signal processing on said predetermined units of
said input signal in accordance with said timing data and said
shuffling data included in said header information contained
therein without regard to processing delays of said signal
processing circuits to generate units of data.
The prior art references of record relied upon by the
examiner in rejecting the appealed claims are:
Gonzales et al. (Gonzales) 5,289,577 Feb. 22, 1994
Smidth et al. (Smidth) 5,301,018 Apr. 05, 1994
(effectively filed Feb. 13, 1991)
Siracusa 5,483,287 Jan. 09, 1996
(effectively filed Jun. 19, 1992)
Claims 12 and 13 stand rejected under 35 U.S.C. § 102(e) as
being anticipated by Smidth.
Claims 3 through 5, 10, and 11 stand rejected under
35 U.S.C. § 103 as being unpatentable over Gonzales in view of
Siracusa and Smidth.
Reference is made to the Examiner's Answer (Paper No. 21,
mailed September 25, 2000) for the examiner's complete reasoning
in support of the rejections, and to appellant's Brief (Paper No.
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Application No. 08/869,592
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20, filed June 29, 2000) and Reply Brief (Paper No. 22, filed
November 29, 2000) for the appellant's arguments thereagainst.
OPINION
We have carefully considered the claims, the applied prior
art references, and the respective positions articulated by
appellant and the examiner. As a consequence of our review, we
will reverse both the anticipation rejection of claims 12 and 13
and also the obviousness rejection of claims 3 through 5, 10, and
11.
Claim 12 recites "means for adding a pixel block number
corresponding to said shuffle address to each of said shuffled
data," and "means for adding said DCT block number to said DCT
data so that said DCT block number will be utilized in a
succeeding signal processing circuit." The examiner, referring
to Smidth, column 9, line 60-column 11, line 15, asserts (Answer,
page 5) that Smidth assigns a block number indicia to each
shuffled block "so that it can be identified and manipulated by
the shuffling equation defining the algorithm." The examiner
(Answer, page 6) points to Smidth's disclosure of an output image
block number c and contends that such disclosure indicates that
the block number is "output to the deshuffling circuit."
Claim 12, however, requires that the block number be added
to the data (to the shuffled data and subsequently to the DCT
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Application No. 08/869,592
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data). Nowhere does Smidth add a block number to the data.
Smidth, using the algorithm at the bottom of column 9, merely
determines the order in which various blocks are selected for
shuffling. Nothing is added to the data.
Similarly, claim 13 requires that the quantization level be
added to the data (both to the coded data and also to the
quantized data). Smidth determines and uses quantizing factors,
but nowhere does Smidth indicate that the quantizing level is
added to the data. Accordingly, we cannot sustain the
anticipation rejection of claims 12 and 13.
Regarding independent claim 10, the examiner admits that
Gonzales fails to disclose shuffling the data and adding timing
and shuffling information in the header. The examiner turns to
Siracusa for including timing information in the header and to
Smidth for shuffling the data. However, although Smidth
discloses shuffling data, Smidth does not disclose or suggest
adding shuffling information to the header. As neither Gonzales
nor Siracusa teaches or suggests adding shuffling information to
the header either, we cannot sustain the rejection of claim 10
and its dependents, claims 3 through 5 and 11.
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CONCLUSION
The decision of the examiner rejecting claims 12 and 13
under 35 U.S.C. § 102 is reversed. The decision of the examiner
rejecting claims 3 through 5, 10, and 11 under 35 U.S.C. § 103 is
likewise reversed.
REVERSED
ERROL A. KRASS )
Administrative Patent Judge )
)
)
)
) BOARD OF PATENT
JERRY SMITH ) APPEALS
Administrative Patent Judge ) AND
) INTERFERENCES
)
)
)
ANITA PELLMAN GROSS )
Administrative Patent Judge )
APG:clm
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