Ex Parte Rice et al

Patent Trial and Appeal Board

Sep 18, 2017

14343396 (P.T.A.B. Sep. 18, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
14/343,396 03/07/2014 Huston W. Rice 83821930 8033
22879
HP Tnr
7590 09/20/2017 EXAMINER
3390 E. Harmony Road
Mail Stop 35
PACHOL, NICHOLAS C
FORT COLLINS, CO 80528-9544 ART UNIT PAPER NUMBER
2672
NOTIFICATION DATE DELIVERY MODE
09/20/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
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PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte HUSTON W. RICE, DAVID B. NOVAK, ERIK D. NESS, and
BRENDAN HALL
Appeal 2017-000351
Application 14/343,396
Technology Center 2600
Before CAROLYN D. THOMAS, JON M. JURGOVAN, and
AARON W. MOORE, Administrative Patent Judges.
THOMAS, Administrative Patent Judge.
DECISION ON APPEAL
Appellants seek our review under 35 U.S.C. § 134(a) of the
Examiner’s Final Rejection of claims 1—7 and 16—27, all the pending claims
in the present application. Claims 8—15 are canceled. See App. Br. 4. We
have jurisdiction over the appeal under 35 U.S.C. § 6(b).
We AFFIRM.
Appeal 2017-000351
Application 14/343,396
The present invention relates generally to an authentication system.
See Abstract.
Claim 1 is illustrative:
1. An authentication system comprising:
a supply device having a data storage chip with
identification (ID) bit memory cells, the ID bit memory cells
comprising;
a measured cell located at a predetermined position
within the data storage chip;
read-only pointer cells factory-programmed to store
predetermined address information that points to the measured cell
within the data storage chip; and
analog cells that store factory-measured analog
information about the measured cell.
Appellants appeal the following rejections:
Rl. Claims 1—7 and 16—27 are rejected under 35 U.S.C. § 101
because the claimed invention is directed to non-statutory subject matter
(Final Act. 3);
R2. Claims 1,6, 16, 17, and 22—26 are rejected under 35 U.S.C.
§ 103(a) as being unpatentable over Yoshida (US 7,042,596 Bl, May 9,
2006), Fernandez (US 6,993,130 Bl, Jan. 31, 2006), and Salisbury (US
2004/0181681 Al, Sept. 16, 2004) (Final Act. 4-12); and
R3. Claims 2—5, 7, 18—21, and 27 are rejected under 35 U.S.C.
§ 103(a) as being unpatentable over Yoshida, Fernandez, Salisbury, and
Wilsher (US 2012/0020678 Al, Jan. 26, 2012) (Final Act. 12-20).
We review the appealed rejections for error based upon the issues
identified by Appellants, and in light of the arguments and evidence
produced thereon. Ex parte Frye, 94 USPQ2d 1072, 1075 (BPAI 2010)
(precedential).
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ANALYSIS
Rejection under §101
Issue 1: Did the Examiner err in finding that the claims are directed
to a judicial exception?
The Supreme Court has identified a two-step framework for
determining whether claimed subject matter is judicially-excepted from
patent eligibility under § 101. Alice Corp. Pty. Ltd. v. CIS Bank
International, 134 S. Ct. 2347, 2355 (2014). According to step one, “we
determine whether the claims at issue are directed to one of those patent-
ineligible concepts,” such as an abstract idea. Alice, 134 S. Ct. at 2355
(citing Mayo Collaborative Servs. v. Prometheus Labs., Inc., 132 S. Ct.
1289, 1296—97 (2012)). The Supreme Court has characterized step two as a
search for an “inventive concept” in the claimed subject matter — that is, an
element or combination of elements “‘sufficient to ensure that the patent in
practice amounts to significantly more than a patent upon the [ineligible
concept] itself.”’ Alice, 134 S. Ct. at 2355 (alteration in original) (quoting
Mayo, 132 S. Ct. at 1294).
Step one: Are the claims directed to an abstract idea?
The Examiner finds that the claims are directed to “the concept of an
abstract idea of parts of a memory that can be used for authentication
purposes . . . [and] the abstract idea per se amount to no more than recitation
of generic computer structure” (Final Act. 3). Specifically, the Examiner
finds that “the [claimed] concept of storing identification information within
memory cells of a supply device . . . [is] similar to ‘comparing new and
stored information and using rules to identify options’” (Ans. 21, citing
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Application 14/343,396
Smartgene, Inc. v. Adv. Biological Labs, SA, 555 F. App’x 950 (Fed. Cir.
2014). The Examiner further finds that “[t]he claim language that is separate
from the abstract idea includes applying this concept to an ink cartridge” and
“implementing] an abstract idea on a computer” (Ans. 21), which “fail to
amount to significantly more than the abstract idea above” (id. at 22). We
agree with the Examiner. We find that the Examiner has provided a
sufficient response supported by a preponderance of evidence (Ans. 20-22).
In the Reply Brief, Appellants contend that “claim 1 of Smartgene
was a medical diagnostic procedure held to be abstract because it was
nothing more than computerizing a mental process which a doctor otherwise
routinely performs in his or her head” (Reply Br. 4). Although Appellants
further contend that “the present application are no way similar to the
medical diagnostic procedure of Smartgene . . . [because the claims]
require[] measuring an electrical characteristic of a memory cell in a
particular physical memory device[,] [i]t can’t possibly be done in a person’s
head . . . [and] is not a mental process at all” (id.), we find that Appellants’
contention is not commensurate in scope with independent claims 1 and 16.
For example, independent claims 1 and 16 (and dependent claims 6
and 22—27) do not require any measuring of an electrical characteristic of a
memory cell, only “a measured cell located at a predetermined position” (see
claim 1). Thus, Appellants’ aforementioned contentions fail to distinguish
claims 1,6, 16, and 22—27 from a mental process.
Although claims 2 and 17 (and claims dependent thereon) recite, inter
alia, “an authentication algorithm . . . to . . . measure the measured cell for
field-measured analog information” (see claim 2), we find that such a
recitation is merely attempting to limit the use of the formula to a particular
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technological environment or adding insignificant post solution activity. See
Bilski v. Kappos, 561 U.S. 593, 610-11 (2010) (citation and internal
quotation marks omitted). The Court in Alice noted that [s]imply
appending conventional steps, specified at a high level of generality,’ was
not ‘enough’ [inMayo] to supply an ‘inventive concept.”’ Alice, 134 S. Ct.
at 2357 (quoting Mayo, 132 S. Ct. at 1300, 1297, 1294). Here, Appellants
merely appended the conventional step of measuring the measured cell for
field-measured analog information to claim 2 (and similarly to claim 17).
As noted by the Examiner, and we agree, “the [claimed] concept of
storing identification information within memory cells of a supply device . . .
[is] similar to ‘comparing new and stored information and using rules to
identify options’” (Ans. 21). Stated differently, information collection and
analysis, including when limited to particular content, is within the realm of
abstract ideas. See, e.g., Elec. Power Grp. LLC v. Alstom S.A., 830 F.3d
1350, 1353 (Fed. Cir. 2016) (holding that “collecting information, analyzing
it, and displaying certain results of the collection and analysis” are “a
familiar class of claims ‘directed to’ a patent-ineligible concept”);
FairWarningIP, LLC v. Iatric Sys., Inc., 839 F.3d 1089, 1093—94 (Fed. Cir.
2016); Internet Patents Corp. v. Active Network, Inc., 790 F.3d 1343, 1349
(Fed. Cir. 2015); Digitech Image Techs., LLC v. Flees, for Imaging, Inc.,
758 F.3d 1344, 1351 (Fed. Cir. 2014). We further note that even if some
physical steps are required to obtain information from the cells (e.g.,
entering a query via a keyboard, clicking a mouse), such data-gathering steps
cannot alone confer patentability. CyberSource Corp. v. Retail Decisions,
Inc., 654 F.3d 1366, 1372 (Fed. Cir. 2011).
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Because the claims are directed to parts of a memory for comparing
new and stored information, an abstract idea, the claims at issue are directed
to patent-ineligible subject matter.
Step two: Is there something else in the claims that ensures that they are
directed to significantly more than a patent-ineligible concept?
To establish a prima facie case, the Examiner must next identify all of
the additional elements in each claim and explain why these elements,
individually or collectively, do not add significantly more than the abstract
idea. Here, the Examiner finds that the claims “amount to no more than
recitation of generic computer structure that serves to perform generic
computer functions that are well-understood, routine, and conventional
activities” (Final Act. 3). We agree with the Examiner.
“A claim that recites an abstract idea must include ‘additional
features’ to ensure ‘that the [claim] is more than a drafting effort designed to
monopolize the [abstract idea].”’ Alice, 134 S. Ct. at 2357 (brackets in
original) (quoting Mayo, 132 S. Ct. at 1297). The prohibition against
patenting an abstract idea “cannot be circumvented by attempting to limit the
use of the formula to a particular technological environment or adding
insignificant post-solution activity.” Bilski v. Kappos, 561 U.S. at 610-11
(citation and internal quotation marks omitted). The recitation in claim 1
pertaining to memory cells are analogous to a conventional memory, and
the recitation in claim 2 pertaining to “a controller” are analogous to the
recitation of a conventional “computer” discussed in Alice.
Additionally, as recognized by the Federal Circuit in Ultramercial,
Inc. v. Hulu, LLC, 772 F.3d 709, 716 (Fed. Cir. 2014), Bilski’s “machine-or-
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transformation” (MoT) test can also provide a ‘“useful clue’” in the second
step of the Alice framework. See Bilski, 561 U.S. at 611. Under Bilski’s
MoT test, a claimed process can be considered patent-eligible under § 101 if:
(1) “it is tied to a particular machine or apparatus”; or (2) “it transforms a
particular article into a different state or thing.” Bilski, 545 F.3d 943, 954
(Fed. Cir. 2008) (citing Gottschalk, 409 U.S. at 70, 93 S. Ct. 253).
At best, Appellants rebuttal to step two merely highlight that “the
claims recite three distinct classes of memory cells . . . [and] how these three
classes of cells are interrelated” (see App. Br. 7). However, we agree with
the Examiner that the claims simply incorporate generic components, i.e., a
memory and a computing device, to perform the abstract concept of storing
identification information within memory cells of a supply device.
As recognized by the Supreme Court, “the mere recitation of a generic
computer cannot transform a patent-ineligible abstract idea into a patent-
eligible invention.” See Alice, 134 S. Ct. at 2359 (concluding claims
“simply instructing] the practitioner to implement the abstract idea of
intermediated settlement on a generic computer” not patent eligible).
Limiting the aforementioned abstract concept to generic components, such
as a computing device and memory, does not make the abstract concept
patent-eligible under 35 U.S.C. § 101. Because Appellants’ independent
claims 1 and 16 are directed to a patent-ineligible abstract concept and do
not recite something “significantly more” under the second prong of the
Alice analysis, we sustain the Examiner’s rejection of these claims as well as
respective dependent claims 2—7 and 17—27 under 35 U.S.C. § 101 as being
directed to non-statutory subject matter in light of Alice and its progeny.
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For the foregoing reasons, Appellants’ contentions are unpersuasive
as to error in the rejection under 35U.S.C. § 101.
Rejection under § 103(a)
Issue 2: Did the Examiner err in finding that Yoshida, Fernandez, and
Salisbury collectively teach or suggest read-only pointer cells that are
factory-programmed, as set forth in claim 1?
Appellants contend that in Fernandez “the reference teaches that the
index information (pointer cells) are not read-only . . . Since the set of index
parameters is stored in a memory during that process” (App. Br. 11).
Appellants further contend that “the Fernandez reference is silent as to
whether the pointer cells are factory-programmed” (id. at 12) and
“Appellants believe that the Salisbury reference does not teach or suggest
this feature” (id.).
The Examiner finds that “the memory [in Fernandez] is EEPROM . . .
EEPROM stands for Electrically Erasable Programmable Read-Only
Memory, and therefore is read-only memory” (Ans. 23). The Examiner
further finds that “Fernandez discusses this information [is] being obtained
during the construction of the memory” (id.). We agree with the Examiner.
We refer to, rely on, and adopt the Examiner's findings and
conclusions set forth in the Answer. Our discussions here will be limited to
the following points of emphasis.
Although Appellants point out a scenario in Fernandez wherein “the
encrypted external key can be stored in the memory array 302 during
operation of the data storage device 300” (see App. Br. 12, citing Fernandez
7:39—51) and present this as evidence that “the memory 302 is not read-
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only” {id.), we highlight that Fernandez specifically discloses that “[t]he
array 302 is embodied here as an EEPROM” (6:60-67), a type of read-only
memory. We find that the claims do not limit the read-only cells to any
particular type of read-only cells. Therefore, under the broadest reasonable
interpretation of the claims, the claimed read-only pointer cells includes
EEPROM pointer cells as taught by Fernandez.
Regarding the claimed factory-programmed, the Examiner finds, and
we agree, that Fernandez’s disclosure of information being obtained during
the construction of the memory teaches/suggests factory-programmed {see
Ans. 23, citing Fernandez 5:23—56). Specifically, Fernandez discloses that
“[d]ata may be programmed in the memory cell 100 for purposes of data
storage according to well known technique of floating-gate charge injection”
(5:34—37). The Examiner finds that the aforementioned teaching in
Fernandez describes “electrons interacting with the gates,” i.e., a process
performed at the factory. Appellants merely argue that Fernandez is “silent”
as to whether the pointer cells are factory-programmed (App. Br. 12), but
fail to specifically rebut the aforementioned Examiner’s interpretation of
factory-programmed.
Accordingly, we sustain the Examiner’s rejection of claim 1.
Appellants’ arguments regarding the Examiner’s rejection of independent
claim 16 rely on the same arguments as for claim 1, and Appellants do not
argue separate patentability for the dependent claims. We therefore also
sustain the Examiner’s rejection of claims 2—7 and 16—27.
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DECISION
We affirm the Examiner’s § 101 and § 103 rejections Rl—R3.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED
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