Ex Parte Pinguet et alDownload PDFPatent Trial and Appeal BoardMar 20, 201712241961 (P.T.A.B. Mar. 20, 2017) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 12/241,961 09/30/2008 Thierry Pinguet 19483US02 7968 23446 7590 03/22/2017 MCANDREWS HELD & MALLOY, LTD 500 WEST MADISON STREET SUITE 3400 CHICAGO, IL 60661 EXAMINER HAGAN, SEAN P ART UNIT PAPER NUMBER 2828 NOTIFICATION DATE DELIVERY MODE 03/22/2017 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): mhmpto @ mcandrews-ip.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte THIERRY PINGUET, STEFFEN GLOECKNER, SHERIF ABDALLA, SINA MIRSAIDI, PETER DE DOBBELAERE, and LAWRENCE C. GUNN III Appeal 2014-007237 Application 12/241,961 Technology Center 2800 Before ADRIENE LEPIANE HANLON, PETER F. KRATZ, and BRIAN D. RANGE, Administrative Patent Judges. HANLON, Administrative Patent Judge. DECISION ON APPEAL A. STATEMENT OF THE CASE The Appellants filed an appeal under 35 U.S.C. § 134 from an Examiner’s decision finally rejecting claims 1—26. We have jurisdiction under 35 U.S.C. § 6(b). We REVERSE. Independent claims 1 and 12 are reproduced below from the Claims Appendix of the Appeal Brief dated March 12, 2014 (“App. Br.”). The limitations at issue are italicized. Appeal 2014-007237 Application 12/241,961 1. A method for processing signals, the method comprising: in a CMOS chip comprising photonics devices and electronics devices that were fabricated using a CMOS process, receiving optical signals from one or more optical fibers via optical couplers on a top surface of said CMOS chip; converting said optical signals to electrical signals via one or more photodetectors integrated in said CMOS chip; processing said electrical signals using circuitry in said CMOS chip; receiving a continuous-wave (CW) optical signal from a laser source via optical couplers on said top surface of said CMOS chip; modulating said received CW optical signal using one or more optical modulators integrated in said CMOS chip; receiving electrical signals from circuitry in said CMOS chip; driving said one or more optical modulators using said received electrical signals; and communicating said modulated optical signal out of said top surface of said CMOS chip into one or more optical fibers via one or more optical couplers integrated in said CMOS chip. App. Br. 29. 12. A system for processing signals, the system comprising: a CMOS chip comprising photonics devices and electronics devices that were fabricated in a CMOS process, wherein said CMOS chip comprises: one or more optical couplers on a top surface of said CMOS chip and enabled to receive optical signals from one or more optical fibers; one or more photodetectors integrated in said CMOS chip and enabled to convert said received optical signals to electrical signals; one or more circuits integrated in said CMOS chip and enabled to process said electrical signals; 2 Appeal 2014-007237 Application 12/241,961 one or more optical couplers on said top surface of said CMOS chip and enabled to receive a continuous-wave (CW) optical signal from a laser source; one or more optical modulators integrated in said CMOS chip and enabled to modulate said received CW optical signal; one or more circuits integrated in said CMOS chip and enabled to receive electrical signals and drive said one or more optical modulators using said received electrical signals; and one or more optical couplers integrated in said CMOS chip and enabled to communicate said modulated optical signal out of said top surface of said CMOS chip into one or more optical fibers. App. Br. 31—32. The claims on appeal stand rejected as follows: (1) claims 1, 2, 5, 9-13, 16, and 20-26 under 35 U.S.C. § 103(a) as unpatentable over Estes et al.1 in view of Yoshimura et al.2 and Cable et al.;3 (2) claims 3 and 14 under 35 U.S.C. § 103(a) as unpatentable over Estes in view of Yoshimura and Cable, and further in view of Abeles;4 (3) claims 4 and 15 under 35 U.S.C. § 103(a) as unpatentable over Estes in view of Yoshimura and Cable, and further in view of Nguyen et al.;5 (4) claims 6—8 and 17—19 under 35 U.S.C. § 103(a) as unpatentable over Estes in view of Yoshimura and Cable, and further in view of Masini et al.;6 and (5) claims 6—8 and 17—19 under 35 U.S.C. § 103(a) as unpatentable over Estes in view of Yoshimura and Cable, and further in view of Kaneko et al.7 1 US 2006/0038168 Al, published February 23, 2006 (“Estes”). 2 US 2002/0039464 Al, published April 4, 2002 (“Yoshimura”). 3 US 2003/0109142 Al, published June 12, 2003 (“Cable”). 4 US 6,744,548 B2, issued June 1, 2004 (“Abeles”). 5 US 5,408,146, issued April 18, 1995 (“Nguyen”). 6 US 7,397,101 Bl, issued July 8, 2008 (“Masini”). 7 US 2002/0081056 Al, published June 27, 2002 (“Kaneko”). 3 Appeal 2014-007237 Application 12/241,961 B. DISCUSSION 1. Rejection (1) Estes discloses an interconnect assembly that “may be top-side coupled onto CMOS-integrated components” (Estes 1 64) and a method of using the interconnect assembly for processing signals. The Examiner finds Estes’ method includes the following steps recited in claim 1: “Receiving a continuous-wave (CW) optical signal from a laser source via optical couplers on said top surface of said CMOS chip” [(Estes 69, 77); and] “[mjodulating said received CW optical signal using one or more optical modulators integrated in said CMOS chip” [(Estes 1 69)]. Final 5.8 The Examiner finds Estes does not disclose the following steps recited in claim 1: “Receiving optical signals from one or more optical fibers via optical couplers on a top surface of said CMOS chip” [and] “[communicating said modulated optical signal out of said top surface of said CMOS chip into one or more optical fibers via one or more grating couplers integrated in said CMOS chip.” Final 5 (emphasis added). The Examiner finds Yoshimura discloses those steps. Final 5 (citing Yoshimura ^fl[ 207, 137). The Examiner also finds the combination of Estes and Yoshimura does not disclose “[comprising photonics devices and electronics devices that were fabricated using a CMOS process” as recited in claim 1. Final 5. The Examiner finds Cable discloses that limitation. Final 5—6 (citing Cable 120). The Appellants argue that: [NJo light is coupled to a CMOS chip [in Yoshimura], despite multiple chips being disclosed in Yoshimura. The light is coupled 8 Final Office Action dated August 30, 2013. 4 Appeal 2014-007237 Application 12/241,961 into the motherboard 100 of Yoshimura because the grating coupler 155 is in the motherboard 100, not a CMOS chip, and nowhere in Yoshimura is it disclosed that the light is coupled into a chip, even though chips la-Id are disclosed. App. Br. 13. The Appellants also argue that “Cable only teaches a photodetector fabricated with laser driver circuitry, where the laser is on a separate compound semiconductor substrate and emits light that is sensed by the photodetector . . . .” Reply Br. 4.9 According to the Appellants: [T]here is no support in the cited references for integrating each of [the photonics and electronics] devices and functions following “in a CMOS chip” in claim 1 based merely on the integrated photodetector of Cable, the coupling of light into the motherboard of Yoshimura and the “top-side coupled” language of Paragraph [0064] of Estes. App. Br. 14. The Examiner does not dispute that light is coupled to motherboard 100 in Yoshimura. Rather, the Examiner explains: Yoshimura is cited as an exemplary technique for coupling light from one device to another and ... it is Estes . . . and Cable . . . that are cited as teaching CMOS chips that require coupling of light to be performed. Since Estes requires the transmission of optical signals to the chips thereof, since Yoshimura . . . discloses that such a transmission may be performed using fibers coupled to a substrate, and since the coupling techniques described in . . . Yoshimura would appear readily applicable to any device requiring optical coupling, the examiner maintains that the [first receiving step and the communicating step recited in claim 1] are read upon by the combination of the teachings of Estes regarding CMOS chips with the teachings of Yoshimura regarding how one may couple light from a fiber to an optoelectronic device. 9 Reply Brief dated June 16, 2014. 5 Appeal 2014-007237 Application 12/241,961 Ans. 2—3.10 Significantly, the issue on appeal is not whether it would have been obvious to one of ordinary skill in the art to substitute known methods for coupling optical signals to a substrate. Claim 1 recites two receiving steps, i.e., (1) “receiving optical signals from one or more optical fibers via optical couplers on a top surface of said CMOS chip” and (2) “receiving a continuous-wave (CW) optical signal from a laser source via optical couplers on said top surface of said CMOS chip.” App. Br. 29 (emphasis added). The Examiner finds Estes discloses the second receiving step recited in claim 1 but does not disclose a first receiving step as claimed, i.e., “receiving optical signals* [11] from one or more optical fibers via optical couplers on a top surface of said CMOS chip.” The Examiner relies on Yoshimura to teach the claimed first receiving step. See Final 5. Thus, the issue on appeal is whether it would have been obvious to one of ordinary skill in the art to modify the method of Estes to include the first receiving step recited in claim 1. The Appellants argue: [T]he Examiner is required to provide “some articulated reasoning with some rational underpinning to support the legal conclusion of obviousness.” See KSR International Co. v. Teleflex Inc., Ill S. Ct. 1727, 1741 (2007) quoting In re Kahn, 441 F.2d 997,[ ]988 ([Fed. Cir.] 2006). Put another way, the Examiner should “identify a reason that would have prompted a person of ordinary skill in the relevant field to combine the elements in the way the claimed new invention does.” KSR, Ml S. Ct. at 1741. App. Br. 15. 10 Examiner’s Answer dated May 7, 2014. 11 According to claim 1, the optical signals received in this step are converted “to electrical signals via one or more photodetectors integrated in said CMOS chip” and those electrical signals drive the one or more optical modulators that modulate the received continuous-wave (CW) optical signal. App. Br. 29. 6 Appeal 2014-007237 Application 12/241,961 The Appellants argue that, in this case, “the Examiner fails to provide ‘articulated reasoning with some rational underpinning to support the legal conclusion of obviousness’ in the detailed manner described in KSR.” App. Br. 15. The Appellants’ argument is supported by the record. The mere fact that Yoshimura discloses coupling optical fibers to the top surface of a motherboard and Cable teaches a photodetector fabricated using a CMOS process does not, without more, demonstrate the obviousness of modifying Estes’ method to include the first receiving step recited in claim 1. See In re Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992) (examiner bears the initial burden of presenting a prima facie case of unpatentability). That is, absent the Appellants’ disclosure, it is unclear on this record why Yoshimura’s teaching of coupling optical fibers to the top surface of a motherboard would have led one of ordinary skill in the art to modify the assembly of Estes to receive an additional optical signal on the top surface of a CMOS chip. Based on the foregoing, the § 103(a) rejection of claims 1, 2, 5, 9—11, 23, and 24 is not sustained. Claim 12, the other independent claim on appeal, recites a system for processing signals. The system comprises, inter alia, two optical couplers, i.e., (1) “one or more optical couplers on a top surface of said CMOS chip and enabled to receive optical signals from one or more optical fibers'1'’ and (2) “one or more optical couplers on said top surface of said CMOS chip and enabled to receive a continuous-wave (CW) optical signal from a laser source. ” App. Br. 31 (emphasis added). In the rejection of claim 12, the Examiner relies on the same factual findings relied on in support of the § 103(a) rejection of claim 1. See Final 7—8. The Examiner concludes that “[i]t would have been obvious to one of ordinary skill in 7 Appeal 2014-007237 Application 12/241,961 the art at the time of invention to combine the teachings of the combination of Estes and Yoshimura with the teachings of Cable for the reasons provided . . . regarding claim 1.” Final 8. For the same reasons the Examiner has failed to demonstrate the obviousness of modifying Estes’ method to include the first receiving step recited in claim 1, the Examiner has also failed to demonstrate the obviousness of modifying Estes’ assembly to include the first optical coupler recited in claim 12. Oetiker, 977 F.2d at 1445. See App. Br. 17. Therefore, the § 103(a) rejection of claims 12, 13, 16, 20-22, 25, and 26 is not sustained. The Examiner does not rely on the remaining prior art of record to cure the deficiencies identified above in the § 103(a) rejection of claim 1. Therefore, the § 103(a) rejections of claims 3, 4, 6—8, 14, 15, and 17—19 also are not sustained. C. DECISION The Examiner’s decision is reversed. REVERSED 8 Copy with citationCopy as parenthetical citation