Ex Parte Newman et al

Board of Patent Appeals and Interferences

May 15, 2007

10637419 (B.P.A.I. May. 15, 2007)

The opinion in support of the decision being entered today was not written
for publication and is not binding precedent of the Board.

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte ROBERT A. NEWMAN
and JAIME D.WEIDLER
____________

Appeal 2007-1363
Application 10/637,419
Technology Center 2800
____________

Decided: May 15, 2007
____________

Before CHARLES F.WARREN, THOMAS A. WALTZ, and
PETER F. KRATZ, Administrative Patent Judges.

WALTZ, Administrative Patent Judge.

DECISION ON APPEAL
This is a decision on an appeal under 35 U.S.C. § 134 from the
Primary Examiner’s final rejection of claims 1-5, 7-10, and 21-31, which are
the only claims pending in this application. We have jurisdiction pursuant to
35 U.S.C. § 6.
Appeal 2007-1363
Application 10/637,419

According to Appellants, the invention is directed to a method of
reducing shear stress in a packaged semiconductor chip, including the steps
of providing a semiconductor chip package base having a die attachment
area, providing a die, providing a die attach material, controlling an amount
of the die attach material whereby at least one portion of the die attach
material forms a meniscus on at least one side of the die, with the at least
one meniscus forming at least one die attach fillet upon curing, and the
height of the at least one die attach fillet is thereby controlled to reduce the
shear stress in the die (Br. 2-3). Further details of the invention may be
found in illustrative independent claim 1 which is reproduced below:
1. A method of reducing shear stress in a packaged semiconductor
chip, comprising the steps of:

providing a semiconductor chip package base having a die attachment
area;

providing a die having at least one side and at least one edge,

said die comprising a semiconductor material selected from a
group consisting essentially of silicon (Si), germanium (Ge), and
gallium arsenide (GaAs), and

each said at least one side having a thickness and a width;

providing a die attach material;

controlling an amount of said die attach material disposed between
said die and said semiconductor chip package base,

whereby at least one portion of said die attach material forms at
least one meniscus on said at least one side of the die,

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whereby said at least one meniscus forms at least one die attach
fillet upon curing of said die attach material,

thereby controlling at least one height of said at least one die
attach fillet, and thereby reducing shear stress in said die, said at least
one controlled height comprising a range of approximately 0% to
approximately 75% of said at least one die side thickness at a location
of at least 25% inboard from each said at least one edge of any given
at least one die side, and

completing packaging of said semiconductor chip.

The Examiner has relied on the following reference as evidence of
unpatentability:
Raiser US 6,365,441 B1 Apr. 2, 2002
ISSUES ON APPEAL
Claims 1, 3-5, 7-10, 21, and 23-31 stand rejected under 35 U.S.C.
§ 102(e) as anticipated by Raiser (Answer 3).
Claims 2 and 22 stand rejected under 35 U.S.C. § 103(a) as
unpatentable over Raiser (Answer 5).
Appellants contend that Raiser does not teach, disclose, or suggest
controlling an amount of die attach material disposed between a die and a
semiconductor chip package base, thereby controlling at least one height of
at least one fillet, and thus reducing the shear stress in the die (Br. 10).
Appellants contend that Raiser fails to impose any requirements on the
height of fillet 38 and merely exemplifies that fillet 38 may extend from
substrate 14 to a point approximately one-half the thickness of integrated
circuit 12 (Br. 11). Thus Appellants contend that Raiser fails to disclose any
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Application 10/637,419

relationship between the amount of underfill material that is applied between
integrated circuit 12 and substrate 14 and the height of fillet 38 (id.).
Appellants contend that Raiser discloses that the strain and
corresponding stress for the outermost solder bumps is not reduced by
increasing the percentage of underfill beyond approximately 25% (Br. 12).
Appellants also contend that the underfill material 26 is used by Raiser to
provide support to solder bumps 16, thus the underfill material does not
“attach” circuit 12 to substrate 14 and is not “die attach material” as
specified in claim 1 on appeal (id.).1
The Examiner contends that Raiser clearly discloses that the fillet 38
of the die attach material 38/26 formed along the perimeter of integrated
circuit 12 extends from the substrate 14 to a point approximately one-half
(or 50%) of the thickness (i.e., height) of integrated circuit 12 (Answer 3
and 6).
The Examiner contends that the underfill material 26 disclosed by
Raiser is a “die attach material” within the scope of the claims since this
liquid epoxy material contacts both the die 12 and the substrate 14 (Answer
9). The Examiner also contends that the underfill material 26 disclosed by
Raiser is used to reduce the shear strain and corresponding shear stress in
solder bumps 16, thus correspondingly reducing the shear stress in die 12
(Answer 8).

1 Appellants only present specific, substantive arguments with respect to
claim 1 on appeal (Br. 9-13). These arguments are merely repeated for
claims 21 and 23-31 (Br. 13-17). Thus, we limit our consideration for this
ground of rejection in the appeal to claims 1 and 21.
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Accordingly, the issues presented in the record of this appeal are as
follows: (1) does Raiser disclose a height of at least one die attach fillet that
is in the range of approximately 0% to approximately 75% of said at least
one die side thickness at a location of at least 25% inboard as required by
claim 1 on appeal (or within the range of 33% to 75% as required by claim
21 on appeal)? ; and (2) is the underfill material 26 disclosed by Raiser “die
attach material” within the scope of claim 1 on appeal?
We determine that the Examiner has established a prima facie case of
anticipation in view of the disclosure of Raiser, which prima facie case has
not been adequately rebutted by Appellants’ arguments. Therefore, we
AFFIRM the rejection based on § 102(e) over Raiser for the reasons stated
in the Answer, as well as those reasons set forth below. We also determine
that the Examiner has established a prima facie case of obviousness in view
of Raiser. Since Appellants present the same arguments for the § 103(a)
rejection over Raiser as presented for the § 102(e) rejection (Br. 17), we
AFFIRM this rejection for the same reasons as discussed below and in the
Answer.
OPINION
A. The Rejection under § 102(e)
We determine the following factual findings from the record in this
appeal:
(1) Raiser discloses a semiconductor chip package base or substrate
14 having a die attachment area between the substrate and the
integrated circuit 12 (silicon die) which has at least one side and at
least one edge where an amount of die attach material (underfill)
38/26 is provided to result in at least one portion of the die attach
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material (underfill) forming a meniscus on at least one side of
integrated circuit 12 (col. 1, ll. 12-13; col. 2, ll. 17-45; Figure 1;
and the Answer 3-4);
(2) Raiser discloses that the liquid die attach material 26 is cured to a
solid state and forms a fillet 38 along the entire perimeter of the
integrated circuit 12, exemplifying fillet 38 extending from the
substrate 14 to a point “approximately one-half” the thickness of
the integrated circuit 12 (col. 1, ll. 39-40; col. 2, ll. 45-50; col. 3,
ll. 48-54; and the Answer 4);
(3) Raiser teaches that, in one embodiment, underfill material may
extend from an outer edge of the integrated circuit 12 towards the
center of the integrated circuit a length L1 that is no less than
approximately 25% of a length L2 between the edges and the
center of the integrated circuit (col. 1, ll. 54-60; col. 2, ll. 59-63;
col. 3, ll. 24-29; Figure 2; and the Answer 4); and
(4) Raiser teaches that when the package is thermally cycled a
mechanical strain may create cracks in the solder bumps 16, and
the use of underfill material 38/26 structurally reinforces the
solder bumps, reducing the strain on the solder bumps 16 and the
corresponding stress, resulting in an improved life and reliability
of the package (col. 1, ll. 27-40; col. 2, ll. 38-40; col. 3, ll. 24-44;
Figures 3a-c; Figures 4a-c; and the Answer 8).
During prosecution before the Examiner, we construe the language of
the claims by the broadest reasonable meaning of the words in their ordinary
usage as they would be understood by one of ordinary skill in the art, taking
into account any enlightenment or definitions found in the specification. See
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In re Morris, 127 F.3d 1048, 1054, 44 USPQ2d 1023, 1027 (Fed. Cir. 1997).
A disclosure in the prior art of any value within the claimed range
constitutes anticipation of that claimed range. See In re Wertheim, 541 F.2d
257, 267, 191 USPQ 90, 100 (CCPA 1976).
Applying the preceding legal principles to the factual findings in the
record of this appeal, we determine that the Examiner has established a
prima facie case of anticipation which has not been adequately rebutted by
Appellants’ arguments. First, we construe the claimed term “die attach
material” (see claim 1 on appeal). We note that there is no clear definition
of this term in Appellants’ Specification, nor have Appellants pointed to any
definition or art-recognized meaning for this term (see the Brief in its
entirety). However, from the context of Appellants’ Specification and
Figures, we construe the term “die attach material” by its broadest
reasonable meaning to include any material which fills at least a portion of
the space between the die and the chip base or substrate and functions to
attach or hold the die and chip base together (Specification, ¶ [0002], ¶
[0003], ¶ [0044], and Figures 1-15).
In view of our claim construction above, we determine that the
underfill 26 and fillet 38 disclosed by Raiser clearly constitute “die attach
material” within the meaning of this claimed term. We determine that
Raiser teaches that underfill material 26 fills at least a portion of the space
between the integrated circuit 12 (die) and the substrate 14 (chip base) and
functions to hold these two components together (Raiser, col. 2, ll. 36-38,
51-54; col. 3, ll. 48-51; and the Answer 9).
As shown by factual findings (1) through (3) listed above, we
determine that Raiser describes an example which falls within the scope of
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claims 1 and 21 on appeal (“approximately one-half” falls within the
claimed ranges of “approximately 0% to approximately 75%” and
“approximately 33% to approximately 75%”). The argument that Raiser
fails to disclose or teach any “relationship” between the amount of underfill
material 26 and the height of fillet 38 (Br. 11) is irrelevant since Raiser
describes an example which falls within the claimed range.
For the foregoing reasons and those stated in the Brief, we affirm the
rejection of claims 1, 3-5, 7-10, 21, and 23-31 under § 102(e) over Raiser.
B. The Rejection over § 103(a)
As previously noted, Appellants do not present any additional reasons
for the patentability of claims 2 and 22 (Br. 17). Therefore, we adopt the
factual findings and conclusion of law as stated by the Examiner (Answer 5
and 14). We additionally note the law is replete with cases in which the
difference between the claimed invention and the prior art is some range or
other variable within the claims. These cases have consistently held that in
such a situation Appellants must show that the particular variable is critical,
which in this appeal Appellants have not done. See In re Woodruff, 919 F.2d
1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
C. Other Issues
In the event of further or continuing prosecution of the claimed
subject matter, the Examiner and Appellants should determine if the “related
art” as disclosed in the Specification is actually “prior art” capable of
supporting a rejection of the claims. We note that the “related art” in
Appellants’ Specification uses a very low epoxy fillet height in the range of
less than 33.33% , although examples show low values such as 25% and
high values such as 90% (Specification 2:16-18; 3:23-24; and Figures 5-12
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as disclosed in ¶¶ [0015] through [0022]). If the “related art” value of 25%
was indeed “prior art,” this value would anticipate the range of
“approximately 0% to approximately 75%” as recited in claim 1 on appeal.
D. Time Period for Response
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv) (2006).
AFFIRMED

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