Ex Parte Jeon et al

Patent Trials and Appeals Board

Jun 17, 2019

15111981 - (D) (P.T.A.B. Jun. 17, 2019)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
15/111,981 07/15/2016 Y oocharn Jeon
56436 7590 06/19/2019
Hewlett Packard Enterprise
3404 E. Harmony Road
Mail Stop 79
Fort Collins, CO 80528
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
90233590 6842
EXAMINER
NGUYEN, VAN THU T
ART UNIT PAPER NUMBER
2824
NOTIFICATION DATE DELIVERY MODE
06/19/2019 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
hpe.ip.mail@hpe.com
chris.mania@hpe.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte YOOCHARN JEON, ERIK ORDENTLICH,
GREGG B. LESARTRE, and SIAMAK TAVALLAEI
Appeal2018-006471
Application 15/111,981
Technology Center 2800
Before ROMULO H. DELMENDO, GRACE KARAFFA OBERMANN,
and MICHAEL G. McMANUS, Administrative Patent Judges.
McMANUS, Administrative Patent Judge.
DECISION ON APPEAL
The Examiner finally rejected claims 1-15 of Application 15/111,981
under 35 U.S.C. §§ 103 and 112. Final Act. (July 14, 2017) 2-7. Appellant1
seeks reversal of these rejections pursuant to 35 U.S.C. § 134(a). We have
jurisdiction under 35 U.S.C. § 6.
For the reasons set forth below, we AFFIRM.
1 The Appellant is the Applicant, Hewlett Packard Enterprise Development
LP, which is also identified as the real party in interest. Appeal Br. 3.
Appeal2018-006471
Application 15/111,981
BACKGROUND
The present application generally relates to memristors (memory
resistors). Spec. ,r,r 1-3. The Specification teaches that memristors can be
fashioned into non-volatile memory devices with certain advantages. Id.
,r 13. In most forms of computer memory new data are written into memory
devices without checking the previously stored data. Id. ,r 16. This is not
the case, however, for memristor devices. Id. ,r,r 16, 17. If a memristor
memory cell has already been driven to a high state (e.g., the memristor cell
is storing a value "1 "), and the new data includes writing a value "1" to the
memristor cell, then the memristor cell is again driven high. This results in
what is referred to as "over-driving" the memristor cell. Id. ,r 42. The
Specification teaches that "[ o ]verdriving may cause a subsequent write
operation to fail, and over time may lead to device failure." Id. ,r 16. In
order to reduce the likelihood of overdriving and other failure conditions, the
Specification teaches that it is beneficial to reduce the overall number of
write operations. Id. ,r 21.
The Specification further teaches to use coding techniques to
constrain the number of memristor cells that change state during a write
operation. Id. ,r 20. One such technique is the use of linear covering codes.
Id. ,r 60. A linear covering code of covering radius r "has the property that
any n-bit word can be obtained from some valid codeword by flipping at
most r bits of that codeword." Id. The Specification further teaches as
follows:
By the covering properties, there is an n-bit word 556 in
this coset, one of the cosets 540a-c, that differs in r or fewer
positions from the previously stored n-bit word. This will be the
new word that will be stored in the corresponding memristor cells
and it follows that at most r memristor cells will have to be
2
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Application 15/111,981
changed .... In other words, the existing state(s) of memristor
cells can be preserved to a larger extent, while only rewriting
those memory cells that need to be changed.
Spec. ,r 62.
Claim 1 is illustrative of the subject matter on appeal and is
reproduced below:
A memristor memory, comprising:
a memristor component having a plurality of memristor cells,
each memristor cell configured to change state based on
application of an electric potential: and
a controller to:
read an n-bit word based on the states of each of the
plurality of memristor ceils,
read an n-k-bit word corresponding to new data to be
written to a subset of the plurality of memristor cells;
determine a coset of a linear covering code based on the
n-k-bit word, wherein the coset differs from the n-bit
word by a predetermined number of bits;
write the coset to the plurality of memristor cells; and
read an updated state of each of the plurality of
memristor cells to validate the coset was written
correctly.
Appeal Br. 19 (Claims App.) (reformatted for clarity).
REJECTIONS
The Examiner maintains the following rejections:
1. Claims 1-15 are rejected under 35 U.S.C. § 112(b) as indefinite for
failing to particularly point out and distinctly claim the subject
matter which the inventors regard as the invention. Final Act. 2-3.
3
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Application 15/111,981
2. Claims 1-15 are rejected under 35 U.S.C. § 103 as obvious over
Mukai et al. 2 in view of N agashima et al. 3 Id. at 3-7.
DISCUSSION
Rejection 1. The Examiner rejected claims 1-15 as indefinite. Final
Act. 2-3. The Examiner determined that the limitation "read an n-k-bit word
corresponding to new data to be written to a subset of the plurality of
memristor cells" was ambiguous. Id. at 2. In the Answer, the Examiner put
forth a definition of "read" in the context of computer science as "to acquire
(information) from storage." Answer 2. The Examiner determined that
"there is lack of a source, e.g. a buffer, latch or storage, suggested either
explicitly or implicitly in either claim 1 or disclosure of the present
invention." Id. at 3.
Appellant accepts the Examiner's proposed definition of "read."
Reply Br. 2. Appellant "asserts that the feature describing reading a word of
a certain length is clear enough to allow a person of ordinary skill in the art
to interpret the metes and bounds of claim 1." Appeal Br. 8. Appellant
additionally argues that a source is inherent to the claim and that "the source
from which the n-k-bit word may be read includes 'e.g. a buffer, latch or
storage."' Reply Br. 2 (quoting Answer 3). Appellant further argues that a
determination of indefiniteness because there is no source recited in claim 1
from which the n-k-bit word is to be read would concern the breadth of the
claim rather than its definiteness. Appeal Br. 8. Appellant states that
"[b ]readth is not indefiniteness." Id. ( citing MPEP § 2173.04). The
2 US 7,876,626 B2, issued Jan. 25, 2011 ("Mukai").
3 US 8,300,444 B2, issued Oct. 30, 2012 ("Nagashima").
4
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Application 15/111,981
Examiner states that "Appellant is ... correct in assuming that the Office
Action objects to the word 'read' because there is no source recited in claim
1 for the n-k-bit word to be read from." Answer 3. The Examiner further
considers various portions of the Specification and determines that "neither
claim 1 nor the disclosure describes 'read an n-k bit word corresponding to
new data,' even when read in the context." Id.
During prosecution, a claim is examined for compliance with
35 U.S.C. § 112(b) by determining whether the claim meets threshold
requirements of clarity and precision. In re Skvorecz, 580 F.3d 1262, 1268
(Fed. Cir. 2009) (quoting MPEP § 2173.02). A claim should be rejected as
indefinite when it is amenable to two or more plausible claim constructions.
In re Packard, 751 F.3d 1307, 1324 (Fed. Cir. 2014) ("There are good
reasons why unnecessary incoherence and ambiguity in claim constructions
should be disapproved").
Here, the gravamen of the Examiner's determination is that the
limitation requiring the controller to "read[] an n-k-bit word corresponding
to new data to be written to a subset of the plurality of memristor cells" does
not specifically limit what is "read." Answer 4. As stated by the Appellant,
this concerns the breadth of the claim rather than its definiteness.
Accordingly, Appellant has shown error in the Examiner's rejection for
indefiniteness. 4
Rejection 2. The Examiner rejected claims 1-15 as obvious over
Mukai in view of N agashima. As described by the Appellant, Mukai
4 We do not here consider whether the claim as interpreted complies with the
written description requirement of 35 U.S.C. § 112(a).
5
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Application 15/111,981
"discloses a method for writing data to a semiconductor memory device
comprising reading the existing data in a memory location, comparing the
existing data to the new data to be written, and determining whether it will
take fewer bitwise overwrites to store the data in its original form or in a
bitwise inverted form." Appeal Br. 10 (citing Mukai 8:41-9:4).
In support of the rejection, the Examiner found that Mukai teaches a
controller that determines the number of rewrite bits between the (previously
written) read data and the (new) write data. Final Act. 3 ( citing Mukai, Figs.
10 and 12). The Examiner determined that this satisfies the "read5 an n-k-bit
word corresponding to new data to be written to a subset of the plurality of
memristor cells."
Appellant argues that "[a]lthough the rewrite bits in Mukai are 5 bits
and the read data and write data in Mukai are 8 bits, the rewrite bits do not
disclose the n-k-bit word of claim I." Appeal Br. 10 (emphasis omitted).
Appellant asserts that the "new data to be written in Mukai ( shown above in
FIG. 12 as 'Write Data') is the same length as the data read from the
memory cells in Mukai (shown above in FIG. 12 as 'Read Data')." Id. at 11
( emphasis omitted). Appellant further asserts that "[ t ]his difference in the
length of the write data (n-k bits) and the read data (n bits) in claim l
highlights a fundamental difference between claim 1 and Mukai." Id.
( emphasis omitted).
In response, the Examiner finds that "write data is different from write
data during execution." Answer 9. In support, the Examiner refers to Figure
13 of Mukai, reproduced below.
5 In view of the Examiner's determination of indefiniteness, the Examiner
interprets "read" to mean "determine." Final Act. 2.
6
Appeal2018-006471
Application 15/111,981
FIG. 13
Read DQt