Ex Parte Hirler et al

Patent Trial and Appeal Board

Jun 13, 2017

13598755 (P.T.A.B. Jun. 13, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/598,755 08/30/2012 Franz Hirler 1012-0447 / 7635
2011P51230US
57579 7590 06/15/2017
MURPHY, BILAK & HOMILLER/INFINEON TECHNOLOGIES
1255 Crescent Green
Suite 200
CARY, NC 27518
EXAMINER
TRA, ANH QUAN
ART UNIT PAPER NUMBER
2842
NOTIFICATION DATE DELIVERY MODE
06/15/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
official@mbhiplaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte FRANZ HIRLER and ANTON MAUDER
Appeal 2016-005220
Application 13/598,755
Technology Center 2800
Before TERRY J. OWENS, BEVERLY A. FRANKLIN, and
DEBRA L. DENNETT, Administrative Patent Judges.
OWENS, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
The Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s
rejection of claims 1—13, 27, and 29. We have jurisdiction under
35 U.S.C. § 6(b).
The Invention
The Appellants claim a circuit arrangement which, the Appellants
state, comprises two transistor devices each having one of its load terminals
connected to a common circuit node (Spec. 11). Claim 1 is illustrative:
1. A circuit arrangement, comprising:
a first transistor device and a second transistor device,
each comprising a first load terminal, a second load terminal, a
gate terminal, and a control terminal, wherein the first load
Appeal 2016-005220
Application 13/598,755
terminals are electrically connected, and wherein the control
terminals are electrically connected;
a capacitive storage element connected between the first
load terminals and the control terminals;
a first switching element coupled between the second
load terminal of the first transistor device and a terminal for a
supply potential;
a second switching element coupled between the second
load terminal of the second transistor device and a terminal for
a supply potential;
a first output formed by the second load terminal of the
first transistor device; and
a second output formed by the second load terminal of
the second transistor device,
wherein the first output and the second output are
configured to have a load connected between the first and the
second outputs,
wherein the gate terminals are configured to receive
separate drive signals.
The References
Musiol US 2003/0071685 A1
Hirler US 2009/0322417 A1
The Rejection
Claims 1—13, 27, and 29 stand rejected under 35
Musiol in view of Hirler.
OPINION
We affirm the rejection.
The Appellants argue the claims as a group (App. Br. 3—9). We
therefore limit our discussion to one claim, i.e., claim 1, which is the sole
independent claim. Claims 2—13, 27, and 29 stand or fall with that claim.
See 37 C.F.R. § 41.37(c)(l)(iv) (2012).
Apr. 17, 2003
Dec. 31,2009
U.S.C. § 103 over
2
Appeal 2016-005220
Application 13/598,755
Musiol discloses a circuit “configuration having two amplifiers
configured such that selectively only one of the amplifiers is intended to
provide an amplification” (1 2). The circuit includes first (Tl) and
second (T2) amplifiers, each having a source terminal (S), a drain
terminal (D), a first gate terminal (Gl), a second gate terminal (G2), and
external input and/or output terminals (Al, A2) (H 31, 33, 34; Fig.)- The
first gate terminals (Gl) input signals to be amplified, and the second gate
terminals (G2) input a control voltage for gain setting (H 33, 39).
Terminals Al and A2 output the signals amplified by, respectively, the
first (Tl) and second (T2) transistors (H 37, 38). The exemplified amplified
signals are radio frequency (RF) signals, but “this need not necessarily be
the case” (146).
Hirler discloses a circuit arrangement comprising storage
capacitance (63) between a source terminal (S) (which corresponds to the
Appellants’ first load terminal) and a charging circuit (60)’s contact
electrode (53) (which corresponds to the Appellants’ control terminal)
(1134, 50; Fig. 1).
The Appellants argue that “the Musiol reference does not teach or
suggest that terminals Al and A2 are configured for a load connected
therebetween as suggested by the Examiner because the output signals are
RF in nature and therefore communicated over the air (see paragraph [0064]
of Musiol)” (App. Br. 5).
Musiol discloses that use of the exemplified RF signals “need not
necessarily be the case” (146). Musiol, therefore, would have led one of
ordinary skill in the art, through no more than ordinary creativity, to use the
transistors (Tl, T2) to amplify signals other than RF signals, such as
3
Appeal 2016-005220
Application 13/598,755
electrical current signals sent to a load which, to receive signals amplified by
one of the transistors at a time (| 2), is connected between the transistors.
See KSR Inti Co. v. Teleflex Inc., 550 U.S. 398, 421 (2007) (“A person of
ordinary skill is also a person of ordinary creativity, not an automaton”). In
making an obviousness determination one “can take account of the
inferences and creative steps that a person of ordinary skill in the art would
employ.” KSR, 550 U.S. at 418.
The Appellants assert that “connecting a load between the RF output
terminals of an RF switching device would significantly degrade, if not
completely frustrate, the purpose of the RF switching device, i.e. to transmit
radio waves” (App. Br. 6).
That assertion is not well taken because it is merely unsupported
attorney argument, and arguments of counsel cannot take the place of
evidence. See In re De Blauwe, 736 F.2d 699, 705 (Fed. Cir. 1984).
Moreover, the assertion is contrary to the disclosure in GB 2 289 810 A
(published Nov. 29, 1995) (discussed by Musiol (14), relied upon by the
Examiner (Ans. 2) and addressed by the Appellants (Reply Br. 2—3)) of a
switching device comprising a load (37) between RF signal amplifying
transistors (BJT 1, BJT 2) (p. 5,11. 10-19; p. 6,11. 10—22; Fig. 2).
The Appellants assert that Musiol discloses that circuits such as those
of GB ‘810 and EP 0 648 010 A1 (published April 12, 1995) (which is
discussed by Musiol (1 5) and relied upon by the Examiner as evidence of a
differential amplifier having a load coupled between its outputs (Ans. 2))
“are ‘disadvantageous’” (Reply Br. 2) and “dissuades the use of the circuits
disclosed in those references” (Reply Br. 3).
4
Appeal 2016-005220
Application 13/598,755
Musiol does not disclose that such circuits “are disadvantageous” but,
rather, discloses that they “may be disadvantageous” (13). Regardless,
Musiol does not indicate that those circuits function ineffectively.
For the above reasons we are not persuaded of reversible error in the
rejection.
DECISION/ORDER
The rejection of claims 1—13, 27, and 29 under 35 U.S.C. § 103 over
Musiol in view of Hirler is affirmed.
It is ordered that the Examiner’s decision is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED
5