Ex Parte Heybruck et al

Patent Trial and Appeal Board

Nov 23, 2012

11085878 (P.T.A.B. Nov. 23, 2012)

UNITED STATES PATENT AND TRADEMARKOFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/085,878 03/22/2005 William Francis Heybruck HSJ920050051US1 4292
45552 7590 11/26/2012
HITACHI C/O WAGNER BLECHER LLP
123 WESTRIDGE DRIVE
WATSONVILLE, CA 95076
EXAMINER
MOLL, NITHYA JANAKIRAMAN
ART UNIT PAPER NUMBER
2128
MAIL DATE DELIVERY MODE
11/26/2012 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte WILLIAM FRANCIS HEYBRUCK and CHRISTOPHER EVAN
ACKLES
____________

Appeal 2010-005467
Application 11/085,878
Technology Center 2100
____________

Before JOSEPH F. RUGGIERO, JEFFREY S. SMITH, and JENNIFER L.
McKEOWN, Administrative Patent Judges.

SMITH, Administrative Patent Judge.

DECISION ON APPEAL
Appeal 2010-005467
Application 11/085,878

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STATEMENT OF THE CASE
This is an appeal under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1-20, which are all the claims pending in the application.
We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.

Representative Claim
1. A method of creating a simulation model of a disk drive, the
method comprising:

receiving instructions in a simulation language that code the
simulation model of a disk drive, wherein the instructions are in the
simulation language and comply with a specification that describes logic of
the disk drive;

enabling a simulation model of a host to interact with the simulation
model of the disk drive whereby the simulation model of the disk drive is
created, wherein a schematic of the disk drive is not required for the purpose
of enabling the simulation model of the host to interact with the simulation
model of the disk drive; and

returning a pre-defined set of data to the simulation model of the host
when reading beyond a size of a file.

Prior Art
Lau US 5,493,672 Feb. 20, 1996
Rawlings US 5,652,865 Jul. 29, 1997
Finn US 2006/0208066 A1 Sep. 21, 2006

Examiner’s Rejections
Claims 1-4, 6-14, and 16-20 stand rejected under 35 U.S.C. § 103(a)
as being unpatentable over Lau and Rawlings.
Appeal 2010-005467
Application 11/085,878

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Claims 5 and 15 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Lau, Rawlings, and Finn.

ANALYSIS
Section 103 rejection of claims 1-4, 6-14, and 16-20
Appellants contend that Lau does not teach, at col. 1 ll. 45-52,
“receiving instructions in a simulation language that code a simulation
model of a disk, wherein the instructions are in a simulation language and
comply with a specification that describes logic of the disk drive” as recited
in claim 1. App. Br. 9-10. The Examiner finds that Appellants’ argument
summarizes the prior art references and summarizes the claim language, but
does not provide persuasive evidence or argument to rebut the Examiner’s
finding that Lau teaches “receiving instructions in a simulation language that
code a simulation model of a disk, wherein the instructions are in a
simulation language and comply with a specification that describes logic of
the disk drive” as recited in claim 1. Ans. 9. We agree with the Examiner.
Appellants contend that Lau requires a schematic to model an
input/output device using a logic level simulator, which teaches away from
“enabling a simulation model of a host to interact with the simulation model
of the disk drive . . . wherein a schematic of the disk drive is not required” as
recited in claim 1. App. Br. 10-12; Reply Br. 2-3. Appellants’ contention is
based on the premise that Lau requires using a logic level simulator, rather
than an instruction level simulator, to model an input/output device.
Lau teaches that an instruction level simulator runs faster than a logic
level simulator, but is not as accurate. Col. 2, ll. 7-12. Lau further teaches
that simulating a host with an instruction level simulator increases speed,
Appeal 2010-005467
Application 11/085,878

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and simulating an input/output system with a logic level simulator increases
accuracy. Col. 2, ll. 4-22. Lau also teaches that simulating an input/output
system with an instruction level simulator was known in the prior art. See
col. 1, ll. 44-52.
Appellants’ argument that simulating a disk drive “wherein a
schematic of the disk drive is not required” is not taught by the prior art is
inconsistent with Lau’s teaching that simulating a disk drive with an
instruction level simulation model, which would not require a schematic of
the disk drive, was known in the prior art. When a claim “‘simply arranges
old elements with each performing the same function it had been known to
perform’ and yields no more than one would expect from such an
arrangement, the combination is obvious.” KSR Int’l v. Teleflex, Inc., 550
U.S. 398, 417 (2007)(internal citations omitted). We find that simulating an
input/output device using an instruction level simulator instead of a logic
level simulator is the arrangement of old elements performing the same
functions they had been known to perform, and yields no more than the
expected result of a faster but less accurate simulation model of the
input/output device.
We sustain the rejection of claim 1 under 35 U.S.C. § 103. Appellants
have not presented arguments for separate patentability of claims 2-4, 6-14,
and 16-20, which fall with claim 1.

Section 103 rejection of claims 5 and 15
Appellants do not present arguments for separate patentability of
claims 5 and 15, but rather rely on those presented for claim 1 which we find
unpersuasive.
Appeal 2010-005467
Application 11/085,878

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DECISION
The rejection of claims 1-4, 6-14, and 16-20 under 35 U.S.C. § 103(a)
as being unpatentable over Lau and Rawlings is affirmed.
The rejection of claims 5 and 15 under 35 U.S.C. § 103(a) as being
unpatentable over Lau, Rawlings, and Finn is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R. §
41.50(f).

AFFIRMED

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