Ex Parte Gupta et al

Patent Trial and Appeal Board

Mar 31, 2016

11150879 (P.T.A.B. Mar. 31, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
111150,879 0610912005
7590 04/01/2016
The Law Offices of Calvin B, Ward
Suite 305
18 Crow Canyon Court
San Ramon, CA 94583
FIRST NAMED INVENTOR
Subhash Gupta
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
54364-Div 3537
EXAMINER
MITCHELL, JAMES M
ART UNIT PAPER NUMBER
4100
MAILDATE DELIVERY MODE
04/01/2016 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte SUBHASH GUPTA, PAUL KWOK KEUNG HO, and
SANGKIHONG
Appeal2014-005702
Application 11/150,879
Technology Center 4100
Before PETER F. KRATZ, KAREN M. HASTINGS, and
CHRISTOPHER C. KENNEDY, Administrative Patent Judges.
HASTINGS, Administrative Patent Judge.
DECISION ON APPEAL
Appellants 1 seek our review under 35 U.S.C. § 134 of the Examiner's
final decision rejecting claims 11-16 under 35 U.S.C. § 103(a) as
unpatentable over at least the basic combination of Hayasaka et al. (U.S.
6,809,421 Bl, issued Oct. 26, 2004) ("Hayasaka") in combination with
Leedy (U.S. 2001/0033030 Al, published Oct. 25, 2001) and Atkins et al.
1 The Real Party in Interest is stated to be "Tezzaron Semiconductor
Corporation" (Br. 1 ).
Appeal2014-005702
Application 11/150,879
(U.S. 5,798,565, issued Aug. 25, 1998) ("Atkins").2 We have jurisdiction
over the appeal under 35 U.S.C. § 6(b).
We AFFIRM.
Claims 11 and 14 are illustrative of the claimed subject matter
(emphasis added):
11. A method for thinning a wafer to provide a component layer
comprising an integrated circuit layer, said component layer having a
predetermined thickness, said method comprising:
providing a wafer having first and second surfaces comprising a wafer
material with said integrated circuit layer fabricated on said first surface
thereof;
generating a plurality of vias, each via extending from said first
surface to a first depth, said plurality of vias being characterized by a lateral
density on said wafer;
depositing a layer of a stop material in said vias, said stop material
being more resistant to CMP than said wafer material; and
removing material from said second surface of said wafer utilizing
CMP to provide an etched surface at said first depth from said first surface,
said layer of stop material preventing said CMP from removing wafer
material closer to said first surface than said first depth, and said lateral
density of said vias being sufficient to provide a planar surface that can be
bonded to another wafer by thermal diffusion bonding.
14. A method for adding a second component layer comprising an
integrated circuit layer to a first wafer comprising a first circuit layer, said
method comprising the steps of:
providing a plurality of bonding pads on a first surf ace of said first
wafer;
2 The Examiner applies the additional prior art of Lasky (U.S. 4,735,679,
issued Apr. 5, 1988) to claims 12 and 15; and Huang et al. (U.S.
2005/0258537 Al, published Nov. 24, 2005) ("Huang") to claim 14.
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Application 11/150,879
providing a second wafer compnsmg a substrate of a wafer material
and said integrated circuit layer, said integrated circuit layer being fabricated
on a first surface of said substrate and being covered by a layer of dielectric
material, said second wafer further comprising a plurality of vias extending a
predetermined distance from said first surface of said substrate into said
substrate, said vias including a layer of stop material, said stop material
being more resistant to CMP than said wafer material;
providing a plurality of bonding pads on said second wafer, there
being a one to one correspondence between said bonding pads on said first
and second wafers;
positioning said first and second wafers such that said bonding pads
on said first wafer are brought in direct contact with said bonding pads on
said second wafer without any intervening material being present between
said bonding pads of said first wafer and said bonding pads of said second
wafer;
causing said corresponding bonding pads to bond to one another; and
removing a portion of said second wafer by CMP of the surface of
said second wafer that is not bonded to said first wafer, said stop layer in
said vias determining the amount of material that is removed.
ANALYSIS
We have reviewed each of Appellants' arguments for patentability.
However, we are in agreement with the Examiner that the claimed subject
matter is unpatentable under § 103 in view of the applied prior art.
Accordingly, we sustain the Examiner's prior art rejections for the reasons
explained in the Answer, and we add the following primarily for emphasis.
In construing claims, "the PTO must give claims their broadest
reasonable construction consistent with the specification .... Therefore, we
look to the specification to see if it provides a definition for claim terms, but
otherwise apply a broad interpretation." In re ICON Health & Fitness, Inc.,
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Application 11/150,879
496 F.3d 1374, 1379 (Fed. Cir. 2007). "[A]s applicants may amend claims
to narrow their scope, a broad construction during prosecution creates no
unfairness to the applicant or patentee." Id.
Appellants' main argument is that Hayasaka teaches away from the
combination of the method of formation of a multichip semiconductor
device of Hayasaka with the method of formation of the three dimensional
structure comprising integrated circuits of Leedy because "Hayasaka
contemplated wafer scale bonding and proceeding in a different direction"
(Br. 8). Whether a reference teaches away from a claimed invention is a
question of fact. In re Harris, 409 F.3d 1339, 1341 (Fed. Cir. 2005). "A
reference may be said to teach away when a person of ordinary skill, upon
reading the reference, would be discouraged from following the path set out
in the reference, or would be led in a direction divergent from the path that
was taken by the applicant." In re Gurley, 27 F.3d 551, 553 (Fed. Cir.
1994 ). In evaluating references it is proper to take into account not only the
specific teachings of the references but also the inferences which one skilled
in the art would reasonably be expected to draw therefrom. In re Fritch, 972
F.2d 1260, 1264--65 (Fed. Cir. 1992); In re Preda, 401 F.2d 825, 826
(CCP A 1968).
Notably, our reviewing court has also determined that a reference can
distinguish prior art in order to show the novelty of an invention without
teaching away from combining the prior art with the invention disclosed in
the reference. See Ricoh Co., Ltd. v. Quanta Computer Inc., 550 F.3d 1325,
1332 (Fed. Cir. 2008).
As pointed out by the Examiner, both Hayasaka and Leedy exemplify
the process of utilizing pads having exposed surfaces capable of bonding via
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Application 11/150,879
heat treatment (e.g., Ans. 12). Appellants have not directed us to persuasive
evidence that discourages the use of thermal diffusion bonding in this
environment. In re Gurley, 27 F.3d at 553.
Thus, Appellants' argument that Hayasaka teaches away from the
claimed invention is not persuasive of reversible error. Notably, claim 11
does not require any step of "thermal diffusion bonding" (as it merely
requires that the surface "can be bonded to another wafer by thermal
diffusion bonding"). Claim 14 requires bonding without any intervening
material therebetween.
Appellants argue that the preparation of the pads as planar surfaces
required to enable thermal bonding would require significant modification of
the Hayasaka reference to flatten the bonding surfaces to enable combination
with Leedy and Atkins references wherein thermal diffusion is taught (e.g.,
Br. 8). This argument is also not persuasive of reversible error. As the
Examiner points out, Hayasaka teaches CMP processing, the use of vias, as
well as etch stop (i.e., etchback) (col. 12, 11. 60-64), and the instant
application likewise uses these same processes to prepare planar surfaces
(Spec. 9: 1-8; Ans. 10). As previously discussed, claim 11 merely requires
that the "planar surface that can be bonded to another by thermal diffusion
bonding." So long as two surfaces can contact one another, then thermal
bonding can occur. No degree of flatness is required nor claimed. (See Ans.
10). Thus, the Examiner's determination that the surface flatness achieved
in Hayasaka alone, and certainly in the combined Hayasaka/Leedy/ Atkins
combination, would have been capable of thermal diffusion bonding is
supported by a preponderance of the evidence (Ans. 10).
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Application 11/150,879
Appellants have not directed our attention to any persuasive reasoning
or adequate evidence to establish that the Examiner's determination is
unreasonable. Nor have Appellants identified any definition or disclosure in
the Specification that would establish that Hayasaka does not encompass the
disputed limitations in claims 11 and 14.
Furthermore, Appellants have not adduced any persuasive technical
reasoning or evidence in response to the Examiner's determination that the
use of CMP and etchback as exemplified by Hayasaka for wafer preparation
with the thermal diffusion bonding method of Leedy and its wafer thinning
techniques would have been prima facie obvious, as such a combination
appears to be the use of known prior art elements according to their
established functions (see, generally Ans.; Br.). KSR Int'! Co. v. Teleflex
Inc., 550 U.S. 398, 416 (2007) ("The combination of familiar elements
according to known methods is likely to be obvious when it does no more
than yield predictable results.").
Under the flexible inquiry set forth by the Supreme Court, the PTO
must take account of the "inferences and creative steps," or even routine
steps, that an ordinary artisan would employ. Ball Aerosol and Specialty
Container, Inc. v. Limited Brands, Inc., 555 F.3d 984, 993 (Fed. Cir. 2009).
It is well settled that a reference stands for all of the specific teachings
thereof as well as the inferences one of ordinary skill in this art would have
reasonably been expected to draw therefrom. See Fritch, 972 F.2d 1264---65.
In light of these principles and the tenets of claim interpretation, a
preponderance of the evidence also supports the Examiner's rejections of the
various claims argued separately (see, e.g., Ans. 9-17). Appellants have not
shown any error in the Examiner's determination that the wafer thinning,
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Application 11/150,879
vias, etchback process and bonding methods of Hayasaka are reasonably
encompassed by the claimed method of preparing wafers (e.g., claims 11,
13, and 14) since no degree of flatness for the planar wafer surface is
specified by the claim language. Regarding claim 14, the Appellants argue
that the combination of references do not teach thinning a chip after the chip
has been bonded to another chip. The argument is not commensurate with
the scope of the claim as written. The claim is not explicit about the order of
the steps of the process regarding second wafer thinning. "A person of
ordinary skill is also a person of ordinary creativity, not an automaton."
KSR, 550 U.S. at 421.
It is incumbent upon Appellants to establish that more than routine
experimentation is necessary to configure such a known method as depicted
in Hayasaka to include the various features suggested by the secondary
references applied by the Examiner. However, no such evidence is of
record. Appellants have not provided any persuasive technical reasoning or
evidence that it would have required more than ordinary creativity to form
the recited method of thinning of wafers in preparation for thermal bonding.
Appellants at most have provided mere attorney argument to that effect, and
such arguments of counsel cannot take the place of evidence. See In re De
Blauwe, 736 F.2d 699, 705 (Fed. Cir. 1984); In re Payne, 606 F.2d 303, 315
(CCP A 1979).
A preponderance of the evidence also supports the Examiner's
rejections of dependent claims 12, 15, and 16. Appellants' argument
regarding dependent claims 12 and 15 that Hayasaka does not teach or
suggest W (tungsten) is suitable for use in the method of Hayasaka as an
etch stop (Br. 9) is not persuasive for reasons set out by the Examiner (Ans.
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Application 11/150,879
16). Hayasaka also teaches the use of W as a film wherein the film is
removed by means of CMP, etchback or the like (Hayasaka, col. 12, 11. 55-
63). Likewise, Appellants' argument regarding dependent claim 16 that
Hayasaka in further view of Huang does not teach fiduciary marks is
unavailing (Br. 1 O; Ans. 16). Huang teaches fiduciary marks in Fig. 1 as
depicted as drawing item 210 comprising bumps 21 (Final Rej. 6).
Therefore, we affirm the Examiner's § 103 rejections of all the claims
on appeal.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136.
ORDER
AFFIRMED
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