Ex Parte Gooding et al

Patent Trial and Appeal Board

Nov 12, 2013

11536360 (P.T.A.B. Nov. 12, 2013)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________________

Ex parte THOMAS MICHAEL GOODING and
BRIAN PAUL WALLENFELT
____________________

Appeal 2011-003057
Application 11/536,360
Technology Center 2100
____________________

Before ELENI MANTIS MERCADER, DEBRA K. STEPHENS, and
JON B. TORNQUIST, Administrative Patent Judges.

STEPHENS, Administrative Patent Judge.

DECISION ON APPEAL

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STATEMENT OF CASE
Appellants appeal under 35 U.S.C. § 134(a) from a final rejection of
claims 1, 5-8, 12-14, 18, and 19. We have jurisdiction under 35 U.S.C.
§ 6(b). Claims 2-4, 9-11, and 15-17 are objected to and thus, are not before
us.
We REVERSE.

Introduction
According to Appellants, the claims are directed to autonomic fault
isolation in a highly interconnected system (Abstract).

Exemplary Claim
Claim 1, reproduced below, is illustrative of the claimed subject
matter:
1. A highly interconnected computer system comprising:

a plurality of interconnected compute nodes; and

a service node that receives failure indications of system
components that have a failure, including from the
compute nodes in the highly interconnected system
comprising:

a virtual topology of the highly interconnected
computer system;

a failure indication count for each system
component in the virtual topology; and

a fault isolator to autonomically isolate faults in
the system by traversing the virtual topology and
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propagating failure indications from the system
components, wherein the fault isolator propagates
each failure indication by incrementing the failure
indication count of each component in the virtual
topology connected to the system component with
the failure.

REFERENCES
Dierauer
Davis
Blumrich
Gupta
Babbar
Masurkar
US 2002/0166088 A1
US 2003/0188228 A1
US 2004/0103218 A1
US 2005/0278354 A1
US 2006/0029096 A1
US 2006/0112061 A1
Nov. 7, 2002
Oct. 2, 2003
May 27, 2004
Dec. 15, 2005
Feb. 9, 2006
May 25, 2006

REJECTIONS
The Examiner made the following rejections:
(1) Claims 1, 6-8, and 13 stand rejected under 35 U.S.C. §103(a) as
being unpatentable over Gupta, Davis, Masurkar, and Dierauer
(Ans. 3-11).
(2) Claims 5 and 12 stand rejected under 35 U.S.C. §103(a) as
being unpatentable over Gupta, Davis, Masurkar, Dierauer, and
Blumrich (Ans. 11-12).
(3) Claims 14 and 19 stand rejected under 35 U.S.C. §103(a) as
being unpatentable over Gupta, Davis, Masurkar, Dierauer, and
Babbar (Ans. 12-13).
(4) Claim 18 stands rejected under 35 U.S.C. §103(a) as being
unpatentable over Gupta, Davis, Masurkar, Dierauer, Babbar,
and Blumrich (Ans. 13).

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We have only considered those arguments that Appellants actually
raised in the Briefs. Arguments Appellants could have made but chose not
to make in the Briefs have not been considered and are deemed to be
waived. See 37 C.F.R. § 41.37(c)(1)(vii)(2011).

ISSUE
35 U.S.C. § 103(a): Claims 1, 6-8, and 13
Appellants assert their invention is not obvious over Gupta, Davis,
Masurkar, and Dierauer because none of the references teach or suggest
propagating failure indications as recited in independent claims 1 and 7
(App. Br. 6).
Thus, the issue presented by these arguments is:
Issue: Has the Examiner erred in finding the combination of Gupta,
Davis, Masurkar, and Dierauer teaches or suggests:
a fault isolator to autonomically isolate faults in the system by
traversing the virtual topology and propagating failure indications
from the system components, wherein the fault isolator propagates
each failure indication by incrementing the failure indication count of
each component in the virtual topology connected to the system
component with the failure

as recited in claim 1?

ANALYSIS
Appellants contend the Examiner has not shown Dierauer teaches
incrementing the count for components connected to the component with the
failure (App. Br. 6). According to Appellants, Dierauer’s failure indication
counts are transmitted over the network to determine the node closest to the
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failure (Reply Br. 3). However, Appellants argue, Dierauer does not teach
failure indication counts that are incremented by the fault isolator or that the
error indication count is incremented for each component connected to the
component reporting the fault (App. Br. 6; Reply Br. 3-4).
We agree with Appellants. We find Dierauer teaches each node in a
network counts the number of times an Error Frame is detected and
transmits (propagates) its count over the network (pg. 3, [0037]).
Additionally, we agree with the Examiner that Davis teaches using a
topology model to determine the cause of a problem and from where the
fault indication originated (pg. 2, [0024]; Ans. 5 and 14). We further agree
with the Examiner that Masurkar teaches highlighting an impacted grid node
and components of the grid node to indicate a potential area of fault (pg. 7,
[0064]; Ans. 5-6 and 14).
However, the Examiner has not set forth with specificity how the cited
references render obvious the fault isolator’s service node “propagating
failure indications from the system components, wherein the fault isolator
propagates each failure indication by incrementing the failure indication
count of each component in the virtual topology connected to the system
component with the failure” as recited in claim 1 (emphases added).
Specifically, although the Examiner has shown Dierauer teaches a node
increments the failure indication count (fault count) of its own node, the
Examiner has not shown a service node fault isolator increments the failure
indication count of each component. In addition, although the Examiner has
cited paragraph 37 of Dierauer to teach incrementing the failure indication
count when an error is detected, this paragraph teaches each node counting
faults it detects and transmitting its count over the network so all nodes can
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determine which node is closest to the fault based on the node having the
highest count. The Examiner has not shown Dierauer or the combination of
references teaches the service node fault isolator incrementing the failure
indication count of each component connected to the system component
(node, connection, etc.) with the failure. Nor has the Examiner articulated
why this limitation would have been obvious to an ordinarily skilled artisan.
Accordingly, based on the record before us, we are constrained to
reverse the rejection of independent claim 1. Claim 7 recites a
commensurately worded limitation and thus, for the reasons set forth above,
we are constrained to reverse the rejection of independent claim 7. As
claims 5, 6, 8, 12-14, 18, and 19 depend from independent claims 1 and 7,
respectively, these claims stand.
The Examiner’s rejection of claims 1, 5-8, 12-14, 18, and 19 under 35
U.S.C. § 103(a) as being unpatentable is reversed.

REVERSED

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