Ex Parte Fischer

Patent Trial and Appeal Board

Sep 25, 2017

13483496 (P.T.A.B. Sep. 25, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/483,496 05/30/2012 Wieland FISCHER 42801-0180 (S0193.0183) 3710
38881 7590
Infineon Technologies AG
c/o Schiff Hardin LLP
666 Fifth Avenue
Suite 1700
NEW YORK, NY 10103
09/27/2017 EXAMINER
JEUDY, JOSNEL
ART UNIT PAPER NUMBER
2438
NOTIFICATION DATE DELIVERY MODE
09/27/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
lbrutman @ schiffhardin.com
patents-NY @ schiffhardin.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte WIELAND FISCHER
Appeal 2017-004677
Application 13/483,4961
Technology Center 2400
Before DEBRA K. STEPHENS, DANIEL J. GALLIGAN, and
JESSICA C. KAISER, Administrative Patent Judges.
GALLIGAN, Administrative Patent Judge.
DECISION ON APPEAL
Appellant appeals under 35 U.S.C. § 134(a) from a final rejection of
claims 1—3 and 5—23, which are all of the claims pending in the application.
We have jurisdiction under 35 U.S.C. § 6(b). Claim 4 has been cancelled.
We AFFIRM.2
1 According to Appellant, the real party in interest is Infineon Technologies
AG. App. Br. 1.
2 Our Decision refers to Appellant’s Appeal Brief filed July 22, 2016 (“App.
Br.”); Appellant’s Reply Brief filed January 24, 2017 (“Reply Br.”);
Examiner’s Answer mailed November 30, 2016 (“Ans.”); and Final Office
Action mailed February 12, 2016 (“Final Act.”).
Appeal 2017-004677
Application 13/483,496
STATEMENT OF THE CASE
Claims on Appeal
Claims 1,9, 19, 21, and 23 are independent claims. Claim 1 is
reproduced below:
1. A device for determining an inverse of an initial value
related to a modulus, comprising:
a unit configured to process an iterative algorithm in a
plurality of iterations, wherein the iterative algorithm comprises
an iteration loop, the iteration loop comprising the plurality of
iterations and an iteration loop requirement, wherein an
iteration of the plurality of iterations includes two modular
reductions and has, as an iteration result, values obtained by an
iteration of an extended Euclidean algorithm, wherein an
integer result of an integer division does not appear directly in
any iteration of the plurality of iterations,
wherein the unit comprises a controller configured to
perform the iteration loop as long as the iteration result of a last
executed iteration of the plurality of iterations fulfills the
iteration loop requirement, wherein the iteration loop is left,
when the iteration result of the last executed iteration of the
plurality of iterations does not fulfill the iteration loop
requirement, and wherein the iteration result of the last
executed iteration is returned to obtain or to determine the
inverse of the initial value related to the modulus,
wherein the unit comprises
a first processing sub-unit configured to process
numbers having a first wordlength, and wherein the first
processing sub-unit comprises the controller; [and]
a second processing sub-unit configured to process
numbers having a second wordlength, the second
wordlength being greater than the first wordlength, and
wherein the second processing sub-unit is configured to
perform the modular reductions included in the iteration
of the plurality of iterations, and
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wherein at least one of the first processing sub-unit
and the second processing sub-unit comprises a hardware
implementation.
Examiner’s Rejection
Claims 1—3 and 5—23 stand rejected under 35 U.S.C § 101 as being
directed to patent-ineligible subject matter. Final Act. 2—7.
ANALYSIS
Appellant contends the Examiner erred in concluding the invention, as
recited in claims 1—3 and 5—23, is directed to patent-ineligible subject
matter. Specifically, Appellant argues the claims “recite more than just an
abstract idea of a mathematical procedure of an algorithm.” App. Br. 7;
Reply Br. 1—2. In particular, Appellant argues:
Independent claims 1 and 9 recite a device being a key
generator for keys used in cryptographic applications.
Independent claim 19 recites hardware registers and that the
processing sub-unit accesses the hardware registers.
Independent claims 1, 9, and 19 thus recite a particular
machine, specifically, a device with subunits having different
word lengths or a key generator for cryptographic applications.
Independent claim 21 recites a corresponding method, and
independent claim 23 recites a corresponding non-transitory
storage medium.
App. Br. 7. Appellant further argues that “the claims quality as
‘significantly more’ than the abstract idea.” App. Br. 7—8; Reply Br. 2—6.
In Alice, the Supreme Court set forth an analytical “framework for
distinguishing patents that claim laws of nature, natural phenomena, and
abstract ideas from those that claim patent-eligible applications of those
concepts.” Alice Corp. Pty. Ltd. v. CLSBankInt’l, 134 S. Ct. 2347, 2355
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(2014) (citing Mayo Collaborative Servs. v. Prometheus Labs., Inc., 132 S.
Ct. 1289, 1296—97 (2012)). The first step in the analysis is to “determine
whether the claims at issue are directed to one of those patent-ineligible
concepts.” Id. If so, the second step is to consider the elements of the
claims “individually and ‘as an ordered combination’ to determine whether
the additional elements ‘transform the nature of the claim’ into a patent-
eligible application.” Id. (quoting Mayo, 132 S. Ct. at 1298, 1297). In other
words, the second step is to “search for an ‘inventive concept’ — i.e., an
element or combination of elements that is ‘sufficient to ensure that the
patent in practice amounts to significantly more than a patent upon the
[ineligible concept] itself.’” Id. (brackets in original) (quotingMayo, 132 S.
Ct. at 1294).
As explained further below, we agree with the Examiner’s conclusion
that the claims are directed to patent-ineligible subject matter.
Independent Claims 1 and 19
First Step
Turning to the first step, we agree with the Examiner that claims 1 and
19 “are directed to the abstract idea of a mathematical procedure of an
algorithm for calculating parameters” (Final Act. 2, 4; see also Ans. 5—6, 8—
9), i.e., a mathematical algorithm. In particular, claims 1 and 19 are directed
to “determining an inverse of an initial value related to a modulus.” See also
Spec. 1:13—15 (“The present invention relates to cryptographic algorithms
and, in particular, to algorithms for determining an inverse of a value related
to a modulus.”).
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Appellant argues that the claims recite “an integer result of an integer
division does not appear directly in any iteration of the plurality of
iterations” and that “a mathematical algorithm typically is not concerned
with whether an integer result of an integer division appears directly or not.”
Reply Br. 2. We are not persuaded, however, that this feature renders the
claimed subject matter “much more than just a mathematical algorithm.”
Reply Br. 2. Contrary to Appellant’s argument, the Specification teaches “a
modular reduction takes the role of [integer] division . . . Hence, the integer
result. . . does not appear directly.” Spec 7:4—9. That is, the claimed
integer division result is the result of the mathematical algorithm including a
modular reduction. See Spec. Fig. 3a.
Appellant’s arguments pointing out hardware features recited in the
claims (Reply Br. 1—2; App. Br. 7) do not persuade us the claims are not
directed to a mathematical algorithm. The recited hardware features of
claims 1 and 19 are generic computer components performing generic
computer tasks and merely function to implement the abstract idea on a
generic computer — processors process numbers having a wordlength (i.e.,
bit number) and registers store information.
Accordingly, the claims are directed to an abstract idea because the
claims are “directed essentially to a method of calculating” a resultant value
by “using a mathematical formula.” Parker v. Flook, 437 U.S. 584, 595
(1978) (citations omitted).
Second Step
Turning to the second step, Appellant contends that the claims recite
significantly more than the abstract idea. App. Br. 7—8; Reply Br. 3—6.
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Specifically, Appellant argues claims 1 and 19 recite “hardware elements”
which “represent meaningful limitations which transform the abstract idea
into a patent eligible application of the abstract idea” (App. Br. 7), i.e., the
claimed invention “us[es] different processing sub-units” and “hardware
registers” (Reply Br. 3—5). Appellant further argues the claims
“improve[]. . . processing sub-units” and “device[s] having several
hardware registers” (Reply Br. 3) and “include at least one limitation other
than what is well understood, routine, and conventional in the field”
“because [the claimed invention] is novel and not obvious” (App. Br. 8;
Reply Br. 3). Additionally, Appellant argues the claimed features have
“advantage[s] over the prior art” including using a “processing sub-unit
which is particularly suitable,” “solving] the security problem raised by [an]
integer result of an integer division,” and providing “side-channel-attack-
secure reduction hardware.” Reply Br. 3—6.
We are not persuaded by Appellant’s argument that the abstract idea
is transformed into patent eligible subject matter by the use of processing
sub-units and hardware registers. App. Br. 7; Reply Br. 3—5. The
processing sub-units and hardware registers Appellant highlights are
“generic computer components that would be present in any general purpose
computer” and perform generic computer functions, namely, arithmetically
processing data and storing data. See Accenture Glob. Servs., GmbHv.
Guidewire Software, Inc., 728 F.3d 1336, 1343—44 (Fed. Cir. 2013). Those
limitations “apply [an] abstract idea . . . using some unspecified, generic
computer” and “do[] no more than require a generic computer to perform
generic computer functions”; therefore, these recitations fail to make the
claimed subject matter patent-eligible. Alice, 134 S. Ct. at 2359-60.
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Furthermore, we are not persuaded by Appellant’s argument that the
claims provide “improvements to the field of processing sub-units” and
“hardware registers.” Reply Br. 3. The invention is directed to
improvements in cryptography using “algorithms for determining an inverse
of a value related to a modulus” (Spec. 1:13—15), not improvements to
processing-sub units and hardware registers. Indeed, the claims use
processing-sub units and hardware registers in conventional manners, i.e., to
process numbers and to store data.
Additionally, Appellant’s argument that the claims “include at least
one limitation other than what is well understood, routine, and conventional
in the field” because the invention is “is novel and not obvious” (App. Br. 8;
Reply Br. 3) is not persuasive. The presumably novel and nonobvious
feature claimed is “the inventive algorithm.” Spec. 13:28—29; see Spec.
1:13—15. But, “the novelty of the mathematical algorithm is not a
determining factor at all” as to the eligibility of an algorithm. Parker, 437
U.S. at 591, 598. Here, the generic computer components perform the
“inventive algorithm.” See Alice, 134 S. Ct. at 2358 (“[T]he mere recitation
of a generic computer cannot transform a patent-ineligible abstract idea into
a patent-eligible invention.”).
We are also not persuaded by Appellant’s argument that the claimed
features have “advantage[s] over the prior art” including processing using a
“processing sub-unit which is particularly suitable,” “solving] the security
problem raised by [an] integer result of an integer division,” and providing
“side-channel-attack-secure reduction hardware.” Reply Br. 3—6. The
advantages Appellant discusses are not reflected in claims 1 and 19, which
generically recite processing sub-units, rather than any “particularly
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suitable” processing sub-unit. Further, the security and attack prevention
features Appellant discusses are provided in the context of a device that uses
the mathematical algorithm “for cryptographic key-generation.” Spec. 16:6—
13, 22—27. However, claims 1 and 19 do not recite that the device actually
generates or applies cryptographic keys; therefore, Appellant’s arguments as
to advantages for cryptographic key generation are not commensurate with
the scope of claims 1 and 19.
Accordingly, we are not persuaded the Examiner erred in concluding
the invention, as recited in claims 1 and 19, is directed to patent-ineligible
subject matter. Therefore, we sustain the rejection of claims 1 and 19 under
35 U.S.C § 101.
Independent Claim 9
With respect to independent claim 9, Appellant argues the claim is
“significantly more than just a mathematical algorithm” because the claim
recites “the device is a key generator for keys used in cryptographic
applications.” Reply Br. 2, 4; App. Br. 7. Appellant further argues the
claim provides “improvements to the field of. . . key generators for keys
used in cryptographic applications.” Reply Br. 3. Appellant additionally
argues the claimed invention includes “specific advantage[s]... in the
cryptographic application” when “executed within a key generator for keys
used in cryptographic applications.” Reply Br. 4—5.
We are not persuaded by Appellant’s arguments. First, we determine
that the claims are directed to an abstract idea, i.e., a mathematical
algorithm, for the same reasons as discussed supra in regards to claims 1
and 19. Second, that the abstract idea is implemented on a device that is a
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key generator, does not transform the abstract idea into significantly more
than the abstract idea itself. Notably, the claim does not link the
mathematical algorithm with key generation. The mathematical algorithm is
not expressly tied to the key generation features, and the mathematical
algorithm is not used to generate a cryptographic key. As such, the claim’s
recitation that the device is a key generator does not serve to transform the
mathematical algorithm into significantly more than the algorithm itself.
Furthermore, the improvements and advantages for cryptographic key
generation Appellant argues (Reply Br. 2, 4; App. Br. 1) are not realized in
claim 9 because the mathematical algorithm, which provides those argued
improvements and advantages, is not used to generate cryptographic keys.
Even further, a “key generator” describes a function that can be
performed by a generic computer, rather than describing how specific
hardware operates. Accordingly, we are not persuaded the Examiner erred
in concluding claim 9 is directed to patent-ineligible subject matter.
Therefore, we sustain the rejection of claim 9 under 35 U.S.C § 101.
Dependent Claims 2 and 3
Claim 3 depends from claim 2, which recites “a modular reduction
algorithm” which “enlarge[s] a modulus.” Claim 3 recites “a modulus
register ... a target value register . . . [and] shifting] a content of the
modulus register to more significant bit positions by a number of register bit
positions to obtain a shifted content.” Claim 2 recites an additional
mathematical algorithm and, accordingly, is an abstract idea directed to
patent-ineligible subject matter. Additionally, similar to claim 19, discussed
supra, the modulus and target value registers recited in claim 3 perform
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conventional computing functions, i.e., storing data, and do not transform
the abstract mathematical algorithm into patent-eligible subject matter.
Further, under the broadest reasonable interpretation, the modulus
data manipulations using registers recited in claim 3 are not applied to the
mathematical algorithm recited in claim 1, from which claim 3 ultimately
depends. Claim 3 depends on claim 2 which depends on claim 1. Claim 2
recites a modular reduction algorithm, but that modular reduction algorithm
is not expressly tied to the mathematical algorithm recited in claim 1. In
particular, claim 2 does not require that one of the modular reductions
performed in claim 1 be performed using the modular reduction process of
claim 2. Further, claim 3 “store[s] the modulus” and manipulates that
content. But, “the modulus” manipulated in claim 3 may be broadly
interpreted as the modulus introduced in claim 2 (“enlarge a modulus”)
rather than any modulus recited in claim 1. As such, the data manipulations
recited in claim 3 are not expressly tied to the mathematical algorithm of
claim 1. That is, as currently drafted, claim 3 does not link its modular
reduction using registers to the modulus operations recited in claim 1 and
does not function to transform the abstract mathematical algorithm into
patent-eligible subject matter.
Accordingly, we are not persuaded the Examiner erred in concluding
the invention, as recited in claims 2 and 3, is directed to patent-ineligible
subject matter. Therefore, we sustain the rejection of claims 2 and 3 under
35 U.S.C § 101.
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Dependent Claims 6—8
Claim 6, from which claim 7 depends, recites similar features as
claim 9 and, for similar reasons, is not directed to patent-eligible subject
matter. Claim 7 recites that the device is “configured to generate a private
key for an asymmetric cryptographic scheme.” Claim 8 depends from claim
7 and recites that the device is “configured to output a value determined in a
last iteration of a plurality of iterations as the at least a part of the private
key.” Similar to claim 9, discussed supra, the cryptographic key created in
claim 8 is not expressly tied to the mathematical algorithm and does not
transform the abstract mathematical algorithm into patent-eligible subject
matter. Claim 8, ultimately depending from claim 1, results in “a value” that
is “at least a part of the private key.” However, as recited in claim 8, that
value is “determined in a last iteration of a plurality of iterations” (emphases
added), rather than from “the plurality of iterations” and “the last executed
iteration” recited in claim 1. Because claim 8 generates its key using a
newly introduced last iteration and a newly introduced plurality of iterations,
the key generated in claim 8 is not generated using the mathematical
algorithm recited in claim 1. And because the key of claim 8 is not
expressly tied to the mathematical algorithm of claim 1, claim 8 appears to
add only conventional key generation. That is, as currently drafted, claim 8
does not link its iterative key generation to the iterations recited in the
algorithm of claim 1. As such, the cryptographic key generated in claim 8
does not function to transform the abstract mathematical algorithm into
patent-eligible subject matter.
Similarly, claim 7 does not generate its key using the mathematical
algorithm and does not function to transform the abstract mathematical
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algorithm into patent-eligible subject matter. Accordingly, we are not
persuaded the Examiner erred in concluding the invention, as recited in
claims 6—8, is directed to patent-ineligible subject matter. Therefore, we
sustain the rejection of claims 6—8 under 35U.S.C§ 101.
Remaining Claims 5, 10—18, and 20—23
Independent claim 21 is a method claim including features recited in
independent claims 1 and 9 for which Appellant offers no additional
persuasive arguments for patentability. See Reply Br. 5. Independent
claim 23 recites a non-transitory storage medium storing code for
performing the mathematical algorithm for which Appellant offers no
additional persuasive arguments for patentability. See id. Accordingly, for
the same reasons discussed supra, we are not persuaded the Examiner erred
in concluding independent claims 21 and 23 are directed to patent-ineligible
subject matter. Therefore, we sustain the rejection of claims 21 and 23
under 35 U.S.C § 101.
Additionally, dependent claims 5, 10-18, 20, and 22, for which
Appellant offers no additional persuasive arguments for patentability (see
id.), do not transform the mathematical algorithm recited in their respective
independent claims into patent-eligible subject matter. Claims 13—18, 20,
and 22 recite additional mathematical algorithms. Claim 5 recites generic
computer components. Claims 10—12 recite that first, second, third, and
fourth hardware registers store particular values and additionally recite that
“swapping” of register contents “is performed” in certain circumstances. As
noted above, the use of registers to store data is the conventional use for
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registers and does not confer patent eligibility on these claims.3
Accordingly, for the same reasons discussed supra, we are not persuaded the
Examiner erred in concluding claims 5, 10—18, 20, and 22 are directed to
patent-ineligible subject matter. Therefore, we sustain the rejection of
claims 5, 10-18, 20, and 22 under 35 U.S.C § 101.
DECISION
We affirm the Examiner’s decision to reject claims 1—3 and 5—23
under 35 U.S.C § 101 as being directed to patent-ineligible subject matter.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 41.50(f).
AFFIRMED
3 These claims recite a step of “swapping” rather than a device that is
configured to swap. In the event of further prosecution, the Examiner may
wish to consider whether the recitation of the step of “swapping” in
apparatus claims 10-12 comports with 35 U.S.C. §112,12, and, in
particular, whether it is sufficiently clear when the limitations of the claims
are met and whether performance of the method step “swapping” is required
to meet the limitations of claims 10—12. See IPXL Holdings, L.L.C. v.
Amazon.com, Inc., 430 F.3d 1377, 1384 (Fed. Cir. 2005); see also MPEP
§ 2173.05(p)(II).
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