Ex Parte Baker

Patent Trial and Appeal Board

Apr 15, 2015

11818996 (P.T.A.B. Apr. 15, 2015)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/818,996 06/15/2007 R. Jacob Baker MICS:0161 / MAN /
2006-07
2038
52142 7590 04/15/2015
FLETCHER YODER (MICRON TECHNOLOGY, INC.)
P.O. BOX 692289
HOUSTON, TX 77269-2289
EXAMINER
JEAN PIERRE, PEGUY
ART UNIT PAPER NUMBER
2845
MAIL DATE DELIVERY MODE
04/15/2015 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
________________

Ex parte R. JACOB BAKER
1

________________

Appeal 2013-004251
Application 11/818,996
Technology Center 2800
________________

Before MARK NAGUMO, KAREN M. HASTINGS and
JEFFREY W. ABRAHAM, Administrative Patent Judges.

NAGUMO, Administrative Patent Judge.

DECISION ON APPEAL
R. Jacob Baker (“Baker”) timely appeals under 35 U.S.C. § 134(a)
from the Final Rejection
2
of claims 1–3, 6, 8–17, 21–24, and 26–28.
3

We have jurisdiction under 35 U.S.C. § 6. We AFFIRM-IN-PART.

1
The real party in interest is listed as Micron Technology, Inc. (Appeal
Brief, filed 13 August 2012 (“Br.”), 2).
2
Office action mailed 15 February 2012 (“Final Rejection”; cited as “FR”).
3
The Examiner has indicated that remaining co-pending claims 7, 18–20,
and 25 are allowable. (FR 1, ¶ 6.)
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OPINION
A. Introduction
4

The subject matter on appeal relates to methods, systems, and devices
for measuring signals. Most generally, claim 22 covers a method in which
an analog signal is measured by amplifying both the analog signal and a
reference signal, latching an output based on which is larger to form a data-
stream, and digitally filtering the data-stream. Claim 14 covers a system
comprising a memory element and a delta-sigma modulator that comprises a
comparator that includes a differential amplifier. Somewhat more
particularly, claim 1 covers a device for reading data from a data location.
The claimed device comprises a delta-sigma modulator that comprises a
comparator comprising a preamplifier (directly coupled to a data location)
and a latch (coupled to the output of the preamplifier), and a digital filter
comprising a counter (coupled to the output of the comparator).
The ʼ996 Specification explains that memory devices typically
comprise an array of memory elements that store data and associated sense
amplifiers that read the data from the memory elements. (Spec. 2 [002].) In
order to achieve higher densities of memory, the memory elements may
output plural voltage levels, not just two levels (i.e., zero and one). The
necessity of distinguishing plural output levels increases the susceptibility of
the sense amplifiers to noise from all sources. (Id. at 3 [004].) Similar
concerns are said to be associated with sense amplifiers in imaging devices

4
Application 11/818,996, Comparators for delta-sigma modulators,
filed 15 June 2007. We refer to the “ʼ996 Specification,” which we cite as
“Spec.”
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(id. at [005]). Thus, Baker refers to memory elements and imaging devices
collectively as “data locations.” (Id. at 9 [0037].) Baker seeks patent
protection for various embodiments comprising “quantizing circuits” that
can resolve small differences between voltage or current levels in multi-bit
memories or light sensors in ways that allow higher densities of elements.
(Id. at 6–7 [0029].) This is accomplished in part by sampling the signal
repeatedly and filtering (e.g., average or sum) the samples [apparently the
reason for the “delta-sigma” portion of the name] to reduce the impact of
noise. (Id.) The ʼ996 Specification provides numerous descriptions of
comparator circuits that are said to provide decreasing levels of power
consumption. (Spec., e.g., Figs. 16 and 18–23.)
The Examiner maintains the following ground of rejection:
5

Claims 1–3, 6, 8–17, 21–24, and 26–28 stand rejected under
35 U.S.C. § 103(a) in view of the combined teachings of Afghahi,
6

Lee,
7
and Fowler.
8

5
Examiner’s Answer mailed 27 November 2012 (“Ans.”).
6
Morteza Afghahi, Compact comparator, U.S. Patent No. 5,955,899
(1999).
7
See T. Lee, Photodetector circuit and methods, U.S. Patent
No. 6,348,682 B1 (2002).
8
Boyd Fowler and Abbas El Gamal, CMOS image sensor with pixel level
A/D conversion, U.S. Patent No. 5,461,425 (1995).
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B. Discussion
Findings of fact throughout this Opinion are supported by a
preponderance of the evidence of record.
We understand the Examiner to have determined that the claims
encompass common, or at least sufficiently related, subject matter, that the
different recitations of the three independent claims can be discussed in
relation to the teachings of Afghahi and Lee.
9
The Examiner emphasizes the
breadth of the claims and the breadth of the disclosure, and the apparent
absence, in the Examiner’s view, of “clear support” for certain terms and
limitations (see, e.g., FR 4, ll. 12–19).
10
Perhaps relying on the perceived
breadth of these terms, the Examiner often does not direct our attention to
specific teachings of particular elements in the references.
Baker focusses on recitations in the claims, and urges that the
Examiner has failed to make sufficiently specific findings to support a prima
facie case of obviousness. (E.g., Br. 6, ll. 7–12; 9, ll. 1–2; para.
bridging 10-11; Reply
11
para. bridging 5–6, discussing claim 14; 8–10,
discussing claims 22, 26, and 27.) Perhaps relying on general
understandings of terms of art, Baker often does not direct our attention to
definitions of terms in the ʼ996 Specification, in authoritative references, or
in the prior art of record. Nor does Baker often explain, beyond making the

9
The Examiner, in the statements of the rejections, cites Fowler only in
reference to claim 24 (FR 3; Ans. 5), which Baker does not argue separately.
We therefore need not consider Fowler further.
10
The Examiner has not rejected any claims for lack of written description.
We therefore understand these remarks to be, at most, expressions that the
claims are broad.
11
Reply Brief filed 28 January 2013 (“Reply”).
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assertion, why various elements in the references do not meet the limitations
recited in the claims.
On appeal, the initial burden is on the appellant to show harmful error
in the action from which an appeal is taken. As to those issues for which
that burden has been carried, the onus shifts to the Examiner to explain why
the evidence and arguments of the appellant are outweighed by evidence of
record.
12
We address claims argued separately to the extent necessary to our
decision. Otherwise, the claims stand or fall with the claims from which
they depend.
Claims 1 and 22
We begin with independent claim 1, which reads:
A device, comprising:
a data location;
a delta-sigma modulator directly coupled to the data
location, wherein the delta-sigma modulator comprises
a comparator, wherein the comparator comprises:
a preamplifier coupled to the data location; and
a latch coupled to an output of the preamplifier; and
a digital filter coupled to an output of the comparator,
wherein the digital filter comprises a counter.
(Claims App., Br. 14; some indentation and emphasis added.)
Claims 2, 3, 6, and 8–13 depend from claim 1.

12
Baker complains of some new arguments (e.g., Reply 8, ll. 7-18), but
responds on the merits (id. at l. 19 to 9, l. 8). Details of the conduct of the
examination, as opposed to the relative merits of the rejections and the
responses, is not within our jurisdiction, as relief may be obtained via
petition to the Director and designated Officials under 37 C.F.R. §1.181.
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The Examiner finds that Afghahi discloses, in Figures 1 and 2 (not
reproduced here), a sigma-delta
13
modulator that comprises a comparator
including a differential amplifier and a regenerative latch. (FR 2, ll. 8–11.)
The Examiner finds further that the comparator is coupled to a CMOS image
array, which, according to the Examiner, is both a data location (required by
claim 1) and a memory element (required by claim 14) because “they [both]
represent the same element” (Ans. 9, ll. 6–7.) The Examiner finds further
that, although “Afghahi also discloses a digital counter that is coupled to the
output of the comparator” (FR 2, ll. 18–19; Ans. 5, ll. 3–4; both citing
Afghahi Fig. 4), “Afghahi does not teach the digital filter includes a counter”
(FR 2, l. 20; Ans. 5, l. 5), as well as certain other limitations.
The Examiner finds that Lee describes an image sensor comprising a
photodiode (a data location) coupled to a comparator circuit that is directly
coupled to a digital filter that includes an up/down counter. (FR 2, l. 23 to 3,
l. 2; Ans. 5, ll. 8–11.) The Examiner finds further that Lee describes a
differential amplifier 300
14
in Fig. 5 (not reproduced here) comprising a
current mirror circuit formed by transistors, and that the image sensor
operates at reduced power levels. (FR 3, ll. 1–6; Ans. 5, ll. 11–17.) The
Examiner concludes that “it would have been obvious . . . to have applied
the teachings of Lee in the sigma delta modulator of Afghahi to improve the

13
Afghahi refers to a “Sigma-Delta A/D converter” (Afghahi col. 1, l. 20).
Because Baker does not dispute that Afghahi describes (or suggests) a delta-
sigma modulator as recited in the claims, we may assume, without deciding,
that the two terms are synonymous for purposes of this appeal.
14
Throughout this Opinion, for clarity, elements in figures are presented in
bold font, regardless of their presentation in the original document.
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performance and efficiency of the converter.” (FR 3, ll. 6–8; Ans. 5,
ll. 16-18.)
Baker argues that “the cited portions of Afghahi fail to teach ‘a digital
filter coupled to an output of a comparator, wherein the digital filter
comprises a counter.” (Br. 5, ll 16–17.) As Baker urges (id. at ll. 17–20),
Afghahi Figure 5, shown below, does not appear to show that the digital
counter is coupled to the output of the comparator. The output of
comparator 510 is fed to clocked control logic 512, which in turn sends
count pulses and a reset pulse to digital counter 500, as well as other signals
to comparator 510.
{Afghahi Figure 5 is shown below}

{Afghahi Fig. 5 shows an A/D converter with a comparator 510}
Baker argues (id.) that the Examiner has not provided support for the
finding that a signal from comparator 510 reaches counter 500. In
particular, Baker urges (Br. 6), the Examiner’s finding (FR 3, ll. 17–20) that
control logic 512 “will not alter, change or modify the signal to the point
where a different signal has reached the counter” is contradicted by
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Afghahi’s teachings. Rather, Baker argues, the control logic appears to
utilize a signal received from the comparator “to generate a separate output
count pulse and/or a reset pulse.” (Id. at 6, ll. 7-10 , citing Afghahi, col. 6,
ll. 13-21.)
The Examiner responds that Afghahi, column 6, lines 13–21, supports
the rejection, finding that “the stop count is supplied to the control logic
when the ladder voltage (see Fig. 5) rises above the analog input.” (Ans. 6,
ll. 12–16.)
The disputed paragraph of Afghahi reads:
FIG. 5 is an A/D converter application utilizing a
comparator according to the invention. A digital counter 500
advances from a zero count while a ladder network 504
driven by the counter outputs a stair case ladder voltage as
shown. The comparator 510, receiving both ladder voltage
and analog input voltage, provides a signal OUT+ to stop the
count when the ladder voltage rises above the input voltage.
Control logic 512 determines the count frequency based on
the clock 516 and provides RST and SL signals to the
comparator.
(Afghahi, col. 6, ll. 13–21; emphasis added.)
This passage supports Baker’s arguments more than it supports the
Examiner’s findings. The Examiner does not explain how “determin[ing]
the count frequency based on the clock” amounts to a simple pass-through,
without altering or modifying the output OUT+ of comparator 510, which is
said to “stop the count.” In particular, the Examiner has not explained how
the “count pulses” sent by control logic 512 to digital counter 500 are merely
the “stop count” pulse[s] sent by comparator 510.
15

15
We decline, in the first instance, to undertake a detailed analysis of how a
person having ordinary skill in the art would have understood the system
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Baker urges further that Afghahi teaches away from separate amplifier
stages taught by Lee. (Br. 6, ll. 18–30, citing Afghahi col. 2, ll. 1–7.) In
particular, Afghahi teaches that a separate amplifier stage requires increased
power consumption and more physical area on the IC die, and that the
disclosed comparator circuit avoids these problems. In this regard, the
Examiner does not explain why transimpedance amplifier 300, auto-zero
amplifier 400, and comparator 500, illustrated in block form in Lee, Figure 4
(and in component circuit diagrams in Lee, Figures 5–7, respectively),
would have been regarded as equivalents to the comparator circuits
described by Afghahi in Figures 1 and 2, and illustrated in block form in
comparator 510 in Figure 5, such that substitution of Lee’s digital filter 235
for Afghahi’s digital counter 500 would have been understood to be the
substitution of an equivalent element in an equivalent circuit.
We therefore reverse the rejection of Claim 1 as obvious in view of
the combined teachings of Afghahi and Lee.
The Examiner’s findings regarding separately argued claims 8 and 11
do not cure the deficiencies regarding claim 1. We therefore also reverse the
rejection of claims 2, 3, 6, and 8–13.
Independent claim 22 reads:
A method, comprising:
amplifying a difference between an analog signal and a
reference signal, wherein

described in Fig. 5 to work. That analysis requires fact-finding that Baker is
entitled to review and challenge as Baker sees fit. That “give and take” is an
essential aspect of examination, but an appeal is ill-suited as a place to begin
such an inquiry.
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amplifying the difference comprises:
amplifying the analog signal to produce an amplified
analog signal; and
amplifying the reference signal to produce an
amplified reference signal;
latching an output based on which of the two amplified
signals is larger to form a data-stream; and
digitally filtering the data-stream.
(Claims App., Br. 17; some indentation, paragraphing, and emphasis added.)
Claims 23, 24, and 26–28 depend from claim 22.
In the principal Brief on appeal, Baker focuses on the failure, in its
view, of the Examiner to identify separate amplification of the analogue
signal and the reference signal. (Br. 10–11.) In the Reply, Baker adds the
further argument that there is no teaching that the data-stream is digitally
filtered. (Reply 8, ll. 19–27.)
We might decline to consider the digital filtering argument as
untimely raised, with no good cause shown why that argument could not
have been raised in the principal Brief. 37 C.F.R. §41.41(2) (2012).
However, the Final Rejection does not contain any separate discussion of
claim 22 (FR 2–4), notwithstanding the separate arguments raised previously
by Baker regarding this claim (see the response filed on 29 December 2011,
pages 12–13). Moreover, the Examiner expanded the discussion of claim 22
considerably in the Answer (Ans. 10–11), albeit without discussing the
digital filtering limitation. Against this background, in view of Baker’s
extensive arguments against the rejection of claim 1 regarding the absence of
digital filtering, we do not consider Baker’s failure to raise expressly that
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argument against claim 22 in the Brief so egregious as to merit dismissal of
that argument.
16

Therefore, as we have not been persuaded by the Examiner’s
arguments that digital filtering would have been obvious in view of the
teachings of the prior art cited in the rejection of claim 1, we are not
persuaded by the same arguments as applied against claim 22. The
Examiner’s findings regarding claim 26 (driving nodes of latches to definite
voltages) and claim 27 (transmitting the data-stream to a current switch) do
not correct the deficiencies with respect to independent claim 22.
We reverse the rejections of claims 22–24 and 26–28.
Independent claim 14
Claim 14 reads:
A system, comprising:
a device comprising:
a memory element; and
a delta-sigma modulator directly coupled to the memory
element, the delta-sigma modulator comprising

16
The rather extensive elaborations of the findings of fact and arguments in
the Brief, the Examiner’s Answer, and the Reply suggest that more detailed
consideration of the claim limitations and the references during the
examination period proper by both the Examiner and Baker would have been
more fruitful. As a matter of efficient process, except in extraordinary
circumstances not present here, we address the appeal in the condition
presented, rather than seeking clarification of seemingly obscure arguments.
See, e.g., 37 C.F.R. § 41.1(b) (rules to be “construed to secure the just
speedy, and inexpensive resolution of every proceeding before the Board”)
and § 41.50(a)(1), last sentence (authorizing remand).
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a comparator that includes a differential amplifier,
wherein inputs of the differential amplifier are coupled to
the memory element and
a reference signal.
(Claims App., Br. 15; some indentation, paragraphing, and emphasis added.)
Claims 15–17 and 21 depend from claim 14.
Baker urges that Afghahi, in Figure 4, shows a pixel array 400, but
does not disclose “any teaching in Afghahi of a device comprising a memory
element,” and that neither Lee nor Fowler provide any teachings that obviate
this deficiency. (Br. 9, ll. 1–11; Reply 5, ll. 25–26.)
The Examiner’s finding that “[t]he data location and the memory
element can be interchangeably used in the claims, for they represent the
same element” (Ans. 9, ll. 6–7) is inaccurate. However, the sentence that
follows immediately, “[t]hough the comparator of Afghahi is used in a
multi-bit delta sigma modulator it is to be noted that the comparator of
Afghahi can also be used in memory circuits (see col. 1 lines 16-30); in this
case, the comparator of Afghahi will be directly coupled to the memory
circuits” (Ans. 9, ll. 7–10), is directly on point. Given Baker’s recognition
in the ʼ996 Specification of the close similarity of imaging arrays and
memory arrays in the context of reading their contents with A/D converters
and with delta-sigma comparator-based A/D converters (Spec. 9 [0037]), we
are not persuaded that adequate notice of the proper basis of the obviousness
rejection was obscured by the Examiner’s technical error.
Claim 16 depends from claim 14 and reads:
The system of claim 14, wherein the comparator comprises a
latch coupled to the output of the differential amplifier.
(Claims App., Br. 15.)
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Baker argues further that the regenerative latch described by Afghahi
is not coupled to the output of a differential amplifier because the latch itself
“appears to operate as an amplifier.” (Br. 10, ll. 11–14, citing Afghahi,
col. 1, ll. 38–60.)
This argument is not persuasive of harmful error in the Examiner’s
finding (FR 2, ll. 18–20; Ans. 9, ll. 14–15) that the latches shown in
Afghahi, Figure 4, shown below, are coupled to the output of a differential
amplifier, as required by claim 16.

{Fig. 4 shows a comparator used in a CMOS imaging application}
Part of the problem may lie in the absence, in the present record, of a
clear definition of the term “differential amplifier.” Baker appears to argue
as though this phrase is a term of art that excludes the comparator shown in
Fig. 4 (which accepts a signal from the pixel array and from a reference
voltage). However, Baker has not come forward with evidence showing that
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the term has such a meaning to those having ordinary skill in the art.
17

Moreover, the portion of Afghahi cited by Baker is part of the background.
Baker does not explain why the Examiner’s reliance on the embodiment in
Figure 4 as evidence of the obviousness of this limitation is harmfully
erroneous. (Reply 7, discussing only the Background section cited supra.)
We affirm the rejection of claims 14–17 and 21.
C. Order
We REVERSE the rejection of claims 1–3, 6, and 8–13, 22–24,
and 26–28.
We AFFIRM the rejection of claims 14–17 and 21.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED-IN-PART
bar

17
To be clear, the issue is not the adequacy of the original disclosure, which
is directed to persons having ordinary skill in the art. Rather, the issue is
whether the record contains sufficient evidence that a non-expert reviewer
can make adequate findings to draw conclusions as to the meaning of these
terms to the artisan. Cf. In re Mayne, 104 F.3d 1339, 1344 (Fed. Cir. 1997)
in which the Applicant tried to show unexpected results. The court held that
“[e]ven were it obvious to a practitioner of the art, applicants have the
burden to provide the PTO with evidence showing that such is the case.”