Ex Parte Ahluwalia

Patent Trial and Appeal Board

Jan 30, 2013

10790509 (P.T.A.B. Jan. 30, 2013)

UNITED STATES PATENT AND TRADEMARK OFFICE
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BEFORE THE PATENT TRIAL AND APPEAL BOARD
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Ex parte MANISH K. AHLUWALIA
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Appeal 2010-003184
Application 10/790,509
Technology Center 2100
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Before: ROBERT E. NAPPI, ERIC S. FRAHM, and TREVOR M.
JEFFERSON, Administrative Patent Judges.

JEFFERSON, Administrative Patent Judge.

DECISION ON APPEAL

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Application 10/790,509

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STATEMENT OF CASE
Appellant appeals under 35 U.S.C. § 134(a) from a Final rejection of
claims 1-23. We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.
Introduction
The claims are directed to memory management using virtual address
space and physical address space for a process associated with a removable
memory, mappable device. Abstract. Claims 1 and 23 reproduced below
are illustrative of the claimed subject matter:
1. A computing device, comprising:
a processor;
a memory coupled to the processor; and
program instructions provided to the memory and
executable by the processor to:
track a virtual address space for a process associated with
a device connected to the computing device;
release a physical address space associated with the
virtual address space when the device has a connection
removed from the computing device;
provide an indication in a virtual memory data structure
associated with the process that the virtual address space,
previously available to the process, is no longer valid for use by
the process;
wherein the indication is triggered by detection that the
physical address space that was being used by processes
associated with the device has been released; and
wherein the indication occurs responsive to the physical
address space being released and before release of the virtual
address space by the process.

23. A computer readable storage medium having computer
readable instructions stored thereon for execution by a device to
perform a method, comprising:
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dereferencing a virtual address space for a process
associated with a removable memory mappable device as part
of a memory management system on a computing device;
releasing a physical address space when the device is
logically disconnected from the computing device; and
at the release of the physical address space used by the
process and before the process has released the virtual address
space, registering an indication in a virtual memory data
structure for the process that the virtual address space is no
longer available to the process in a manner which does not
violate semantics for an operating system the computing device.

Rejections
The Examiner made the following rejections:
Claim 23 stands rejected under 35 U.S.C § 112 first paragraph as
failing to comply with written description requirement. Ans. 3-4.
Claim 1-23 stands rejected under 35 U.S.C § 103(a) as being
unpatentable over Arimilli (US 6,907,494 B2, Jun. 14, 2005) and Browning
(US 6,918,023 B2, Jul. 12, 2005). Ans. 4-12.

Claim Grouping
Appellant’s arguments for independent claims 8 (App. Br. 18-24), 19
(App. Br. 27-33), 22 (App. Br. 33-38), and 23 (App. Br. 38-43) rely on the
arguments presented for independent claim 1. We select independent claim
1 as representative of claims 8, 19, 22 and 23. Appellant presents separate
argument for independent claims 13 and 23, which we address separately.
Finally, dependent claims 2-7, 9-12, 14-18 and 20-21 stand or fall with their
respective independent claims.

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ANALYSIS
Claim 23 – 35 U.S.C. § 112 ¶1 Rejection
Issue: Did the Examiner err in rejecting claim 23 under 35 U.S.C.
§ 112 ¶1 for failing to clearly define “computer readable storage medium” as
recited in claim 23?
We do not agree with the Examiner that Appellant’s Specification
fails to define or describe the term and is therefore not in possession of the
invention of claim 23 because:
it is . . . well known in the art that computer readable medium is
a broad term in accordance with plain meaning that includes
any type of memory devices, as well as signals or carrier waves
such that any type of memory devices, as well as signals or
carrier waves can store and transfer information.

Ans. 13. Appellant’s Specification describes computer readable media
sufficient to convey that the inventor possesses “computer readable storage
medium” as recited in claim 23. App. Br. 9-10; Reply 1-2. In addition, an
amendment to exclude transitory signals would typically not give rise to a
new matter amendment. See David J. Kappos, Subject Matter Eligibility of
Computer Readable Media, 1351 OFF. GAZ. PAT. OFFICE 212 (Feb. 23,
2010)(noting that adding “non-transitory” to avoid a 35 U.S.C. § 101
rejection would not raise the issue of new matter). Here, we find that the
Examiner erred in finding that “computer readable storage medium” failed
to comply with 35 U.S.C. § 112 ¶1. We do not sustain the Examiner’s
rejection of claim 23.

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Independent Claim 1 – § 103(a) Rejection
Issue: Did the Examiner err in rejecting claim 13 under 35 U.S.C.
§ 103(a) by finding that Arimilli and Browning teach or suggest “an
indication in a virtual memory data structure associated with the process that
the virtual address space, previously available to the process, is no longer
valid” and that “the indication is triggered by detection that the physical
address space that was being used by the process associated with the device
has been released” as recited in claim 1?
Appellant contends that the RPN list processing in Browning does not
teach or suggest “indication in a virtual memory data structure associated
with the process that the virtual address space, previously available to the
process, is no longer valid.” App. Br. 11-16; Reply 2-4. Specifically,
Appellant contends that the RPN entry is invalid merely indicates that the
“virtual-to-physical mapping contained in the RPN … must be updated.”
App. Br. 12 (emphasis omitted). Appellant also argues that the RPN list is
not “associated with the process” and thus cannot meet the limitation of
claim 1. App. Br. 13. Finally, Appellant contends that the transient and
memory-remove-in-progress flags identified by the Examiner fail to provide
“an indication in a virtual memory structure” as recited in claim 1. App. Br.
13-14; Reply 2-3.
The Examiner found Browning teaches or suggests “providing a flag
to indicate when virtual memory is removed in progress … and reinitializing
real page number RPN entry and mark entry as valid when memory remove
in progress flag is not set.” Ans. 15. Thus, the memory remove in progress
flag provides an indication in a virtual memory structure as recited in claim
1. Ans. 15 (citing Browning col. 8, ll. 32-44; Fig. 8, step 834). The
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Examiner also found that the memory remove process, in addition to setting
the memory remove in progress flag, also scans all registered RPN lists and
invalidates all entries that correspond to the range of memory to be removed.
Ans. 5; see Browning, col. 8, l. 53 – col. 9, l. 10; Fig. 9. Thus, the Examiner
asserts that the memory remove in progress flag is set in the buffer
descriptor which is stored with the RPN list, which contains the sets of
virtual addresses. Ans. 16.
Having reviewed Appellant’s arguments that the Examiner erred, we
agree with the Examiner. Although the Examiner identifies the transient
flag in Browning as teaching the claimed “indication in a virtual data
structure,” Ans. 15, the Examiner specifically states that the memory remove
in progress flag also corresponds to the indication that is part of a virtual
data structure as part of the buffer descriptor stored with the RPN. Ans. 16.
We agree with the Examiner that the memory remove process invalidates the
RPN list and sets the memory remove in progress flag, thus indicating within
the RPN lists or data structure that the physical memory associated with the
RPN lists is invalid. See Ans. 5; 15-16; Browning, col. 8, l. 18 – col. 9, l.
10; Figs. 8 and 9.
We are also not persuaded by Appellant’s contention that the RPN list
is not associated with a process. App. Br. 14; Reply 4-5. One cannot show
nonobviousness by attacking references individually where the rejections are
based on combinations of references. See In re Merck & Co., Inc., 800 F.2d
1091, 1097 (Fed. Cir. 1986). The Examiner relies on Arimilli, not
Browning, to teach or suggest virtual address space associated with a
particular process and release of the physical address space when the device
has a connection removed. Ans. 4 (citing Arimilli, col. 5, l. 66 – col. 6, l.
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39; Fig. 2; col. 7 ll. 32-57). Furthermore, the Examiner correctly states
Browning teaches or suggests that RPN lists include multiple sets of virtual
address lists, such that one of ordinary skill in the art would understand that
such lists correspond to particular processes disclosed in Arimilli. See Ans.
16. Thus, it is the combination of Arimilli and Browning that the Examiner
properly found teaches or suggests an indication in a virtual memory data
structure associated with the process that the virtual address space,
previously available to the process, is no longer valid as recited in claim 1.
Appellant contends that the moving or removing of real pages of
memory in Browning is not the same as the release of physical address space
as recited in claim 1. Id., Reply 5. Thus, Appellant contends that Arimilli
and Browning do not teach or suggest “the indication is triggered by
detection that the physical address space that was being used by the process
associated with the device has been released” as recited in claim 1. App. Br.
14-18. We disagree with Appellant. During the memory remove process,
Browning teaches or suggests setting an in-progress flag and invalidating the
RPN lists associated with that memory. Ans. 5; see Browning, col. 8, l. 53 –
col. 9, l. 10; Figs 8 and 9. Accordingly, we agree with the Examiner that
Browning teaches to trigger an indication during a memory remove process.
Ans. 17-18. The triggering and remove process is separate from the
Browning teachings that the RPN lists are reinitialized or remapped to the
new memory space. Id. Contrary to Appellant’s arguments (App. Br. 14-
18; Reply 5), the additional steps of relocating the physical or real memory
space does not negate that Browning teaches that removal of real pages of
memory from its prior location invalidates the RPN list and sets the in-
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progress flag. Ans. 5; see Browning, col. 8, l. 53 – col. 9, l. 10; Figs. 8 and
9.
Based on the foregoing, we find that the Examiner did not err in
finding that Arimilli and Browning teach or suggest “an indication in a
virtual memory data structure associated with the process that the virtual
address space, previously available to the process, is no longer valid” and
that “the indication is triggered by detection that the physical address space
that was being used by the process associated with the device has been
released” as recited in claim 1. Accordingly, we sustain the Examiner’s
rejection of claim 1 under 35 U.S.C. § 103(a). We also sustain the
Examiner’s rejection of independent claims 8, 19, 22 and 23 under 35 U.S.C.
§ 103(a), which rely on the same arguments presented for independent claim
1.
Independent Claim 13 – § 103(a) Rejection
Issue: Did the Examiner err in finding that Browning and Arimilli
teach or suggest “means unmapping a virtual address space for the process ...
in a manner which does not violate semantics for an operating system of the
computing device” as recited in claim 13.
Appellant contends that Arimilli fails to teach or suggest unmapping
virtual space in manner that does not violate operating system semantics.
App. Br. 27. Appellant contends that its Specification describes various
techniques of unmapping “without violating semantics of an operating
system” that are not encompassed by the Arimilli teaching for unmapping
without the need for operating system supervision as found by the Examiner.
App. Br. 25-27 (citing Spec. 17:1-19, 19:6-23, 20:17-21:2).
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We disagree with Appellant’s contention. The Examiner found
Arimilli teaches unmapping of a virtual memory address space for a process.
Ans. 25. The Examiner also found that this unmapping takes place via the
move and mapping engines of the processor without the operating system
having to direct and control the reconfiguration of physical memory. Id.
Given the broadest reasonable construction in light of the disclosure,
see In re Am. Acad. of Sci. Tech. Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004),
unmapping in a manner that does not violate operating system semantics
recited in claim 13 is not limited to techniques expressly found in
Appellant’s Specification. Indeed, Appellant’s Specification simply provides
examples of techniques but does not limit unmapping without violating
semantics to a particular method. A determination of obviousness does not
require the claimed invention to be expressly suggested by any one or all of
the references. See e.g., In re Keller, 642 F.2d 413, 425 (CCPA 1981).
Although Arimilli does not use the express techniques found in Appellant’s
Specification, we agree with the Examiner that the teaching of Arimilli that
removes a memory module from physical memory without the operating
system’s direction or control, prior to the physical removal of the memory,
encompasses the unmapping without violating semantics limitation of claim
13.
We find that Examiner did not err in finding that Browning and
Arimilli teach or suggest “means unmapping a virtual address space for the
process ... in a manner which does not violate semantics for an operating
system of the computing device” as recited in claim 13. We sustain the
Examiner’s rejection of claim 13 under 35 U.S.C. § 103(a).

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DECISION
For the above reasons, we REVERSE the Examiner’s rejection of
claim 23 for failure to comply with 35 U.S.C. § 112 ¶1 and AFFIRM the
Examiner’s rejection of independent claims 1, 8, 13, 19, 22 and 23 and
related dependent claims 2-7, 9-12, 14-18 and 20-21 under 35 U.S.C.
§ 103(a).
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

ELD