Ex Parte 7,127,631 et al

Patent Trial and Appeal Board

Sep 16, 2014

95000501 (P.T.A.B. Sep. 16, 2014)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
95/000,501 10/03/2009 7,127,631 1426-631RE 2732
37509 7590 09/16/2014
DECHERT LLP
P.O. BOX 390460
MOUNTAIN VIEW, CA 94039-0460
EXAMINER
PEIKARI, BEHZAD
ART UNIT PAPER NUMBER
3992
MAIL DATE DELIVERY MODE
09/16/2014 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
________________

KINETIC TECHNOLOGIES, INC.
Requester and Cross-Appellant

v.

ADVANCED ANALOGIC TECHNOLOGIES, INC.
Patent Owner and Appellant
________________

Appeal 2014-003313
Reexamination Control 95/000,501
Patent 7,127,631 B2
Technology Center 3900
________________

Before BRADLEY W. BAUMEISTER, JEREMY J. CURCURI, and
JENNIFER L. McKEOWN, Administrative Patent Judges.

CURCURI, Administrative Patent Judge.

DECISION ON APPEAL

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Patent 7,127,631 B2

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STATEMENT OF THE CASE
This proceeding arose from a request by Kinetic Technologies, Inc.
for an inter partes reexamination of U.S. Patent 7,127,631, titled “Single
Wire Serial Interface Utilizing Count of Encoded Clock Pulses With Reset”
(the ’631 patent).1 Patent Owner appeals the Examiner’s decision to reject
claims 1-6, 8-12, 14-16, 18, 22-24, 26, 27, and 44. PO App. Br. 1; see also
RAN 4-34. Requester cross-appeals the Examiner’s determination not to
adopt the proposed rejection of claims 7 and 13. 3PR App. Br. 1; see also
RAN 4-34. Oral arguments were heard on June 25, 2014.
The ’631 patent is involved in litigation. The case is captioned
Advanced Analogic Technologies, Inc. v. Kinetic Technologies, Inc.; Case
No. 3:09-cv-01360. On December 15, 2009, the case was stayed. PO App.
Br. 1.
We have jurisdiction under 35 U.S.C. §§ 134 and 315.
We affirm-in-part.

1 Throughout this opinion, we refer to (1) the Supplemental Submission of
Prior Art and Request for Inter Partes Reexamination filed October 3, 2009
(“Request”); (2) the Right of Appeal Notice mailed March 29, 2012
(“RAN”); (3) Patent Owner’s Appeal Brief filed June 27, 2012 (“PO App.
Br.”); (4) Third Party Requester’s Appeal Brief filed June 27, 2012 (“3PR
App. Br.”); (5) Patent Owner’s Respondent Brief filed July 27, 2012 (“PO
Resp. Br.”); (6) Third Party Requester’s Respondent Brief filed July 27,
2012 (“3PR Resp. Br.”); (7) the Examiner’s Answer mailed April 16, 2013
(“Ans.”) (incorporating the RAN by reference); (8) Patent Owner’s Rebuttal
Brief filed May 16, 2013 (PO Reb. Br.); and (9) Third Party Requester’s
Rebuttal Brief filed May 16, 2013 (“3PR Reb. Br.”).
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The ’631 patent describes “[a] single wire serial interface for power
ICs and other devices.” Abstract. Claim 1, which is reproduced below, is
illustrative:
1. An interface for controlling a device, the interface
comprising:
a first circuit for accumulating a count of clock pulses encoded in a
received signal;
a second circuit for mapping the count of encoded clock pulses
into a corresponding control state for the device; and
a third circuit for resetting the count of encoded clock pulses to
zero in response to the received signal being low for a period that
exceeds a predetermined timeout value, the predetermined timeout
value being longer than a width of one of the encoded clock pulses.
REFERENCES
The Examiner relies on the following references as evidence of
unpatentability:
i. US 3,387,270; issued June 4, 1968 (“Adlhoch”).
ii. US 3,993,877; issued Nov. 23, 1976 (“Sendyk”).
iii. US 4,310,828; issued Jan. 12, 1982 (“Baker”).
iv. US 5,412,644; issued May 2, 1995 (“Herberle”).
v. US 3,492,434; issued Jan. 27, 1970 (“Michel”).
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THE ANTICIPATION REJECTION BASED ON ADLHOCH
The Examiner finds Adlhoch describes all limitations of claims 1-3, 5,
6, 8, 10-12, 14-16, 18, 22-24, 26, and 27. RAN 9-10 (incorporating by
reference Request 13-18).

Claims 1, 5, 6, 8, 10, 11, 14, 18, 22-24, 26, and 27
The Examiner relies on Adlhoch’s (Fig. 1) pulse counter 11, digit
counter 12, and control stage 15 for describing the recited claim language of
mapping the count of encoded clock pulses into a corresponding control
state for the device of claim 1. Request 14 (citing Adlhoch, col. 2, ll. 49-56;
col. 3, ll. 12-15, 20).
Patent Owner presents the following principal argument:
Adlhoch’s digit counter 12 compares a sequence of digits to a
multiple digit calling code, and actuates a “ringing” only if all
of the received digits match corresponding digits of the calling
code in both sequence and value. Id., Figs. 1-3, 2:47-3:15,
5:20-26. Thus, Adlhoch’s digit counter 12 might provide a
mapping between a sequence of digits that matches a “multiple
digit calling code” (e.g., “3-2-4”) and a “ringing” state. Id.
But, Adlhoch’s “multiple digit calling code” is not a “count of
encoded clock pulses,” and so Adlhoch’s description of a
mapping between this “code” and a “ringing” state does not
teach or suggest “mapping the count . . . into a corresponding
control state.”
PO App. Br. 9; see also PO Reb. Br. 5-6.
Patent Owner’s arguments do not persuade us of Examiner error. We
agree with the Examiner and Requester that Adlhoch’s (Fig. 1) pulse counter
11, digit counter 12, and control stage 15 describe the recited mapping the
count of encoded clock pulses into a corresponding control state for the
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device. Request 14. We agree with and adopt as our own Requester’s
position regarding claim 1:
Adlhoch et al. discloses a telephone system interface (col. 1:26-
41) comprising:
a first circuit in the form of a pulse counter 11 for accumulating
a count of bursts from pulse input 10 (col. 2:49-54; fig. 1),
where “a train of pulses, such as pulses used in dial telephone
operations” are “clock pulses” as illustrated in figure 2
produced by a multivibrator (col. 3:20);
a second circuit in the form of digit counter 12 to map the count
of numbers (encoded clock pulses) to actuate control stage 15
(col. 2:54-56; col. 3:12-15); and
a third circuit in the form of inter-digit timer 13 [that] “responds
to the pulses and when an interval greater than the interval
between successive pulses of a group is received, a pulse is
produced and applied to the pulse counter to reset the same”
(col. 2:53-61; fig. 1).
Request 14.
Contrary to Patent Owner’s principal argument, nothing precludes
claim 1’s “a count” from including more than one count, as is the case with
Adlhoch’s multiple digit calling code. The Federal Circuit has addressed this
matter of claim construction:
First, as to the Reissue patent, “[t]his court has repeatedly
emphasized that an indefinite article ‘a’ or ‘an’ in patent
parlance carries the meaning of ‘one or more’ in open-ended
claims containing the transitional phrase ‘comprising.’ ” KCJ
Corp. v. Kinetic Concepts, Inc., 223 F.3d 1351, 1356
(Fed.Cir.2000). That “a” or “an” can mean “one or more” is
best described as a rule, rather than merely as a presumption or
even a convention. The exceptions to this rule are extremely
limited: a patentee must “evince[ ] a clear intent” to limit “a” or
“an” to “one.” Id. The subsequent use of definite articles “the”
or “said” in a claim to refer back to the same claim term does
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not change the general plural rule, but simply reinvokes that
non-singular meaning. An exception to the general rule that “a”
or “an” means more than one only arises where the language of
the claims themselves, the specification, or the prosecution
history necessitate a departure from the rule. See, e.g., Abtox
Inc. v. Exitron Corp., 122 F.3d 1019 (Fed.Cir.1997); Insituform
Techs., Inc. v. Cat Contracting, Inc., 99 F.3d 1098 (Fed. Cir.
1996).
Baldwin Graphic Systems, Inc. v. Siebert, Inc., 512 F.3d 1338, 1342-1343
(Fed. Cir. 2008).
Patent Owner here admits that a count is not limited to one count (see
PO Reb. Br. 3) and fails to present any persuasive argument that there is a
clear intent to limit “a count” to mean only “one count.” See e.g., PO App.
Br. 5. Moreover, the ’631 patent (col. 4, ll. 31-33) describes “[t]he n output
bits of counter 212 control a ROM 214.” See also, the ’631 patent, Fig. 2
(counter 212). The ‘631 patent indicates that the output of the counter is not
limited to representing a single count, so we find no reason to depart from
the general rule that “a count” can mean “one or more counts.” Thus,
Adlhoch’s multiple digit calling code is at least one count of encoded clock
pulses, and Adlhoch’s mapping to a ringing state does describe the recited
mapping the at least one count of encoded clock pulses into a corresponding
control state for the device.
We, therefore, sustain the Examiner’s rejection of claim 1, as well as
claims 5, 6, 8, 10, 11, 14, 18, 22-24, 26, and 27, which are not separately
argued with particularity.

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Claims 2, 12, and 15
The Examiner relies on Adlhoch’s control stage 15 for describing the
recited fourth circuit for maintaining a prior control state until the count of
encoded clock pulses has been accumulated of claim 2. Request 14 (citing
Adlhoch, col. 3, ll. 43-46).
Adlhoch (col. 3, ll. 43-46) describes that during operation of
Adlhoch’s system as an encoder, “the pulse group for the last digit actuates
the control stage 15 and a signal is applied therefrom to the identifier
bistable 16 which clamps the identifier astable 17.”
Patent Owner presents the following principal arguments:
(i) During encoder operation, Adlhoch’s device does not enter or
maintain a control state. PO App. Br. 12.
(ii) The Examiner erred by relying on Adlhoch’s decoder operation
for the independent claims, and Adlhoch’s encoder operation for dependent
claims 2, 12, and 15. PO App. Br. 12-13; see also PO Reb. Br. 7-9.
Patent Owner’s arguments do not persuade us of Examiner error. We
agree with the Examiner and Requester that Adlhoch’s control stage 15
describes the recited fourth circuit for maintaining a prior control state until
the count of encoded clock pulses has been accumulated of claim 2.
Contrary to Patent Owner’s argument (i), during encoder operation,
Adlhoch maintains a prior control state (identifier astable 17 is not clamped)
until the count of encoded clock pulses has been accumulated. See Adlhoch,
col. 3, ll. 43-46.
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Contrary to Patent Owner’s argument (ii), whether Adlhoch is
decoding or encoding, the pulse group for the last digit actuates the control
stage 15. See Adlhoch, Fig. 2
We, therefore, sustain the Examiner’s rejection of claim 2, as well as
claims 12 and 15, which are not separately argued with particularity.

Claims 3 and 16
The Examiner relies on Adlhoch’s identifier bistable 16 clamping the
identifier astable 17 for describing the recited fifth circuit for discarding the
prior control state if the received signal is high for a period that exceeds a
predetermined latch timeout value of claim 3. Request 15 (citing Adlhoch,
col. 3, ll. 46-50); see also RAN 10 (citing Adlhoch, col. 4, l. 60 – col. 5,
l. 5). Patent Owner argues, among other arguments, that “Adl[h]och does
not teach any action or event that may occur ‘if the received signal is high
for a period that exceeds a predetermined latch timeout value.’” PO App.
Br. 14.
Adlhoch (col. 3, ll. 46-49) describes “[t]he identifier bistable 16 is
held in the condition to clamp the identifier astable 17 until it is again
desired to provide a pulse train corresponding to the code number which is
selected by the system.” Adlhoch (col. 4, l. 60 – col. 5, l. 5) describes
transistors 54 and 55 forming a Schmitt trigger and operation of the Schmitt
trigger.
We find Patent Owner’s argument persuasive that the Examiner erred
in finding Adlhoch describes the recited fifth circuit for discarding the prior
control state if the received signal is high for a period that exceeds a
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predetermined latch timeout value. If the received signal is from pulse input
10, Adlhoch (col. 4, l. 60 – col. 5, l. 5) describes turning off the Schmitt
trigger when there is a 190 ms interruption in the pulses. If the received
signal is from astable 17, Adlhoch (col. 3, ll. 46-49) describes clamping
astable 17 to stop the pulses therefrom. For either case, we agree with
Patent Owner that there is no adequate explanation by the Examiner of any
action or event that may occur if the received signal is high for a period that
exceeds a predetermined latch timeout value.
We, therefore, do not sustain the Examiner’s rejection of claim 3.
We also do not sustain the Examiner’s rejection of claim 16, which
similarly recites “a latch driver for causing the latch to discard the prior
control state if the received signal is high for a period that exceeds a
predetermined latch timeout value.”

THE ANTICIPATION REJECTION BASED ON SENDYK
The Examiner finds Sendyk describes all limitations of independent
claims 1 and 8, as well as dependent claims 4 and 9, which depend from
claims 1 and 8, respectively. RAN 17 (incorporating by reference Request
58-60), 29-30 (citing Requester’s Comments filed Mar. 12, 2012, pp. 29-30).
The Examiner relies on Sendyk’s pulse length discriminator circuit
(Fig. 6) for detecting dial pulses and resetting of dial digit counting (counter
U108, Fig. 7) for describing claim 1’s recited resetting the count of encoded
clock pulses to zero. Request 59 (citing Sendyk, col. 7, ll. 14-59); see also
Requester’s Comments filed Mar. 12, 2012, p. 29 (“the claims recite no
hardware limitation as to how the ‘count’ is reset”).
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Patent Owner presents the following principal arguments. First:
Sendyk provides an explicit description (by notations and
symbols in the schematic circuit diagrams and also via language
used in the detailed description) about how the “clearing signal”
generated at the output terminal 59 of Active flip flop U120a
(Fig. 4) is applied to three different counters shown in Fig. 7
(i.e., digit counter U104, counter U101, and Space Counter
U112). Sendyk, Fig. 4 and 7, 4:11-26, 8:46-9:6, 9:38-40,
10:63-11:8, 13:12-33. However, the counter U108 (also shown
in Fig. 7) is not among the counters that are described as
receiving the “clearing signal.”
PO App. Br. 24.
Patent Owner next argues that Sendyk’s description is vague and not
clear enough to teach the recited resetting the count of encoded clock pulses
to zero. PO App. Br. 25-28; see also PO Reb. Br. 12-13.
Patent Owner’s arguments do not persuade us of Examiner error. We
agree with the Examiner and Requester that Sendyk’s resetting of dial digit
counting describes the recited resetting the count of encoded clock pulses to
zero of claim 1.
Further, we adopt as our own Requester’s explanation:
The Patent Owner’s arguments also ignore Sendyk’s disclosure
that “[t]his clearing signal resets all flip flops to their inactive
(on-hook state) .... and removes all information counts, etc.
from the dialer, except, of course, information stored in
memory U201.” Sendyk, col. 13, ll. 11-18. Thus, far from the
Patent Owner's characterization that Sendyk only “does not
exclude this possibility,” Requester submits that Sendyk
actually discloses that the clearing signal is applied to counter
U108.
3PR Resp. Br. 14.
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Contrary to Patent Owner’s two arguments, supra, Sendyk resets the
count of encoded clock pulses to zero by removing all information counts
from the dialer “[to] prepare[] the dialer for receipt of a new address digit
from the station set.” Sendyk, col. 13, ll. 17-18; see also Sendyk, Figs. 4
and 7 (clearing signal 59 is applied to counter U108 via flip-flop U120B).
We, therefore, sustain the Examiner’s anticipation rejection of claim
1, as well as claims 4, 8, and 9, which are not separately argued with
particularity.

THE OBVIOUSNESS REJECTION OVER BAKER, HERBERLE, AND
SENDYK
The Examiner finds that the combination of Baker, Herberle, and
Sendyk teaches all limitations of claim 44. RAN 18-19 (incorporating by
reference Requester’s Comments filed November 30, 2010, p. 49), 31.
Patent Owner argues the cited references do not teach resetting the
count of encoded clock pulses to zero in response to the received signal
being at the first level for a period that exceeds a predetermined timeout
value as recited in independent claim 22, the claim from which claim 44
depends. PO App. Br. 29-30; see also PO Reb. Br. 14.
We are not persuaded of Examiner error for reasons explained above
with respect to the Examiner’s anticipation rejection of claim 1 based on
Sendyk.
We, therefore, sustain the Examiner’s obviousness rejection of claim
44 over Baker, Herberle, and Sendyk.

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THE REMAINING REJECTIONS
Review of alternative prior art bases for rejection to claims, which
have already been determined to be appropriately rejected over the prior art,
is discretionary. See, e.g., In re Gleave, 560 F.3d 1331, 1338 (Fed. Cir.
2009) (not reaching rejections based on obviousness when claims already
rejected as anticipated). We exercise our discretion and decline to reach the
merits of the remaining rejections.

THE PROPOSED ANTICIPATION REJECTION OF CLAIM 7 BY
ADLHOCH
The Examiner does not adopt the proposed rejection of claim 7 as
anticipated by Adlhoch. RAN 10, 23.
Claim 7 depends from claim 1 and further recites the “third circuit is
configured to enable the first circuit at the rising edge of the first encoded
clock pulse of the received signal, the third circuit maintaining the first
circuit in an enabled state until the received signal is low for said period that
exceeds the predetermined timeout value.”
Requester argues Adlhoch’s interdigit timer 13 enables pulse counter
11, which counts positive pulses, through transistors 25 and 28. 3PR App.
Br. 3-8 (citing Adlhoch, Figs. 1 and 3); see also PO Reb. Br. 4-5.
In response, Patent Owner explains “[w]hile the timer 13 provides for
resetting the pulse counter 11 after the last pulse of a group, it is not
‘configured to enable’ the pulse counter 11 ‘ ... at the rising edge of the first
... pulse.’” PO Resp. Br. 6.
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A review of Adlhoch indicates that the first received positive pulse at
pulse counter 11 from interdigit timer 13 starts the counting until the pulse
counter 11 is reset. Nonetheless, prior to receiving this first pulse, we see no
reason why the pulse counter 11 is not already enabled. Thus, we agree with
Patent Owner that the interdigit timer 13 is not configured to enable the
pulse counter 11.
We, therefore, sustain the Examiner’s refusal to reject claim 7 as
anticipated by Adlhoch.

THE PROPOSED ANTICIPATION REJECTION OF CLAIM 13 BY
MICHEL
The Examiner does not adopt the proposed rejection of claim 13 as
anticipated by Michel. RAN 12-13. Claim 13 is reproduced below:
13. A method for controlling a device, the method
comprising:
toggling an input signal to the device to encode a series
of clock pulses with the number of clock pulses corresponding
to a desired control state for the device;
maintaining the input signal in a logical high state for a
period equal to the duration in which the desired control state is
to remain active shortened by a predefined timeout period, the
predefined timeout period being longer than a width of one of
the encoded clock pulses; and
maintaining the input signal in a logical low state for a
duration that exceeds the predefined timeout period to terminate
the desired state.
Requester argues Michel teaches all limitations of claim 13. 3PR
App. Br. 10-12; Request 29. Regarding the recited number of clock pulses
corresponding to a desired control state, Requester explains that Michel
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discloses that different pulse code groups are set in response to dial signals.
3PR App. Br. 10 (citing Michel, col. 5, l. 63 - col. 6, l. 17; col. 6, ll. 20-40;
col. 6, l. 53 - col. 7, l. 52; Figs. 4 and 5).
Patent Owner argues, among other arguments, that Michel does not
teach the recited number of clock pulses corresponding to a desired control
state, and Michel’s assignment of codes to signaling conditions is not
performed based on any number of clock pulses. PO Resp. Br. 12-13.
In response, Requester explains
[f]irst, Michael [sic] teaches “toggling an input signal to the
device to encode a series of clock pulses with the number of
clock pulses corresponding to a desired control state”.
Specifically, this is evident in the discussion of a dial telephone
set that generates dial pulsing signals in a high or low state
(corresponding to an off-hook or on-hook signaling condition
of the channel, respectively), and bistable multivibrators
causing outputs of different pulse code groups in response to
the dial signals.
3PR Reb. Br. 7.
A review of Michel indicates that Michel’s pulse code “10”
corresponds to the signaling condition of a dial pulse. Michel, Fig. 5.
Accordingly, multiple pulse codes “10” correspond to the signaling
conditions of multiple dial pulses. Even if we assume that Michel’s pulse
code is a desired control state, the pulse code does not correspond to the
number of dial pulses. Thus, we agree with Patent Owner that Michel does
not describe the recited number of clock pulses corresponding to a desired
control state.
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We, therefore, sustain the Examiner’s refusal to reject claim 13 as
anticipated by Michel.2

ORDER
The Examiner’s decision rejecting claims 1, 2, 4-6, 8-12, 14, 15, 18,
22-24, 26, 27, and 44 is affirmed.
The Examiner’s decision rejecting claims 3 and 16 is reversed.
The Examiner’s decision not to reject claims 7 and 12 is affirmed.
Requests for extensions of time in this inter partes reexamination
proceeding are governed by 37 C.F.R. § 1.956. See 37 C.F.R. § 41.79.
In the event neither party files a request for rehearing within the time
provided in 37 C.F.R. § 41.79, and this decision becomes final and
appealable under 37 C.F.R. § 41.81, a party seeking judicial review must
timely serve notice on the Director of the United States Patent and
Trademark Office. See 37 C.F.R. §§ 90.1 and 1.983.

AFFIRMED-IN-PART

2 The Examiner additionally stated that Michel does not teach resetting the
count of encoded clock pulses to zero in response to the received signal
being low for a period that exceeds a predetermined timeout value longer
than a width of one of the encoded clock pulses. RAN 13. However, claim
13 does not recite such a limitation. Nonetheless, we are persuaded by
Patent Owner’s arguments to preserve the Examiner’s decision not to reject
claim 13. Patent Owner may argue any basis for preserving the Examiner’s
decision not to reject claim 13. See Randall Mfg. v. Rea, 733 F.3d 1355,
1363 Fn 3 (Fed. Cir. 2013).
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PATENT OWNER:

DECHERT LLP
P.O. Box 390460
Mountain View, CA 94039-0460

THIRD PARTY REQUESTER:

ASCENDA LAW GROUP, PC
84 W. Santa Clara Street
Suite 550
San Jose, CA 95113