2019002666 (P.T.A.B. Jun. 18, 2020)

EMC IP HOLDING COMPANY LLC

Patent Trials and Appeals BoardJun 18, 2020

2019002666 (P.T.A.B. Jun. 18, 2020)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 15/393,405 12/29/2016 Owen Martin 130-162 EMC-16-0564 1247 81435 7590 06/18/2020 Anderson Gorecki LLP One Marina Park Drive Suite 1410 Boston, MA 02210 EXAMINER ALSIP, MICHAEL ART UNIT PAPER NUMBER 2136 NOTIFICATION DATE DELIVERY MODE 06/18/2020 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): handerson@andersongorecki.com jgorecki@andersongorecki.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE _____________ BEFORE THE PATENT TRIAL AND APPEAL BOARD _____________ Ex parte OWEN MARTIN, ADNAN SAHIN, GABRIEL BENHANOKH, and ARIEH DON _____________ Appeal 2019-002666 Application 15/393,405 Technology Center 2100 ______________ Before ERIC S. FRAHM, JASON J. CHUNG, and JAMES W. DEJMEK, Administrative Patent Judges. FRAHM, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE Appellant1 appeals under 35 U.S.C. § 134(a) from a Final Rejection of claims 1–20. We have jurisdiction under 35 U.S.C. § 6(b). We reverse. 1 We use the word “Appellant” to refer to “applicant” as defined in 37 C.F.R. § 1.42 (2018). “The word ‘applicant’ when used in this title refers to the inventor or all of the joint inventors, or to the person applying for a patent as provided in §§ 1.43, 1.45, or 1.46.” 37 C.F.R. § 1.42(a). According to Appellant, EMC Holding Company, LLC is the real party in interest (Appeal Br. 2). Appeal 2019-002666 Application 15/393,405 2 DISCLOSED AND CLAIMED INVENTION According to Appellant, the disclosed invention, entitled “Aggregated Host-Array Performance Tiering” (Title), “is generally related to computer networks in which a data storage system is used to maintain data for host applications that may be used by multiple concurrent users” (Spec. ¶ 1). Appellant’s “Figure 1 illustrates a computer network in which aggregated host-array performance tiering is implemented” (Spec. ¶ 6; see also Spec. ¶¶ 14–22 (describing Fig. 1)). Figure 1 shows (i) a host computer 102 including a processor 110, non-volatile cache 104, host application 106, multi-path input-output (MPIO) driver 152, and tiering engine 156; connected via multiple paths 1341–4 to (ii) a storage array 100 including back-end storage bays 1241–4, which in turn include plural managed drives 126 (see Spec. ¶¶ 14–22). According to Appellant, “[a] ‘host application’ is a computer program that accesses a storage service from a storage system via a storage network” (Spec. ¶ 13), doing so through the control of multiple paths 1341–4 by MPIO driver 152 and tiering engine 156. Alternatively, the tiering engine can be located in the storage array instead of the host computer (see Fig. 4). Independent claims 1 and 9 are apparatus claims, and independent claim 11 is a method claim, having varying scope. According to Appellant (see Appeal Br. 4–10, Summary of Claimed Subject Matter), claim 1 corresponds to Figure 1 (showing tiering engine 156 located in the host computer 102), and claims 9 and 11 correspond to Figure 4 (showing tiering engine 303 located in the storage array 300). Claims 1, 9, and 11, reproduced below with emphases added, are illustrative of the claimed subject matter: Appeal 2019-002666 Application 15/393,405 3 1. An apparatus comprising: a computing device comprising a processor, a non-volatile cache, a host application, and a tiering engine that causes a first extent of host application data to be demoted to a storage array and causes a second extent of host application data to be promoted to the non-volatile cache, the promotion and demotion based on likelihood of future access of the first and second extents of host application data. Appeal Br. 18, Claims Appendix (emphases added). 9. An apparatus comprising: a storage array comprising a plurality of computing nodes, managed drives, and a tiering engine that causes a first extent of host application data to be demoted from nonvolatile caches of a plurality of host computers to the managed drives and causes a second extent of host application data to be promoted to the non-volatile caches of the plurality of host computers based on likelihood of future access of the first and second extents of host application data. Appeal Br. 19, Claims Appendix (emphases added). 11. A method comprising: in a network comprising a plurality of host computers and a storage array, wherein the host computers run instances of a host application that share a data set that is maintained on production volume that is presented by the storage array: storing at least a first extent of host application data in non- volatile caches of the host computers, wherein the non-volatile caches represent a first tier of storage; storing at least a second extent of host application data in a managed drive of the storage array, wherein the managed drive represents a second tier of storage; and demoting the first extent of host application data to the storage array and promoting the second extent of host application data to the non-volatile caches based on likelihoods of future access of the first and second extents of host application data. Appeal 2019-002666 Application 15/393,405 4 Appeal Br. 20, Claims Appendix (emphases added). EXAMINER’S REJECTION The Examiner rejected claims 1–20 under 35 U.S.C. § 102(a)(1) as being anticipated by Vengerov et al. (US 7,539,709 B1; issued May 26, 2009) (hereinafter, “Vengerov”). Final Act. 2–7. In making the rejection of claims 1, 9, and 11, the Examiner cites to the following portions of Vengerov (see Final Act. 2, 4–5), without any explanation as to how or why the cited portions disclose the limitations of the claims (i.e., the Examiner fails to map the cited portions of Vengerov to the individual claimed elements): Figure 1; column 2, lines 49 through 67; column 3, line 53 through column 4, line 67; column 5, lines 1 through 24; column 6, lines 1 through 24 and 45 through 59; and column 7, line 66 through column 8, line 8. ISSUE ON APPEAL Based on Appellant’s arguments (Appeal Br. 11–17; Reply Br. 11– 20), the following principal issue is presented:2 2 Based on Appellant’s arguments which present general arguments to claims 1, 19, and 23 as a group (Appeal Br. 10–15; Reply Br. 2–6), with regard to the anticipation rejection of claims 1–4, 7–12, 15, 17, and 19–22, we select claim 19 as representative of the group of claims rejected over Cohn. We will decide the outcome of the obviousness rejection over Cohn of claims 5, 6, 14, 16, and 23 (not separately argued), on the same basis as claim 19. And, based on Appellant’s separate arguments for claims 13 and 18 (see Appeal Br. 15–16), we will decide the outcome of the obviousness Appeal 2019-002666 Application 15/393,405 5 Did the Examiner err in rejecting claims 1–20 under 35 U.S.C. § 102(a)(1) over Vengerov because the Examiner fails to show that Vengerov discloses, expressly or inherently, each and every limitation and element of claims 1, 9, and 11, as arranged in those claims, including demoting data from a non-volatile cache in a host computing device to a storage array, and promoting other data from the storage array to the non- volatile cache of the host computing device, as set forth in claims 1, 9, and 11? ANALYSIS We have reviewed the Examiner’s rejection (Final Act. 2–7) in light of Appellant’s arguments (Appeal Br. 11–17; Reply Br. 11–29) that the Examiner has erred, as well as the Examiner’s response to Appellant’s arguments in the Briefs (Ans. 3–5). We concur with Appellant’s contentions (App. Br. 11–16; Reply Br. 11–19) that the Examiner erred in finding each of independent claims 1, 9, and 11 (as well as claims 2–8, 10, and 12–20 depending respectively therefrom) anticipated by Vengerov. The USPTO “must examine the relevant data and articulate a satisfactory explanation for its action including a ‘rational connection between the facts found and the choice made.”’ Motor Vehicle Mfrs. Ass’n v. State Farm Mut. Auto. Ins. Co., 463 U.S. 29, 43 (1983) (internal quotation marks and citation omitted); see Synopsys, Inc. v. Mentor Graphics Corp., 814 F.3d 1309, 1322 (Fed. Cir. 2016) (stating that, as an rejections of claims 13 and 18 (based on Cohn taken with other secondary references), on the same basis as claim 1 (thus, representative claim 19), from which claims 13 and 18 depend. Appeal 2019-002666 Application 15/393,405 6 administrative agency, the PTAB “must articulate logical and rational reasons for [its] decisions” (internal quotation marks and citation omitted)). This is done by presenting, for anticipation, a prima facie case. The Examiner has the initial burden to set forth the basis for any rejection so as to put the patent applicant on notice of the reasons why the applicant is not entitled to a patent on the claim scope that he seeks – the so- called “prima facie case.” In re Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992); In re Piasecki, 745 F.2d 1468, 1472 (Fed. Cir. 1984) (the initial “burden of proof is on the [USPTO] to produce the factual basis for its rejection of an application under sections 102 and 103”) (quoting In re Warner, 379 F.2d 1011, 1016 (CCPA 1967)). The Examiner is required to provide Appellant reasonable notice as to the basis of a rejection. The notice requirement is set forth by 35 U.S.C. § 132: [T]he PTO carries its procedural burden of establishing a prima facie case when its rejection satisfies 35 U.S.C. § 132, in “notify[ing] the applicant ... [by] stating the reasons for [its] rejection, or objection or requirement, together with such information and references as may be useful in judging of the propriety of continuing the prosecution of [the] application.” 35 U.S.C. § 132. That section “is violated when a rejection is so uninformative that it prevents the applicant from recognizing and seeking to counter the grounds for rejection.” Chester v. Miller, 906 F.2d 1574, 1578 (Fed. Cir. 1990). In re Jung, 637 F.3d 1356, 1362 (Fed. Cir. 2011); see also Ex Parte Frye, 94 USPQ2d 1072 (BPAI 2010) (precedential) (Examiner has initial burden to set forth basis for any rejection so as to put Appellant on notice of reasons why Appellant is not entitled to patent on claim scope sought, i.e., a prima Appeal 2019-002666 Application 15/393,405 7 facie case). “When a reference is complex or shows or describes inventions other than that claimed by the applicant, the particular part relied on must be designated as nearly as practicable. The pertinence of each reference, if not apparent, must be clearly explained and each rejected claim specified.” 37 C.F.R. § 1.104(c)(2) (emphases added)). In anticipation, “the Board must compare the construed claim to a prior art reference and make factual findings that ‘each and every limitation is found either expressly or inherently in [that] single prior art reference.’” In re Crish, 393 F.3d 1253, 1256 (Fed. Cir. 2004). In case of doubt as to whether claims of an application are anticipated, the scales should be inclined toward the applicant. See In re Coley, 40 F.2d 982, 986 (CCPA 1930) (“Where there is such doubt, the scales should be inclined toward the applicant.”). In the instant case, the Examiner’s notification to Appellant of the determination of the anticipation of independent claims 1, 9, and 11 is found at pages 2 and 4 through 5 of the Final Rejection. Notably, claims 1, 9, and 11 each (i) contain different recitations, scope, and format; and (ii) correspond to different disclosed embodiments (e.g., claim 1 is drawn to the embodiment of Figure 1, and claims 9 and 11 are drawn to the embodiment of Figure 4), and statutory categories (e.g., claims 1 and 9 are apparatus claims, and claim 11 is a method claim). With regard to claim 1, the Examiner, in the Final Rejection, restates the claim language and points to several portions of Vengerov as anticipating the claimed subject matter, as follows: Consider claim 1, Vengerov et al. discloses an apparatus comprising: a computing device comprising a processor, a non- volatile cache, a host application, and a tiering engine that causes a first extent of host application data to be demoted to a storage Appeal 2019-002666 Application 15/393,405 8 array and causes a second extent of host application data to be promoted to the non-volatile cache, the promotion and demotion based on likelihood of future access of the first and second extents of host application data (Fig. 1, Col. 2 lines 49-67, Col. 3 line 53-Col. 4 line 67, Col. 5 lines 1-24, Col. 6 lines 1-24 and 45-59). Final Act. 2 ¶ 4. With regard to claim 9, the Examiner, in the Final Rejection, restates the claim language and points to several portions of Vengerov as anticipating the claimed subject matter, as follows: Consider claim 9, Vengerov et al. discloses an apparatus comprising: a storage array comprising a plurality of computing nodes, managed drives, and a tiering engine that causes a first extent of host application data to be demoted from non-volatile caches of a plurality of host computers to the managed drives and causes a second extent of host application data to be promoted to the non-volatile caches of the plurality of host computers based on likelihood of future access of the first and second extents of host application data (Fig. 1, Col. 2 lines 49-67, Col. 3 line 53-Col. 4 line 67, Col. 5 lines 1-24, Col. 6 lines 1-24 and 45-59, Col. 7-8 lines 66- 8). Final Act. 4 ¶ 12. With regard to claim 11, the Examiner, in the Final Rejection, restates the claim language and points to several portions of Vengerov as anticipating the claimed subject matter, as follows: Consider claim 11, Vengerov et al. discloses a method comprising: in a network comprising a plurality of host computers and a storage array, wherein the host computers run instances of a host application that share a data set that is maintained on production volume that is presented by the storage array: storing at least a fast extent of host application data in non-volatile caches of the host computers, wherein the Appeal 2019-002666 Application 15/393,405 9 non-volatile caches represent a first tier of storage; storing at !east a second extent of host application data in a managed drive of the storage array, wherein the managed drive represents a second tier of storage; and demoting the first extent of host application data to the storage array and promoting the second extent of host application data to the non-volatile caches based on likelihoods of future access of the first and second extents of host application data (Fig. 1, Col. 2 lines 49-67, Col. 3 line 53-Col. 4 line 67, Col. 5 lines 1-24, Col. 6 lines 1-24 and 45-59, Col. 7-8 lines 66-8). Final Act. 4–5 ¶ 14. As can be seen, the rejections of claims 1, 9, and 11 reproduced above do not map the particular parts of Vengerov relied on, nor do the rejections designate or map which elements shown in Figure 1 of Vengerov correspond to individual limitations of claims 1, 9, and 11 (as nearly as practicable). For example, Figure 1 of Vengerov (relied on by the Examiner as disclosing the limitations of claims 1, 9, and 11) shows a computer system 102 having a CPU 104, other device(s) 124 (optional, alternative embodiment), and a storage system 108 that includes a storage array 112 having storage tiers 114, 116, 118, 120, and 122 and an array controller 110. However, the Examiner does not specifically map any of these elements to limitations in the claims, such as (i) the “computing device comprising a processor, a non-volatile cache, a host application, and a tiering engine” and “storage array” recited in claim 1; (ii) the “storage array comprising a plurality of nodes, managed drives, and a tiering engine” and “non-volatile caches of a plurality of host computers” recited in claim 9; or (iii) the “network comprising a plurality of host computers and a storage array,” “non-volatile caches of the host computers,” and “managed drive of the storage array” recited in claim 11. Appeal 2019-002666 Application 15/393,405 10 Instead, the pertinence of each portion of Vengerov is not apparent, and has not been clearly explained. See 37 C.F.R. § 1.104(c)(2). As a result, the Examiner’s rejection “is so uninformative that it prevents the applicant from recognizing and seeking to counter the grounds for rejection” (Chester v. Miller, 906 F.2d at 1578), and therefore violates the notice requirement set forth by 35 U.S.C. § 132. See In re Jung, 637 F.3d 1356, 1362 (Fed. Cir. 2011); see also Ex Parte Frye, 94 USPQ2d 1072 (BPAI 2010) (precedential). Notably, Vengerov’s Figure 1 shows a computer system 102 that includes (i) a central processing unit 104 connected to (ii) a storage system 108 consisting of an array 112 of storage tiers 1114, 116, 118, 120, and 122, and an array controller 110 (Vengerov col. 3, ll. 12–20; see generally col. 3, l. 12–col. 4, l. 5 (describing Fig. 1)). Although Vengerov (i) describes that “CPU 104 may also be coupled to other devices 124” (col. 3, ll. 19–20); and (ii) generally suggests that “[a]n application or process that is configured to perform the data operations being discussed may be resident on a single computer within a network of computers, may be an application or process executing on a network of computers, or may be an application or process being executed on a node within a grid, etc.” (col. 7, l. 66–col. 8, l. 4), Vengerov does not further describe the interaction of the CPU 104, storage system 108, with the other devices 124, or explain what the other devices are or comprise. As can be seen, Vengerov would have to contain at least two different embodiments to meet the differences in claim scope presented by claims 1, 9, and 11 on appeal. One embodiment corresponding to Appellant’s Figure 1, where a tiering engine is located in a computing device with a non- Appeal 2019-002666 Application 15/393,405 11 volatile cache and a host application as required by claim 1, and another embodiment corresponding to Appellant’s Figure 4, where (i) a tiering engine is located in a storage array having a plurality of managed drives and a plurality of non-volatile caches of located in a plurality of host computers as required by claim 9; or (ii) a network comprises “a plurality of host computers and a storage array,” where the host computers each have non- volatile caches and the storage array contains a managed drive as required by claim 11. However, in an anticipation rejection, “it is not enough that the prior art reference . . . includes multiple, distinct teachings that [an ordinary] artisan might somehow combine to achieve the claimed invention.” Net MoneyIN, Inc. v. VeriSign, Inc., 545 F.3d 1359, 1371 (Fed. Cir. 2008). Rather, the reference must “clearly and unequivocally disclose the claimed [invention] or direct those skilled in the art to the [invention] without any need for picking, choosing, and combining various disclosures not directly related to each other by the teachings of the cited reference.” Id. (quoting In re Arkley, 455 F.2d 586, 587 (CCPA 1972)). Thus, while “[s]uch picking and choosing may be entirely proper in the making of a 103, obviousness rejection . . . it has no place in the making of a 102, anticipation rejection.” Arkley, 455 F.2d at 587–88. Furthermore, in finding a claim anticipated under 35 USC § 102, the Board cannot “fill in missing limitations” simply because a skilled artisan would immediately envision them from the prior art. Nidec Motor Corp. v. Zhongshan Broad Ocean Motor, Case No. 2016-1900 (Fed. Cir. March 14, 2017) (citing Kennametal, Inc. v. Ingersoll Cutting Tool Co., 780 F.3d 1376, 1381 (Fed. Cir. 2015)); see Microsoft Corp. v. Biscotti, Inc., Nos. Appeal 2019-002666 Application 15/393,405 12 2016-2080, -2082, -2083, 2017 WL 6613262 (Fed. Cir. Dec. 28, 2017) (holding “anticipation is not proven by ‘multiple, distinct teachings that the artisan might somehow combine to achieve the claimed invention”’); see also Microsoft Corp. v. Biscotti, Inc., Nos. 2016-2080, -2082, -2083, 2017 WL 6613262 (Fed. Cir. Dec. 28, 2017) (Newman, dissenting) (to anticipate, a reference must show “the same components, having the same function, combined in the same way for the same purpose”). We will not resort to speculation or assumptions to cure the deficiencies in the Examiner’s fact finding. See In re Warner, 379 F.2d 1011, 1017 (CCPA 1967); see also In re Coley, 40 F.2d at 986. To evaluate the Examiner’s prima facie case of anticipation, and Appellant’s contentions that Vengerov fails to disclose all of the recited limitations, as arranged, in claims 1, 9, and 11, we must first construe the disputed terms, which must be given their broadest reasonable interpretation. See In re Zletz, 893 F.2d 319, 321 (Fed. Cir. 1989) (stating that, during examination, “claims must be interpreted as broadly as their terms reasonably allow”). Under the broadest reasonable interpretation standard, and absent any special definitions, claim terms generally are given their ordinary and customary meaning, as would be understood by one of ordinary skill in the art, in the context of the entire disclosure. In re Translogic Tech., Inc., 504 F.3d 1249, 1257 (Fed. Cir. 2007). When construing claim terminology during prosecution before the Office, claims are to be given their broadest reasonable interpretation consistent with the Specification, reading claim language in light of the Specification as it would be interpreted by one of ordinary skill in the art. In re Am. Acad. of Sci. Tech Ctr., 367 F.3d 1359, 1364 (Fed. Cir. 2004). Appeal 2019-002666 Application 15/393,405 13 However, the broadest reasonable interpretation differs from the broadest possible interpretation. In re Smith Int’l, Inc., 871 F.3d 1375, 1383 (Fed. Cir. 2017); see also MPEP § 2111 (“The broadest reasonable interpretation does not mean the broadest possible interpretation. Rather, the meaning given to a claim term must be consistent with the ordinary and customary meaning of the term (unless the term has been given a special definition in the specification), and must be consistent with the use of the claim term in the specification and drawings.”). The correct inquiry in giving a claim term its broadest reasonable interpretation in light of the specification is “an interpretation that corresponds with what and how the inventor describes his invention in the specification, i.e., an interpretation that is ‘consistent with the specification.’” Smith, 871 F.3d at 1382–83 (quoting In re Morris, 127 F.3d 1048, 1054 (Fed. Cir. 1997)). We are mindful, however, that limitations are not to be read into the claims from the Specification. In re Van Geuns, 988 F.2d 1181, 1184 (Fed. Cir. 1993). Appellant’s claims, when read in light of the entire Specification and corresponding drawings, support an understanding that (i) the recited non- volatile cache is located in the host computer (see Fig. 1 (showing non- volatile cache 104 in host computer 102); Fig. 4 (showing non-volatile caches 128 and 406 in host computers 305 and 400); ¶¶ 14, 16 30, 31); and (ii) the managed drives are located in the storage array (see Fig. 1 (showing managed drives 126 in storage array 108); Fig. 4 (showing managed drives 302 and 304 in storage array 300); ¶¶ 14, 16, 30, 31). In this light, we conclude the Examiner has applied the broadest possible interpretation, and not the broadest reasonable interpretation, in finding Vengerov anticipates claims 1, 9, and 11 – all of which, when read in Appeal 2019-002666 Application 15/393,405 14 light of the supporting Specification and accompanying drawings (see Figs. 1, 4), limit the non-volatile cache(s) to being located in the computing device (see claim 1) or host computer (see claims 9, 11), and in a different location than the storage array (see claims 1, 9) or managed drives in a storage array (see claims 9, 11). The Examiner’s strained interpretation of the arrangement of elements set forth in claims 1, 9, and 11 is unreasonably broad and inconsistent with the Appellant’s Specification and Drawings supporting the subject matter claimed. As such, it does not accord with the broadest reasonable interpretation standard. See In re Smith Int’l, Inc., 871 F.3d at 1382–83 (stating that “the Board cannot construe the claims so broadly that its constructions are unreasonable under general claim construction principles . . ” and that giving claim terms “a strained breadth in the face of the otherwise different description in the specification [is] unreasonable” (internal quotation marks omitted)); TriVascular, Inc. v. Samuels, 812 F.3d 1056, 1062 (Fed. Cir. 2016) (“While the broadest reasonable interpretation standard is broad, it does not give the Board an unfettered license to interpret the words in a claim without regard for the full claim language and the written description.”). In the Examiner’s Answer as to claim 1 (see Ans. 3), the Examiner explains that Vengerov’s storage array includes plural non-volatile caches, but continues to fail in shedding any light on how any of the non-volatile caches would be contained in the host computer as claimed. The Examiner does not (i) map any particular element of Vengerov to the recited host computer (although the recited host computer would appear to be most likely to be mapped to the CPU 104 or computer system 102 shown in Vengerov’s Figure 1); (ii) map a particular storage tier 114, 116, 118, 120, or 122 of the Appeal 2019-002666 Application 15/393,405 15 array 112 of the storage system 108 (see Fig. 1) to the recited non-volatile cache; or (iii) explain how Vengerov meets the requirement of claim 1 that the non-volatile cache (located in the computing device along with the host application and tiering engine) constitutes a separate and different element than the storage array. And, one of ordinary skill in the art would understand that even if one of the CPU 104 or the computer system 102 shown in Vengerov’s Figure 1 contained the recited non-volatile cache, there would be no demotion and/or promotion of data between/amongst the storage array and non-volatile cache as claimed, because Vengerov discloses that storage system 108 (see Figs. 1, 2) uses array controller 110 (see Fig. 1) and/or storage supervisor 204 (see Fig. 2) (the equivalent of the claimed tiering engine) to move, add, and/or duplicate (i.e., promote/demote) data between (i) storage tiers 114, 116, 118, 120, and 122 (see col. 2, ll. 49–55; col. 3, ll. 61–65; col. 5, l. 66–col. 6, l. 9); or (ii) storage platters 216, 218, 220, 222 (see Fig. 2; col. 4, ll. 6–21; col. 6, ll. 10–24). Furthermore, in the Examiner’s Answer as to claims 9 and 11 (which have differing scope as already discussed), the Examiner relies on the rationale provided for claim 1 (see Ans. 4, 5). As already discussed, Appellant’s claims 1, 9, 11 correspond to different embodiments (e.g., that of Appellant’s Figures 1 and 4), so we are left to speculate as to how Vengerov’s Figure 1 and corresponding disclosure anticipates all of the claims on appeal, which have different scope and cover multiple different embodiments. As a result, the Examiner has not clearly addressed the disparate limitations recited in claims 9 and 11, as compared to claim 1. “In the context of anticipation, the question is not whether a prior art reference ‘suggests’ the claimed subject matter[;] . . . [r]ather, the dispositive Appeal 2019-002666 Application 15/393,405 16 question regarding anticipation is whether one skilled in the art would reasonably understand or infer from a prior art reference that every claim element is disclosed in that reference.” AstraZeneca LP v. Apotex, Inc., 633 F.3d 1042, 1055 (Fed. Cir. 2010) (internal brackets and quotation marks omitted). Here, this is not the case. “[D]ifferences between the prior art reference and a claimed invention, however slight, invoke the question of obviousness, not anticipation.” Net MoneyIN, Inc. v. VeriSign, Inc., 545 F.3d at 1371 (emphasis added). Here, this is the case. A prior art reference that “must be distorted from its obvious design” does not anticipate a patent claim or new invention. In re Chudik, 851 F.3d 1365, 1374 (Fed. Cir. 2017) (“Prior art that ‘must be distorted from its obvious design’ does not anticipate a new invention.”) (quoting In re Wells, 53 F.2d 537, 539 (CCPA 1931)); accord Topliff v. Topliff, 145 U.S. 156, 161 (1892) (“It is not sufficient to constitute an anticipation that the device relied upon might, by modification, be made to accomplish the function performed by the patent in question, if it were not designed by its maker, nor adapted, nor actually used, for the performance of such functions.”) (emphasis added). Again, here, there are too many differences between what is recited in claims 1, 9, and 11, and what is disclosed by Vengerov, for Vengerov to anticipate the claims. Anticipation of a claim under 35 U.S.C. § 102 occurs when each and every claimed element and the claimed arrangement or combination of those elements is disclosed, inherently or expressly, by a single prior art reference. Therasense, Inc. v. Becton, Dickinson & Co., 593 F.3d 1325, 1332 (Fed. Cir. 2010); see also Verdegaal Bros. v. Union Oil Co. of California, 814 F.2d 628, 631 (Fed. Cir. 1987); see also In re King, 801 F.2d 1324, 1326 Appeal 2019-002666 Application 15/393,405 17 (Fed. Cir. 1986) (“[A]nticipation of a claim under § 102 can be found only if the prior art reference discloses every element of the claim”) (citing Lindemann Maschinenfabrik GMBH v. American Hoist & Derrick Co., 730 F.2d 1452, 1458 (Fed. Cir. 1984)). “[A]bsence from the reference of any claimed element negates anticipation.” Kloster Speedsteel AB v. Crucible, Inc., 793 F.2d 1565, 1571 (Fed. Cir. 1986). To establish anticipation, every element and limitation of the claimed invention must not only be found in a single prior art reference, but must be arranged as in the claim. Karsten Mfg. Corp. v. Cleveland Golf Co., 242 F.3d 1376, 1383 (Fed. Cir. 2001) (emphasis added). In the case before us, this burden has not been met by the Examiner. Under the doctrine of inherency, if a claimed element is not expressly disclosed in a prior art reference, the reference nevertheless anticipates the claim if the missing element is necessarily present in the reference, and that it would be so recognized by skilled artisans. Rosco, Inc. v. Mirror Lite Co., 304 F.3d 1373, 1380 (Fed. Cir. 2002) (citations and internal quotation marks omitted). A reference inherently discloses an element of a claim “if that missing characteristic is necessarily present, or inherent, in the single anticipating reference.” Schering Corp. v. Geneva Pharms., 339 F.3d 1373, 1377 (Fed. Cir. 2003) (citation omitted) (emphasis added). “Inherency, however, may not be established by probabilities or possibilities. The mere fact that a certain thing may result from a given set of circumstances is not sufficient.” Therasense, 593 F.3d at 1332 (citing Cont’l Can Co., 948 F.2d at 1269). However, here the Examiner states in the Examiner’s Answer that “[t]he Examiner is not making an inherency argument” (Ans. 4) by citing Appeal 2019-002666 Application 15/393,405 18 column 7, line 66 through column 8, line 4 for the proposition that “[a]n application or process that is configured to perform the data operations being discussed may be resident on a single computer within a network of computers, may be an application or process executing on a network of computers, or may be an application or process being executed on a node within a grid, etc.” (Vengerov, col. 7, l. 66–col. 8, l. 4). The Examiner has not shown Vengerov “not only disclose[s] all elements of the claim[s] within the four corners of the document, but [] also disclose[s] those elements arranged as in the claim.” Net MoneyIN, Inc. v. VeriSign, Inc., 545 F.3d at 1369 (citation and internal quotation marks omitted). “[I]t is not enough that the prior art reference discloses part of the claimed invention, which an ordinary artisan might supplement to make the whole, or that it includes multiple, distinct teachings that the artisan might somehow combine to achieve the claimed invention.” Id. at 1371 (emphasis added). In view of the foregoing, Appellant’s arguments (Appeal Br. 11–16; Reply Br. 11–19) that Vengerov fails to anticipate claims 1, 9, and 11 are persuasive, and Appellant has shown the Examiner’s anticipation rejection of claims 1–20 to be in error. And, based on Vengerov’s disclosure discussed above, we find the Examiner improperly relies upon Vengerov to disclose and anticipate the disputed claim limitations (see Warner, 379 F.2d at 1017), and thus failed to present a prima facie case of anticipation. Appeal 2019-002666 Application 15/393,405 19 CONCLUSION3 The Examiner’s rejection of claims 1–20 is reversed. In summary: Claims Rejected 35 U.S.C. § Reference(s)/ Basis Affirmed Reversed 1–20 102(a)(1) Vengerov 1–20 REVERSED 3 Although not before us on Appeal, we leave it to the Examiner to evaluate whether the independent claims are obvious under 35 U.S.C. § 103 over the combination of Vengerov alone or in combination with another reference. Although the Board is authorized to reject claims under 37 C.F.R. § 41.50(b), no inference should be drawn when the Board elects not to do so. See Manual of Patent Examining Procedure (MPEP) § 1213.02.