Cheng, Christopher Thomas. et al.Download PDFPatent Trials and Appeals BoardMar 17, 202013475830 - (D) (P.T.A.B. Mar. 17, 2020) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 13/475,830 05/18/2012 Christopher Thomas Cheng NVID-P-SC-09-0309-US1 5194 45594 7590 03/17/2020 NVIDIA C/O MURABITO, HAO & BARNES LLP 111 NORTH MARKET STREET SUITE 700 SAN JOSE, CA 95113 EXAMINER VU, KHOA ART UNIT PAPER NUMBER 2618 MAIL DATE DELIVERY MODE 03/17/2020 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte CHRISTOPHER THOMAS CHENG, SAU YAN KEITH LI, THOMAS EDWARD DEWEY, and FRANCISCUS W. SIJSTERMANS Appeal 2019-001180 Application 13/475,830 Technology Center 2600 Before MICHAEL J. STRAUSS, JEREMY J. CURCURI, and ADAM J. PYONIN, Administrative Patent Judges. STRAUSS, Administrative Patent Judge. DECISION ON APPEAL1 Pursuant to 35 U.S.C. § 134(a), Appellant appeals from the Examiner’s decision to reject claims 1, 2, 4, 8–12, 14, 15, and 21–29.2 See 1 We refer to the Specification, filed May 18, 2012 as amended on June 5, 2014 (“Spec.”); the Final Office Action, mailed October 17, 2017 (“Final Act.”); the Appeal Brief, filed May 21, 2018 (“Appeal Br.”); and the Examiner’s Answer, mailed September 13, 2018 (“Ans.”). 2 We use the word Appellant to refer to “applicant” as defined in 37 C.F.R. § 1.42. Appellant identifies the real party in interest as the assignee, Nvidia Corporation. Appeal Br. 1. Appeal 2019-001180 Application 13/475,830 2 Appeal Br. 23–29, Claims App.3 We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM IN PART. CLAIMED SUBJECT MATTER According to Appellant, the claims are directed to a graphics system that opportunistically stores a copy of a display frame to enable a power saving mode of operation. Abstract. Claim 1, reproduced below with claim element labels added, is illustrative of the claimed subject matter: 1. A system for driving a display, said system comprising: [(i)] a frame buffer comprising a plurality of partitions respectively mapped to a plurality of discrete memory devices, wherein said frame buffer is operable to store a plurality of image frames from a graphics processing unit; [(ii)] a dedicated copy buffer mapped to a first memory device of said plurality of discrete memory devices, said first memory device corresponding to a first partition of said plurality of partitions, wherein said dedicated copy buffer is operable to store copies of at least one new image frame of said plurality of image frames; [(iii)] a loader circuit coupled to said frame buffer and said dedicated copy buffer, said loader circuit operable to copy new image frames from said frame buffer to said dedicated copy buffer responsive to said at least one new image frame being generated by said graphics processing unit; and [(iv)] a clocked output circuit configured to receive an image frame from said dedicated copy buffer and operable to generate a clocked output and to drive a display device therewith, 3 Although the Examiner includes claim 3 in the listing of claims rejected under 35 U.S.C. § 103(a), the body of the rejection correctly indicates claim 3 together with claims 5–7, 13, and 16–20 are canceled. Ans. 3, 8, 13, and 14. Appeal 2019-001180 Application 13/475,830 3 [(v)] wherein at least one of said plurality of discrete memory devices other than said first memory device is powered down in response to detecting a repeated image frame from said graphics processing unit. REFERENCES The prior art relied upon by the Examiner is: Name Reference Date Lai et al. (“Lai”) US 2008/0100636 Al May 1, 2008 Danskin et al. (“Danskin”) US 7,830,392 Bl Nov. 9, 2010 REJECTION Claims 1, 2, 4, 8–12, 14, 15, and 21–29 stand rejected under pre-AIA 35 U.S.C. § 103(a) as being unpatentable over Lai and Danskin. Ans. 3– 26; see also Final Act. 2–26. OPINION We review the appealed rejection for error based upon the issues identified by Appellant, and in light of the arguments and evidence produced thereon. Ex parte Frye, 94 USPQ2d 1072, 1075 (BPAI 2010) (precedential). Arguments not made are waived. See 37 C.F.R. § 41.37(c)(1)(iv) (2017). Having reviewed the Appellant’s arguments regarding this pre-AIA 35 U.S.C. § 103(a) rejection, we are persuaded the Examiner erred in rejecting independent claim 1 and claims 2, 4, 8, 9, 21–23, and 27 dependent therefrom. We are also persuaded the Examiner erred in rejecting dependent claims 14, 15, 24, and 25. However, we are not persuaded the Examiner erred in rejecting independent claims 10 and 26, which, although argued on the basis of claim 1, include different limitations. In connection with claims 10–12, 26, 28, and 29 we agree with and adopt the Examiner’s findings and Appeal 2019-001180 Application 13/475,830 4 reasoning in the Final Office Action and the Answer as our own and add any additional findings of fact appearing below for emphasis. ANALYSIS The Examiner finds Lai’s computer system having a low-power operating mode of operation teaches all elements of claim 1 except that it “does not explicitly teach a frame buffer comprising a plurality of partitions, respectively mapped to a plurality of discrete memory devices” as recited by claim element (i). Ans. 3–6. To cure the noted deficiency, the Examiner applies Danskin’s graphic processor having a partitioned frame buffer mapped to a plurality of discrete segments of a graphic memory. Ans. 6–7. Appellant contends the rejection is deficient based on two arguments directed to the limitations of independent claim 1, with Appellant contending independent claims 10 and 26 each include limitations similar to those argued in connection with claim 1. Appeal Br. 13–19. Appellant further presents a third argument directed to the data burst limitations recited by dependent claims 14, 15, 21, and 24. Id. at 19–21. In particular, Appellant argues the prior art fails to teach the following: A. a dedicated copy buffer operable to store copies of at least one new image frame (element (ii) of claim 1) (id. at 13– 16); B. a loader circuit operable to copy new image frames from said frame buffer to said dedicated copy buffer responsive to said at least one new image frame being generated by said graphics processing unit (element (iii) of claim 1) (id. at 16– 19); and C. bursting frame data from a frame buffer to a dedicated copy buffer (claims 14, 15, 21, and 24) (id. at 19–21). Appeal 2019-001180 Application 13/475,830 5 For the reasons discussed below, we agree with Appellant’s argument (B) directed to operation of the loader circuit and argument (C) directed to bursting data but find unpersuasive Appellant’s argument (A). Furthermore, we disagree independent claims 10 and 26 include language sufficiently similar to the argued limitations of claim 1 such that Appellant’s argument (B) in connection with claim 1 is not applicable to those claims. C.f. id.at 13. Instead, for the reasons also discussed below, Appellant’s argument (B) is not commensurate in scope with the subject matter recited by independent claims 10 and 26 and, therefore, is unpersuasive of reversible Examiner error. A. Dedicated Copy Buffer Storing a New Image Frame The Examiner finds Lai’s copying of frame data to power-save frame buffer 214 teaches a dedicated copy buffer operable to store copies of a new image frame of a plurality of image frames. Final Act. 5; Ans. 4. Appellant argues “the power-save frame buffer disclosed in Lai is able to achieve power-savings specifically by storing repeated frames only,” i.e, it does not store new frames. Appeal Br. 13. The Examiner responds, explaining Lai teaches a dynamic frame, i.e., a new frame, may be the last to be displayed prior to entering an idle period. According to the Examiner Lai teaches a dynamic frame data because new image frames [are] generated and stored in the system memory (212) by graphic engine processor (e.g. graphic processing unit) when system is not in a power-save mode. Then, new image frames are copied to the power-save frame buffer (referred to as a dedicated copy buffer) [] responsive to the system [being] idle and triggered in a power-save mode (Fig. 5A) to update power- save frame buffer for displaying images (Fig. 5B). Ans. 23. Appeal 2019-001180 Application 13/475,830 6 Appellant’s argument (A) is unpersuasive of reversible Examiner error. Claim 1 neither limits the time during which a generated or retrieved image frame is considered to be a new image frame or otherwise distinguishes the recited new image frame over Lai’s frame data. Likewise, Appellant fails to provide sufficient evidence or reasoned argument distinguishing the new image frame of claim 1 over Lai’s frame data, whether that frame data is dynamic as found by the Examiner or a repeated frame as argued. Thus, under a broad but reasonable interpretation, Lai’s frame data teaches or suggests the claimed new image frame. Furthermore, even if Lai were to disclose a specific embodiment that is responsive to repeated frames for triggering a power-save mode of operation, Appellant fails to explain why, at least during normal operations, non-repeated (e.g., new) frames would not also be stored. B. Loader Circuit Responsive to Generation of New Image Frame The Examiner finds Lai’s storage of new images generated by a graphics engine processor when the system is not in a power-save mode teaches copying a new image frame from the frame buffer to a dedicated buffer responsive to a new image frame being generated by a graphics processing unit. Final Act. 6; see also Ans. 5. Appellant argues the claims explicitly recite that the loader circuit is operable to copy new image frames from said frame buffer to said dedicated copy buffer responsive to said at least one new image frame being generated by said graphics processing unit. Lai appears to teach away from embodiments of the present application, since Lai appears to teach a power-save buffer specifically to store static data, whereas the instant application uses a dedicated buffer specifically to store new frame data. Appeal Br. 18. The Examiner responds, explaining Lai discloses: Appeal 2019-001180 Application 13/475,830 7 new image frames are copied to the power-save frame buffer (referred to as a dedicated copy buffer) in respons[e] to the system [being] idle and triggered in a power-save mode (Fig. 5A) to update power-save frame buffer in order to provide displaying images (Fig. 5B) at the time when computer system (200) is in a power-save mode/idle state[]. Ans. 24. In the absence of sufficient reasoning by the Examiner explaining why copying image data to a power-save frame buffer responsive to entering a power-save mode teaches or suggests copying new images frames from a frame buffer to a dedicated copy buffer responsive to a new image frame being generated, we agree with Appellant that Lai is deficient. Lai discloses copying image data in response to a system idle condition and detection of a graphics idle state triggering a power-save mode as depicted in Figure 5A. Thus, initiation of the copying operation is dependent upon detection of an idle state, not generation of a new image frame as required by claim 1. Accordingly, we do not sustain the rejection of independent claim 1 under 35 U.S.C. § 103(a) over Lai and Danskin or the rejection of dependent claims 2, 4, 8, 9, 21–23 and 27 which stand with claim 1. In connection with independent method claim 10, contrary to Appellant’s assertion that the claim includes limitations similar to those recited by claim 1, we are unable to identify a limitation corresponding to the argued requirement to copy new image frames from a frame buffer to a dedicated copy buffer responsive to at least one new image frame being generated by a graphics processing unit. Appeal. Br. 13. Furthermore, unlike element (iii) of apparatus claim 1, method claim 10 recites the conditional copying of new frame data from a plurality of partitions to a dedicated copy buffer mapped to a first memory “if said frame of data Appeal 2019-001180 Application 13/475,830 8 comprises a new frame of data.” However, a conditional limitation in a method claim is typically not limiting. See Ex parte Schulhauser, No. 2013- 007847, 2016 WL 6277792, at *4-5 (PTAB Apr. 28, 2016) (precedential) (holding conditional limitations in a method claim not limiting under a broadest reasonable interpretation, and thus the Examiner need not apply prior art for the non-limiting elements); see also MANUAL OF PATENT EXAMINING PROCEDURE (MPEP) § 2111.04(II) (9th ed. Rev. 08.2017, Jan. 2018) (citing Schulhauser). Accordingly, Appellant’s argument is unpersuasive as it is not commensurate in scope with claim 10. Therefore, we sustain the rejection of claim 10 together with the rejection of dependent claims 11, 12, and 28 which are not argued separately with particularity. In connection with independent apparatus claim 26, Appellant does not direct attention to and we are unable to identify language corresponding to the argued langue of claim 1 requiring copying new images frames from a frame buffer to a dedicated copy buffer responsive to a new image frame being generated. Accordingly, Appellant’s argument is likewise unpersuasive as not commensurate in scope with claim 26. Therefore, we sustain the rejection of claim 26 together with the rejection of dependent claim 29 which is not argued separately with particularity. C. Bursting of Frame Data The Examiner finds Lai’s disclosure of copying fragmented frame data from block 402 to blocks 404 and 406 of system 212a memory teaches “periodically bursting data from said dedicated copy buffer to an intermediary buffer of a clocked output circuit, said clocked output circuit operable to refresh said display device” as recited by claim 14. Final Act. 14 (citing Lai ¶ 59). Appeal 2019-001180 Application 13/475,830 9 Appellant contends Lai’s transmission of fragmented data is not the bursting of data. In particular, Appellant argues: At paragraph [0040] and Figure 38 of the instant specification, an exemplary data burst scenario is discussed, where a data burst is described as “a relatively high-bandwidth transmission over a short period of time relative to the refresh clock rate.” Applicant submits that both Lai and Danskin are silent with regard to any high-bandwidth transmission over a short period of time relative to a refresh clock rate. Appeal Br. 21. The Examiner replies, contending the argued data burst features are not recited by the claims. Ans. 26. According to the Examiner, “[a]lthough the claims are interpreted in light of the specification, limitations from the [S]pecification are not read into the claims.” Id. (citing In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993)). Appellant’s contention is persuasive of reversible Examiner error. Appellant’s Specification clearly sets forth a definition of the argued bursting limitation: “[a] data burst is a relatively high-bandwidth transmission over a short period of time relative to the refresh clock rate.” It is well established a patent applicant is entitled to be his or her own lexicographer of patent claim terms, in ex parte prosecution it must be within limits. See In re Paulsen, 30 F.3d 1475, 1480 (Fed. Cir. 1994) (holding that an inventor may define specific terms used to describe an invention, but must do so “with reasonable clarity, deliberateness, and precision” and, if done, must “‘set out his uncommon definition in some manner within the patent disclosure’ so as to give one of ordinary skill in the art notice of the change” in meaning) (quoting Intellicall, Inc. v. Phonometrics, Inc., 952 F.2d 1384, 1387-88, (Fed. Cir. 1992)). As Appellants correctly point out, the term “data burst” is explicitly defined in Appeal 2019-001180 Application 13/475,830 10 the Specification as “a relatively high-bandwidth transmission over a short period of time relative to the refresh clock rate.” See, e.g., Appeal Br. 21 (citing Spec. ¶ 40). There can be little doubt that Appellant laid out a deliberate and clear definition as this definition is preceded by “[a] data burst is.” Spec. ¶ 40. The Examiner cannot ignore this definitional language in interpreting the claims. Because the Examiner does not adequately explain why Lai’s fragmented frame data is transmitted at a relatively high- bandwidth transmission over a short period of time relative to the refresh clock rate as required by the claimed data burst, we do not sustain the rejection of claims 14, 15, and 21–25.4 CONCLUSION We affirm the Examiner’s rejection of claims 10–12, 26, 28, and 29. We reverse the Examiner’s rejection of claims 1, 2, 4, 8, 9, 14, 15, 21–25, and 27. 4 The rejection of claims 21–23 is further improper for the reasons discussed above in connection with claim 1 from which these claims depend. Appeal 2019-001180 Application 13/475,830 11 DECISION SUMMARY In summary: Claims Rejected 35 U.S.C. § Reference(s)/Basis Affirmed Reversed 1, 2, 4, 8–12, 14, 15, 21–29 103(a) Lai, Danskin 10–12, 26, 28, 29 1, 2, 4, 8, 9, 14, 15, 21–25, 27 No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED IN PART Copy with citationCopy as parenthetical citation