Opinion
Patent Appeal Nos. 8182, 8205.
November 6, 1969. Rehearing Denied January 29, 1970.
Roger S. Borovoy, attorney of record, Mountain View, Cal., for appellant and cross-appellee J. Harold Kilcoyne, Washington, D.C., and Lawrence B. Dodds, Great Neck, N.Y., of counsel.
Ellsworth H. Mosher, Washington, D.C., for appellee and cross-appellant. Samuel M. Mims, Jr., Dallas, Tex., and Stevens, Davis, Miller Mosher, Washington, D.C., of counsel.
Before RICH, Acting Chief Judge, McGUIRE Judge, sitting by designation, and ALMOND, BALDWIN and LANE, Judges.
These are cross-appeals from the decision of the Board of Patent Interferences awarding priority of invention as to counts 1-4 to Kilby and counts 5 and 6 to Noyce in Interference No. 92,841 involving Noyce patent No. 2,981,877, issued April 25, 1961 on an application filed July 30, 1959, and Kilby application serial No. 169,557, filed January 29, 1962.
Serial No. 830,507.
The sole issue is whether counts 1-4, the subject matter of No. 8182 taken by Noyce, and count 6, involved in No. 8205 brought by Kilby, are supported by a prior copending application of Kilby, serial No. 791,602, filed February 6, 1959 (hereinafter the '602 application). For reasons hereinafter stated, we find that the counts in issue are not supported by the '602 application, and therefore reverse the decision of the board as to counts 1-4 in No. 8182 and affirm it as to count C in No. 8205.
As to count 5, which was also involved in No. 8205, Kilby withdraws his appeal in his brief here and the appeal therefore is dismissed as to that count.
Issued June 23, 1964 as patent No. 3, 138,743.
The subject matter in issue is a semiconductor device including an electrical lead or connection thereto, which device is suitable for use in integrated electronic circuits of very small size. Count 1 is representative:
As an example of the minute size of the circuits, the dimensions of the semiconductor wafer of Fig. 6a of the Kilby '602 application, which figure is reproduced and discussed hereinafter, are given as 0.200 x 0.080 x 0.0025 inches.
1. A semiconductor device comprising a body of semiconductor having a surface, said body containing adjacent P-type and N-type regions with a junction therebetween extending to said surface, two closely spaced contacts a [sic] adherent to said surface upon opposite sides of and adjacent to one portion of said junction, an insulating layer consisting essentially of oxide of said semiconductor on and adherent to said surface, said layer extending across a different portion of said junction, and an electrical connection to one of said contacts comprising a conductor adherent to said layer, said conductor extending from said one contact over said layer across said different portion of the junction, thereby providing electrical connections to both of the closely spaced contacts.
A multi-device semiconductor and lead structure embodying the invention is shown in Figs. 3 and 4 of the Noyce patent, plan and sectional elevation, respectively, as follows:
The illustrated device includes a semiconductor body 11 of silicon of the P-type with one side having a surface 12 and the other side plated with a metal coating 13 which serves as an electrical contact. A plurality of circuit elements are formed within and on the body of silicon by diffusing N-type and P-type dopants, restricted to specific areas by known masking techniques, through the surface 12 to form a plurality of N-type and P-type semiconductor regions which are separated from the underlying P-type region and from each other by a plurality of disked, P-N junctions of various diameters and depths.
Toward the left end of the structure illustrated in Figs. 3 and 4 is shown an N-type region overlying a small P-type region and separated therefrom by a disked junction 14. The small P-type region overlies another N-type region, and the latter N-type region in turn overlies the large P-type region comprising the bulk of the body and is separated therefrom by a disked junction 15. A discoid metal contact 16, adherent to surface 12 within junction 14, makes electrical connection to the upper N-type region. Electrical connection to the two regions between junctions 14 and 15 is made through a C-shaped metal contact 17 adherent to those regions. Since the two intermediate regions of semiconductor material are electrically interconnected by the contact 17, the resulting structure comprises two rectifying P-N junctions in series circuit.
Except for the contacts 16 and 17 and the contacts for other semiconductor devices shown to the right of the device just described, the entire surface 12 is covered with an insulating layer of oxidized silicon. That insulating layer may be formed upon the exposed surface of the silicon during the diffusion of the dopants into the silicon and the contact areas subsequently cleared of the layer by photoengraving techniques. Afterward, conductive metal such as aluminum may be deposited by vacuum deposition and photo-engraving procedures may be used subsequently to remove all the deposited metal except that forming the contacts, such as 16 and 17, and electrical connecting leads thereto such as are shown at 28 and 30. Thus the metal lead strip 30 constituting the conductor from contact 16 passes over junctions 14 and 15 in insulated relationship thereto as the result of intervening oxide layer 27. The Noyce specification emphasizes throughout that the lead strips or conductors are adherent to the oxide layer.
The conductor 30 similarly passes in insulated relationship over another junction 18 of a semiconductor device designed to serve as a capacitor to make electrical connection to terminal 19 of that device. Additional semiconductor devices shown in the drawing include a transistor.
The disclosure of Kilby application '602 is best considered in connection with Fig. 6a thereof:
A thin wafer of single-crystal semiconductor material containing a diffused P-N junction shown there has been processed and shaped to form an integrated electronic circuit constituting a multi-vibrator. Among the elements of the circuit are resistors R1, R2 and R3 and capacitors C1 and C2. Also formed are mesa transistors T1 and T2. Although a semiconducting wafer that is "preferably silicon or germanium" is mentioned, P-type germanium is said to be used for the device shown. In producing the device, one side of the wafer is lapped and polished and then subjected to an antimony diffusion process to provide an N-type layer. Gold is evaporated through a mask to produce areas 51 to 54 which provide ohmic contact with the N-type region such as the transistor base connections. Aluminum is evaporated through a mask shaped to provide the transistor emitter areas 56, which areas form rectifying contacts with the N-type layer. After utilizing a photosensitive resist process to etch the wafer to the proper shape, the photoresist is removed by a solvent and mesa areas 60 are masked by the same photographic process, and the wafer is again etched and the N-type layer removed in the exposed areas. Gold wires 70 are then thermally bonded to appropriate areas to make the necessary electrical connections. As examples, one wire 70 interconnects the emitter areas 56 of the two transistors T1 and T2 and base areas of the transistors are connected to contacts 51 and 52, respectively.
The application includes an enlarged illustration of such a transistor revealing that its designation arises from its having a region of one type conductivity, as the base region, projecting like a plateau or mesa from the surface of a region of a different type conductivity, as the collector region.
The record reveals that an ohmic contact is linear in contrast to the contact at a P-N junction which is non-linear or rectifying.
Kilby's Fig. 6a embodiment shows the gold connecting wires 70 insulated from the other circuit components and from each other by reason of their extending upwardly from the wafer into the air. However, the application describes a modification in a partial paragraph thereof as follows:
Instead of using the gold wires 70, in making electrical connections, connections may be provided in other ways. For example, an insulating and inert material such as silicon oxide may be evaporated onto the semiconductor circuit wafer through a mask either to cover the wafer completely except at the points where electrical contact is to be made thereto, or to cover only selected portions joining the points to be electrically connected. Electrically conducting material such as gold may then be laid down on the insulating material to make the necessary electrical circuit connections.
The issue which we must determine is whether Gilby '602 supports recitations such as those in count 1, supra, which require a conductor that is adherent to the surface of an insulating layer of oxide of the semiconductor and provides an electrical connection passing across a junction at the surface of the semiconductor betwen P-type and N-type regions.
Kilby's continuation-in-part application directly involved in the interference, filed after the Noyce patent issued, contains much material not included in the parent '602 application and its support for the counts in issue is unquestioned. Thus, the later application adds to the statement in '602 that electrically conducting material such as gold may be "laid down" on the insulating material, a disclosure of "gold ribbons * * * plated onto and adhering to the silicon oxide layer." The involved application also adds a disclosure of a method for applying gold interconnections and includes several new figures which, taken with their description, clearly disclose the structure of the counts.
The board found the reference to an insulating material "such as silicon oxide" in the described modification of Fig. 6a supports the requirement for an insulating material consisting of "oxide of said semiconductor," because of the disclosure that either silicon or germanium could be used as semiconductor material, which precedes the statement that the wafer of Fig. 6a is of germanium. Apparently Noyce does not challenge that conclusion here.
With respect to the requirement of count 1 for a conductor adherent to the layer of insulation, the board referred to testimony taken by Noyce "to show that gold film deposited on silicon oxide is not adherent thereto." It stated that it was not particularly impressed by that testimony because it was directed exclusively to gold and took the view that the statement in Kilby '602 that electrically conducting material "such as gold" may be laid down merely gives gold as an example. The board then concluded that "one skilled in the art of fabricating such devices * * * would have no difficulty in selecting a metal which would unquestionably adhere to the silicon oxide layer." It further referred to the fact that Kilby '602 discloses forming a capacitor on a semiconductor wafer by applying a coating of aluminum on a layer of silicon oxide previously provided on the wafer and stated that there was no suggestion by Noyce that aluminum or some other material known to be adherent would not be satisfactory to obtain a "conductive film."
It appears that the testimony for Noyce might be more precisely described as directed to showing that gold could not be deposited on silicon dioxide so as to adhere satisfactorily thereto at the time the Kilby '602 application was filed in 1959. Kilby joined issue on that matter and both parties conducted inter partes tests. Since we do not rest our decision here on those tests, they will not be further discussed.
The board also specifically considered the limitation in count 1 reading:
* * * said conductor extending from said one contact over said [insulating] layer across said different portion of the junction * * *.
It viewed that limitation as requiring only one insulating layer and one conducting film thereon crossing a junction between the P-type and N-type regions and stated that it would be satisfied if the single conductor 70 interconnecting the emitter contacts 56 of Fig. 6a of Kilby were "provided by a conductive film on a layer of silicon oxide." While conceding that Kilby '602 does not expressly point out, or distinctly show, where the junction between P-type and N-type regions is found or where there is a "different portion" of that junction which is crossed by the insulating layer and overlaying conductor, the board held that those features "are necessarily implicit therein."
Before us, Noyce stresses the argument that a "conductor adherent to the surface of the oxide and crossing a junction" is an essential feature of the invention and is not disclosed by the Kilby '602 application. He observes that Kilby must rely for the "conductor adherent" limitation of count 1 on the sentence in the reference to the modification of his Fig. 6a structure which states that "[e]lectrically conducting material such as gold may then be laid down on the insulating material to make the necessary electrical circuit connections." It is Noyce's position that this suggestion that the electrical connection be "laid down" on the insulating layer does not teach that it be "adherent" thereto and that such adherency is not otherwise taught in the '602 application.
Kilby does not deny that his '602 application lacks language stating that a conductor in his modified Fig. 6a construction is "adherent" to the insulating layer. He nevertheless contends that the application should be interpreted as supporting the limitations in question.
As pointed out by Noyce, the present case generally parallels the case of Dyer v. Field, 386 F.2d 466, 55 CCPA 771 (1967). There, the junior party Field was involved in interference on a continuation-in-part application which was expanded substantially over the parent application relied on for priority with respect to the very feature of the invention in issue that was in controversy. The same is true here with the additional aspect that Kilby's directly involved application was filed after Noyce's patent issued. However, we agree with Kilby that Field's being involved in the interference on a new application having an expanded disclosure "alone was not what caused the final ruling adverse to Field." Rather, the decision there was based on a finding that the earlier Field application did not disclose the invention in issue. So too, the determinative matter here is whether earlier filed Kilby '602 supports the counts. The criterion for determining whether an application supports a count is whether the "necessary and only reasonable construction" to be given the disclosure by one skilled in the art is one which provides such support. Binstead v. Littmann, 242 F.2d 766, 44 CCPA 839 (1957). That requirement is the same where one relies on the earlier application for support in order to obtain the benefit of its filing date as where support in an application directly involved in interference is in issue. See Guyer v. Cramer, 318 F.2d 757, 50 CCPA 1386 (1963). The burden on one copying a claim from a patent was recently summarized in Gubelmann v. Gang, 408 F.2d 758, 56 CCPA 1013 (1969), as follows:
One copying a claim from a patent has the burden of showing that his application clearly supports the count. In determining applicant's right to make a copied claim, all limitations in the claim will be considered material and doubts arising as to such right must be resolved against the copier. Where support must be based on an inherent disclosure, it is not sufficient that a person following the disclosure might obtain the result set forth in the count; it must invariably happen. See Smith v. Wehn, 318 F.2d 325, 50 CCPA 1544 and Dreyfus and Harrison v. Sternau, 357 F.2d 411, 53 CCPA 1050.
Although the board held here, as already noted, that one skilled in the art would have no difficulty in "selecting" a metal which would adhere to the silicon oxide layer suggested in the Kilby '602 application, that finding avoids the real issue which is whether the application includes a disclosure that the conductor is to be adherent to the layer. The board did subsequently get to that issue, stating:
Noyce urges that there is nothing in the paragraph relied on in the parent Kilby case to indicate that Kilby had any concern about whether the conducting material would have any adherence at all since there is only the statement that the conducting material be "laid down on the insulating material". This is true only to the extent that Kilby clearly suggested no particular degree of adherence as mentioned above. We think that the clear import of the Kilby disclosure is that the device constructed in the manner taught would be usable under ordinary circumstances and would be expected to withstand normal handling. In our opinion this would necessarily involve at least some degree of adherence * * *. [Emphasis supplied.]
No sound support is seen for the board's view that "at least some degree of adherence" would necessarily be involved. As pointed out by Noyce, the implication of the reasoning by which the board reaches that conclusion is that "Kilby's own preferred embodiment in '602, shown in Fig. 6a, where the gold wires 70 clearly were not adherent, was not `usable under ordinary circumstances.'"
The disclosure relied on by the board of a coating of aluminum on silicon oxide in a capacitor is illustrated in Fig. 2a of Kilby '602, reproduced below:
There, a body 15a of semiconductor material constitutes one plate of the capacitor. Silicon oxide is applied to that body by evaporation or thermal oxidation techniques to serve as the dielectric 18 of the capacitor. The second plate 19 is provided by evaporating on the oxide dielectric a conductive material, gold or aluminum being described as satisfactory.
While that disclosure indicates that it was known in 1959 that aluminum could be deposited on an oxide layer to form the plate of a capacitor, it does not seem to us to constitute any clear suggestion that conductors interconnecting terminals of semiconductor devices should be so deposited.
The gist of the reasoning of Kilby on the point under consideration is found in the following argument in his brief:
The word "laid" (the past participle of the word "lay") has quite a large number of meanings. In addition to laying down as a carpet on a floor, there are other meanings given in Webster's International Dictionary, such as to dispose of as over a surface; as to lay a pavement; to coat. For the word "laying" the meaning is given as that of "the act of one who acts or sets, puts, places, fixes, etc."
The intention of Kilby was to describe in a very broad sense the act of making appropriate and necessary electrical connections to semiconductor devices wherein an inert and insulating material such as silicon oxide separated the electrical conductor from the semiconductor substrate. It was Kilby's purpose to describe an operative embodiment so as to teach the art the means of making necessary electrical connections in integrated circuits. The words "laid down" quite obviously mean depositing or plating by an appropriate means such as that referred to in his application in connection with the evaporation of aluminum and gold onto the same kind of substrates and same kinds of materials. The language is quite clear to one desiring to make the same kinds of electrical connections unless one deliberately intends to misunderstand. Therefore, it seems clear that an effort has been made to find a lack of teaching where none exists. Neither the Primary Examiner nor the Board of Patent Interferences had any difficulty with the language in question.
That argument embodies an inherent concession that "laid down" can cover a relationship where adherency is lacking as well as one where it exists, which fact precludes any conclusion that the term "laid down" per se meets the requirement that the claimed features must be inherently disclosed in order to find support in an application. It is also apparent that Kilby has not demonstrated that the term "laid down" had at the time of filing of the '602 application in 1959, or has since, acquired a meaning in electronic or semi-conductor arts which necessarily connotes adherence. The position that "laid down" means depositing or plating by means such as are referred to in the application "in connection with the evaporation of aluminum and gold onto the same kind of substrates and same kinds of materials" cannot stand analysis. The disclosure in Kilby 602 of evaporating conductive metal onto a substrate of oxide relates to the forming of the plate 19 of the capacitor of Fig. 2a as discussed hereinabove. As there pointed out, that plate is an element of the capacitor and is not a conductor for making an electrical connection between circuit elements. We do not find any suggestion in the application that would lead a person of ordinary skill in the art to interpret Kilby's discussion of a modified electrical connecting means as teaching the use of a process he discloses only for making a capacitor plate.
Each party took testimony of a witness who was an expert in the art and both of those witnesses agreed that "laid down" does not necessarily imply adherence. Kilby's expert, Professor Maurer, testified:
XQ29. * * * supposing I do the operation with a long piece of wire and I just lay it down across the pads? A. Yes.
XQ30. And then I come with the heater and bond the two ends; haven't I laid down this gold wire on the device? A. I think the term could include that. As I believe I testified before, I don't consider that laid down implies more than the act of placing in contact.
Now, you may lay down an object on a table. I say I laid down the match box. That does not imply that the match box adheres to the table. But I might say I laid down a coat of tar on a highway and that would certainly imply that the tar adhered to the ground. It wouldn't serve its purpose otherwise.
As to Kilby's statement that neither the examiner nor the board had "any difficulty with the language in question," we do not regard the concurrence of the examiner and board to have any substantial significance in the present circumstances. The record shows merely that the examiner held that there was support in the portions of the '602 application considered here and not that he gave any reasons for his views. The analysis by which the board reached its conclusion is considered to be clearly in error for the reasons already pointed out.
In summary, the best that can be said for Kilby's position with respect to the recitation in count 1 regarding a "conductor adherent" to the proposed layer of oxide and crossing a junction of the semiconductor is that there might be a possibility that one skilled in the art following the Kilby '602 application would have provided such a structure. However, we are not convinced that such person would inevitably do so or that such structure would result from the necessary and only reasonable construction of the disclosure by one skilled in the art.
Since counts 2-4, which call for "a metal strip" which is "adherent" to the oxide layer, possess in substance the same requirements as count 1 on the point under discussion, it must be held that the board erred in finding support for those counts as well as for count 1.
As to count 6, the board held that the Kilby '602 application lacked support for a limitation therein regarding the circuit in which the semiconductor device is to be used. Before us, Noyce concedes error in that particular holding. However, as pointed out by Noyce, that count embodies substantially the same limitations regarding the adherent conductor which we have here found unsupported in counts 1-4. The board's holding that the '602 application fails to support count 6 must therefore be sustained on the latter basis.
The decision is reversed as to counts 1-4 involved in No. 8182 and affirmed as to count 6 in No. 8205.
Modified.