Ex Parte Jindal et alDownload PDFPatent Trial and Appeal BoardFeb 29, 201612489366 (P.T.A.B. Feb. 29, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 12/489,366 0612212009 90864 7590 03/17/2016 Brocade Communications c/o Bever, Hoffman & Harms, LLP 39500 Stevenson Place Suite 209 Fremont, CA 94539 FIRST NAMED INVENTOR Avinash Jindal UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. BR0-003 (FDRY-0191-US) CONFIRMATION NO. 1486 EXAMINER DAILEY, THOMAS J ART UNIT PAPER NUMBER 2452 NOTIFICATION DATE DELIVERY MODE 03/17/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): creddick@beverlaw.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte A VIN ASH JINDAL, DEEP AK BANSAL, SAM HTIN MOY, DAVID CHEUNG, BING WANG, MANI KANCHERLA, and SRIDHAR DEV ARAP ALLI Appeal2014-004258 Application 12/489,366 Technology Center 2400 Before ST. JOHN COURTENAY III, JOHN A. EV ANS, and MONICA S. ULLAGADDI, Administrative Patent Judges. Opinion for the Board filed by Administrative Patent Judge MONICA S. ULLAGADDI. Opinion dissenting-in-part fiied by Administrative Patent Judge ST. JOHN COURTENAY III. ULLAGADDI, Administrative Patent Judge. DECISION ON APPEAL Appellants appeal under 35 U.S.C. § 134 from a final rejection of claims 1-18. We have jurisdiction under 35 U.S.C. § 6(b). We reverse. STATEMENT OF THE CASE Claim 8, reproduced below with a key disputed limitation emphasized, is illustrative of the claimed subject matter: Appeal2014-004258 Application 12/489,366 8. A blade for a network device comprising: a plurality of processors; a plurality of local counter memories, each storing local counter values associated with a corresponding one of the processors; an accumulator circuit that receives and aggregates the local counter values from each of the local counter memories; and a control line coupling the accumulator circuit to an external connector of the blade, wherein the control line carries a control signal that synchronizes the aggregation of the local counter values within the network device. REJECTIONS Claims 8-16 stand rejected under 35 U.S.C. § 102(b) as being anticipated by Bergen (US 2004/0210887 Al; pub. Oct. 21, 2004). Claims 1, 3---6, and 17-18 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Ma (US 2008/0016206 Al; pub. Jan. 17, 2008) and Bergen. Claims 2 and 7 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Ma and Bergen in view of Official Notice. ANALYSIS First Issue: Does Bergen disclose "an accumulator circuit that receives and aggregates the local counter values from each of the local counter memories," as recited in claim 8 and similarly recited in claim 13? The Examiner finds paragraphs 69 and 70 of Bergen disclose the claimed "accumulator circuit" recited in claims 8 and 13. Final Act. 6-7. More particularly, the Examiner finds Bergen discloses cache controllers 1002 that distribute a series of read requests to equivalent engines 1004, 2 Appeal2014-004258 Application 12/489,366 which "maintain various internal counters, variables, parameters, result sets, memory layouts, etc." Ans. 4. The Examiner explains "the controllers 1002 need to know information, such as, for example, what engines 1004 are available and what data is loaded into each engine 1004" and for this reason, "variables and counters are checked and balanced" in the "equivalent engines." Id. (discussing how "'reading' is equivalent to 'checking' and Bergen explicitly states this is done with load balancing operations by the controllers" via the series of read requests). Appellants contend Bergen fails to disclose, inter alia, the "accumulator circuit" recited in claims 8 and 13. App. Br. 13. In particular, Appellants argue: Bergen explicitly teaches that read requests are distributed between various equivalent engines 1004, such that the internal variables (e.g., the 'various internal counters') of these equivalent engines 1004 are not identical (i.e., identical occurrences of internal variables are avoided). Thus, while the equivalent engines l 004 store the same data for read purposes, the internal variables (e.g., internal counters) of these equivalent engines are purposely controlled to not be identical. Bergen therefore teaches away from 'variables and counters are checked and balanced' (and are therefore subject to 'a central aggregation') in the equivalent engines 1004 as required by the Examiner's rejection. Id. at 15-16. Although Bergen teaches load balancing read requests to avoid identical occurrences of internal variables among mirrored engines containing the same data, Bergen does not disclose that the read requests obtain the internal variables. See Bergen i-fi-168, 69. Bergen also does not disclose that the read requests obtain control data 1102, 3 Appeal2014-004258 Application 12/489,366 which is maintained so that controller 1002 can perform its tasks. See id. at i-f 70. Accordingly, we agree that Bergen does not disclose checking and balancing variables and counters in the cited portions of Bergen, contrary to the Examiner's finding. Final Act. 6; Ans. 4. The Examiner's finds that checking and balancing is "an 'aggregation,' since Bergen sends out a series of read requests to avoid identical occurrences of internal variables/counters and to know what data is loaded into each engine ... [and] this is clearly gathering (i.e., aggregating) the counters together as it would be wholly ineffective if it was not." Ans. 4. This reasoning is insufficient to support the finding that, in Bergen, counter values are necessarily read and aggregated, as contrasted with mirrored data being returned in response to a read request. See App. Br. 15-16. We find Appellants' argument that Bergen discloses the read requests obtain the mirrored data instead of the internal variables persuasive. Id. In view of the above, the Examiner does not point to a section of Bergen that explicitly discloses "receiv[ing] and aggregat[ing] local counter values from each of the local counter memories," nor does the record before us indicate the Examiner to have found this claim limitation to have been implicit or inherent. Thus, we are persuaded the Examiner erred in finding Bergen discloses "an accumulator circuit" as recited in claim 8, and a commensurate limitation of claim 13, as well as erred in finding Bergen discloses the limitations of claims 9-12 and 14--16, which depend from claims 8 and 13, respectively. Accordingly, we do not sustain the rejection of claims 8-16 under 35 U.S.C. § 102(b) as anticipated by Bergen. 4 Appeal2014-004258 Application 12/489,366 Second Issue: Does the combination of Ma and Bergen teach or suggest "performing a load balancing with the first and second sets of processors in response to the first global set of aggregated counter values," as recited in claim 1 7 and as similarly recited in claim 1? The Examiner finds Ma "does not disclose the values are local counter values," nor that the "those counter values [are] aggregated and used to perform load balancing" and cites paragraph 69 of Bergen for these teachings. Final Act. 11. In the Examiner's Answer, the Examiner finds "Ma discloses both aggregation and load balancing, but Ma did not disclose doing this specifically with local counter values." Ans. 10. Appellants argue the combination of Ma and Bergen set forth by the Examiner fails to teach or suggest "aggregating ... thereby creating a first global set of aggregated counter values" and "performing a load balancing ... in response to the first global set of aggregated counter values," as recited in claim 17 and commensurate limitations of claim 1. See App. Br. 22-24. As discussed above, Bergen teaches load balancing read requests to avoid identical occurrences of internal variables among mirrored engines containing the same data. See Bergen i-fi-168, 69. Even assuming, arguendo, Bergen teaches or suggests aggregating local counter values, we agree with Appellants that Bergen fails to teach or suggest "performing a load balancing" as claimed because Bergen does not teach or suggest load balancing based on aggregating local counter values. See App. Br. 22-24. As discussed above, the 5 Appeal2014-004258 Application 12/489,366 Examiner interprets Bergen's read requests to obtain counter values in a load balanced fashion. See Ans. 4. According to this interpretation, the aggregating in Bergen would be based on the load balancing, instead of the converse proposition, "performing a load balancing ... in response to the first global set of aggregated counter values," as recited in claim 17 and similarly recited in claim 1. For the foregoing reasons, we are persuaded the Examiner erred in finding the combination of Ma and Bergen teaches or suggests the disputed limitations of claims 1 and 17, as well as the limitations of claims 2-7, 1 7, and 18, which depend from claims 1 and 17, respectively. Accordingly, we do not sustain the rejection of claims 1-7, 17, and 18 under 35 U.S.C. § 103(a). DECISION The Examiner's decision to reject claims 1-18 is reversed. REVERSED COURTENAY, Administrative Patent Judge dissenting-in-part: I respectfully dissent regarding the rejection of independent claim 8 as being anticipated by Bergen. I would affirm the rejection under 35 U.S.C. § 102(b), and adopt the reasoning and findings of the Examiner, as set forth in the Final Action (2--4, 6) and the Answer (3---6). 6 Appeal2014-004258 Application 12/489,366 The Examiner finds Bergen describes: an accumulator circuit that receives and aggregates the local counter values from each of the local counter memories ([0069]- [0070], "equivalent engines" variables and counters are checked and balanced with the use cache controllers which know "what data is loaded into each engine" (i.e. a central aggregation of the variables and counters specifically discussed in [0069]; further see Fig. 11) (Final Act. 6) The majority states: "the Examiner does not point to a section of Bergen that explicitly discloses 'receiv[ing] and aggregat[ing] local counter values from each of the local counter memories,' nor does the record before us indicate the Examiner to have found this claim limitation to have been implicit or inherent." (Dec. 4). 1 However, the Examiner explains his broader claim interpretation: the examiner firstly stresses the breadth of the claim limitation which recites, "an accumulator circuit that receives and aggregates the local counter values from each of the local counter memories." There is no limitation with respect to what the counters represent or what specifically is meant by aggregating. Simply put, all that Bergen needs to disclose is a circuit that receives and "aggregates" counters from local memories. Aggregate in broad terms simply means to collect or gather into a mass or whole and in this context the examiner interprets this to mean gathering the counters together. (Ans. 3, emphasis added) Our reviewing court guides that because "applicants may amend claims to narrow their scope, a broad construction during prosecution creates 1 Decision 4, referring to the majority opinion herein. 7 Appeal2014-004258 Application 12/489,366 no unfairness to the applicant or patentee." In re ICON Health and Fitness, Inc., 496 F.3d 1374, 1379 (Fed. Cir. 2007) (citation omitted). However, Appellants additionally contend: "even if Bergen were to teach that 'variables and counters are checked and balanced' in the 'equivalent engines', a structure that checks and balances variables and counters is not equivalent to 'an accumulator circuit that ... aggregates ... local counter values' as recited by Claim 8." (App. Br. 16, emphasis added). But Appellants do not cite to a definition of "accumulator circuit" in the Specification that would preclude the Examiner's broader reading. 2 Moreover, claim 8 defines the "accumulator circuit" usingfunctional language instead of as a particular structural arrangement of electronic components or registers: "an accumulator circuit that receives and aggregates the local counter values from each of the local counter . " memorzes; .... The Examiner explains the finding of anticipation, taking into account a broader reading of the claim term "aggregates": With that [claim interpretation] in mind, Bergen discloses an accumulator circuit that receives and aggregates the local counter values from each of the local counter memories ([0069]- [0070], "equivalent engines" variables and counters are checked and balanced with the use of cache controllers "to avoid identical 2 Any special meaning assigned to a term "must be sufficiently clear in the specification that any departure from common usage would be so understood by a person of experience in the field of the invention." Multiform Desiccants Inc. v. Medzam Ltd., 133 F.3d 1473, 1477 (Fed. Cir. 1998); see also Helmsderfer v. Bobrick Washroom Equip., Inc., 527 F.3d 1379, 1381 (Fed. Cir. 2008) ("A patentee may act as its own lexicographer and assign to a term a unique definition that is different from its ordinary and customary meaning; however, a patentee must clearly express that intent in the written description."). 8 Appeal2014-004258 Application 12/489,366 occurrences" and to know "what data is loaded into each engine;" further see Fig. 11 ). (Ans. 4, emphasis added). Bergen explicitly states in these paragraphs (emphasis added by Examiner) "In the fast cache implementation, engines 1004 maintain various internal counters, variables, parameters, result sets, memory layouts, etc. To avoid identical occurrences of internal variables, a series of read requests may be distributed between equivalent engines 1004 through any load balancing techniques ... As shown in FIG. 11, the cache controllers 1002 are responsible for distributing requests to the appropriate engines 1004. Thus, the controllers 1002 need to know information, such as, for example, what engines 1004 are available and what data is loaded into each engine 1004." That is, "reading" is equivalent to "checking" and Bergen explicitly states it this is done with load balancing operations by the controllers, i.e. the accumulator circuit. Thus, Bergen does disclose "variables and counters are checked and balanced" in the "equivalent engines". In terms of this act being an "aggregation," since Bergen sends out a series of read requests to avoid identical occurrences of internal variables/counters and to know what data is loaded into each engine, the examiner's position is that this is clearly gathering (i.e. aggregating) the counters together as it would be wholly ineffective if it was not. (Ans. 4). Nevertheless, the majority (Dec. 4) concludes: [The Examiner's] reasoning is insufficient to support the finding that, in Bergen, counter values are necessarily read and aggregated, as contrasted with mirrored data being returned in response to a read request. See App. Br. 15-16. We find Appellants' argument that Bergen discloses the read requests obtain the mirrored data instead of the internal variables persuasive. Id. 9 Appeal2014-004258 Application 12/489,366 However, a review of the Appeal Briefs reveals that Appellants do not expressly argue: "that Bergen discloses the read requests obtain the mirrored data instead of the internal variables." (Id.). Regarding any mention of the mirrored data in Bergen, Appellants actually argue in the principal Brief (15): Moreover, Bergen teaches away from "variables and counters" being "checked and balanced" in the "equivalent engines 1004" as suggested by the Examiner. That is, Bergen teaches "If two mirrored copies [mirrored engines 1004] maintained exactly the same state, then a software bug causing failure would likewise cause failure in each mirror. To prevent this, it is useful that mirrored engines 1004 not maintain exactly the same state, only the same data". (Emphasis added.) (Bergen, paragraph [0068].) As previously set forth in the majority opinion above (Dec. 3), Appellants also argue: Bergen explicitly teaches that read requests are distributed between various equivalent engines 1004, such that the internal variables (e.g., the 'various internal counters') of these equivalent engines 1004 are not identical (i.e., identical occurrences of internal variables are avoided). Thus, while the equivalent engines 1004 store the same data for read purposes, the internal variables (e.g., internal counters) of these equivalent engines are purposely controlled to not be identical. Bergen therefore teaches away from 'variables and counters are checked and balanced' (and are therefore subject to 'a central aggregation') in the equivalent engines 1004 as required by the Examiner's rejection. (App. Br. 15-16, italics added for emphasis, underline in original). 10 Appeal2014-004258 Application 12/489,366 However, both of Appellants' arguments are misplaced because "[ t ]eaching away is irrelevant to anticipation." Seachange International, Inc., v. C-Cor, Inc., 413 F.3d 1361, 1380 (Fed. Cir. 2005). "A reference is no less anticipatory if, after disclosing the invention, the reference then disparages it .... [T]he question whether a reference 'teaches away' from the invention is inapplicable to an anticipation analysis." Celeritas Techs., Ltd. v. Rockwell Int'! Corp., 150 F.3d 1354, 1361 (Fed.Cir. 1998). This reasoning is applicable here. Regarding the additional argument for claim 8 advanced in the Reply Brief ( 6, i-f2), I am of the view this is a new argument not in response to any shift in the Examiner's position in the Answer, and is therefore untimely and should not be considered under our procedural rules. See 37 C.F.R. § 41.41(b)(2). Regarding the claimed "control line" of claim 8, the Examiner finds this feature is described in "Fig. 11 [of Bergen] which shows control lines between cache controllers 1102 and cache engines 1004." (Final Act. 7). In response, Appellants advance no substantive argument. Instead, Appellants merely assert: "Bergen fails to teach or suggest that these lines carry 'a control signal that synchronizes the aggregation of the local counter values' as recited by Claim 8." (App. Br. 17). 3 3 See In re Lovin, 652 F.3d 1349, 1357 (Fed. Cir. 2011) ("[W]e hold that the Board reasonably interpreted Rule 41.37 to require more substantive arguments in an appeal brief than a mere recitation of the claim elements and a naked assertion that the corresponding elements were not found in the prior art."). 11 Appeal2014-004258 Application 12/489,366 On this record, and by a preponderance of evidence, I am not persuaded the Examiner erred regarding the finding of anticipation over Bergen for at least claim 8. Accordingly, I would affirm the Examiner's§ 102 rejection of claim 8 over Bergen for essentially the same reasons set forth by the Examiner in the Final Action and Answer, as discussed above. 12 Copy with citationCopy as parenthetical citation