Apple Inc.

Patent Trials and Appeals Board

Aug 16, 2021

2020003300 (P.T.A.B. Aug. 16, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/715,739 09/26/2017 Ronald W. Dimpflmaier P34047US1/APPL:0764 8933
73576 7590 08/16/2021
APPLE INC. - Fletcher
c/o Fletcher Yoder, PC
P.O. Box 692289
Houston, TX 77269-2289
EXAMINER
TRANDAI, CINDY HUYEN
ART UNIT PAPER NUMBER
2648
NOTIFICATION DATE DELIVERY MODE
08/16/2021 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
docket@fyiplaw.com
hennessey@fyiplaw.com
hill@fyiplaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
________________

Ex parte RONALD W. DIMPFLMAIER,
RASTISLAV VAZNY, and LYDI R. SMAINI1
________________

Appeal 2020-003300
Application 15/715,739
Technology Center 2600
________________

Before BIBHU R. MOHANTY, BRADLEY W. BAUMEISTER, and
JENNIFER MEYER CHAGNON, Administrative Patent Judges.

BAUMEISTER, Administrative Patent Judge.

DECISION ON APPEAL
Appellant appeals under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1, 2, 6–11, 13–24, and 26–29, which constitute all claims
pending in this application. Appeal Br. 7–19.2 We have jurisdiction under
35 U.S.C. § 6(b).
We affirm.

1 “Appellant” refers to “applicant” as defined in 37 C.F.R. § 1.42. Appellant
identifies Apple as the real party in interest. Appeal Brief filed October 7,
2019 (“Appeal Br.”) 2.
2 Rather than repeat the Examiner’s positions and Appellant’s arguments in
their entirety, we refer to the above mentioned Appeal Brief, as well as the
following documents for their respective details: the Final Action mailed
April 11, 2019 (“Final Act.”); the Examiner’s Answer mailed January 30,
2020 (“Ans.”); and the Reply Brief filed March 30, 2020 (“Reply Br.”).
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CLAIMED SUBJECT MATTER
Appellant describes the present invention as follows:
The present disclosure relates to radiofrequency (RF)
communications systems that may operate efficiently over a
broad range of signal output levels. Electronic devices may
employ amplification circuitry in the communication RF systems
to provide output signal power. For example, amplification
provided by external power amplifiers disposed in front-end
modules may be more efficient at a higher range of output signal
power, but may be inefficient at a lower range of output signal
power. The disclosure relates to architectures for RF
communication systems having transceivers and front-end
modules that may provide power-efficient over broad ranges.
Front-end modules may, for example, be managed to disable
and/or enable external power amplifiers based of the output
signal power. Transceivers may, for example, include internal
power amplifier which may provide amplification for low output
signals, and may operate as a driver to the external power
amplifier of the front-end module for high output signals.
Methods for managing the circuitry are also discussed.
Abstract.
Independent claim 1, reproduced below, illustrates the appealed
claims:
1. An electrical device comprising:
a radio frequency (RF) transceiver comprising an internal
power amplifier coupled to a transmit (TX) port of the RF
transceiver;
a front-end module comprising:
a power amplifier coupled to the TX port of the RF
transceiver, wherein the front-end module is configured to
couple to an antenna that transmits an output RF signal;
switching circuitry configured to bypass the power
amplifier of the front-end module; and
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a controller configured to select a mode of operation from
a set of modes of operation comprising:
an internal power amplifier mode, wherein the
power amplifier of the front-end module is disabled and
the transceiver is configured to increase a gain of the
internal power amplifier in response to an increase in a
demand of a power of the output RF signal; and
a front-end power amplifier mode, wherein the
power amplifier of the front-end module is dynamically
adjusted based on an envelope of the output RF signal.
Appeal Br. 20 (Claims App.).

STATEMENT OF THE REJECTIONS
Claim 29 stands rejected under 35 U.S.C. § 112(a) (pre-AIA 112, ¶ 1)
as failing to comply with the written description requirement. Final Act. 2.
Claim 29 stands rejected under 35 U.S.C. § 112(b) as being indefinite
for failing to particularly point out and distinctly claim. Final Act. 2.
Claims 1, 2, 11, 13, 17–20, 23, 24, and 26–28 stand rejected under
35 U.S.C. § 103 as being unpatentable over Zhu (US 2012/0056677 A1;
published Mar. 8, 2012), He (US 2011/0021237 A1; published Jan. 27,
2011), and Ando (US 2005/0156669 A1; published July 21, 2005). Final
Act. 3–7.
Claim 6 stands rejected under 35 U.S.C. § 103 as being unpatentable
over Zhu, He, Ando, and Duncan (US 2018/0034416 A1; published Feb. 1,
2018). Final Act. 7–8.
Claim 7 stands rejected under 35 U.S.C. § 103 as being unpatentable
over Zhu, He, Ando, and Hou (US 2017/0163298 A1; published June 8,
2017). Final Act. 8.
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Claim 8 stands rejected under 35 U.S.C. § 103 as being unpatentable
over Zhu, He, Ando, and Lam (US 10,111,115 B2; issued Oct. 23, 2018).
Final Act. 9.
Claim 9 stands rejected under 35 U.S.C. § 103 as being unpatentable
over Zhu, He, Ando, and Cho (US 6,397,090 B1; issued May 28, 2002).
Final Act. 9–10.
Claim 10 stands rejected under 35 U.S.C. § 103 as being unpatentable
over Zhu, He, Ando, and Jin (US 2016/0226552 A1; published Aug. 4,
2016). Final Act. 10.
Claims 14 and 15 stand rejected under 35 U.S.C. § 103 as being
unpatentable over Zhu, He, Ando, and Khesbak (US 2018/0076772 A1;
published Mar. 15, 2018). Final Act. 11.
Claims 16 and 22 stand rejected under 35 U.S.C. § 103 as being
unpatentable over Zhu, He, Ando, and Vaillancourt (US 2016/0276983 A1;
published Sept. 22, 2016). Final Act. 11–12.
Claim 21 stands rejected under 35 U.S.C. § 103 as being unpatentable
over Zhu, He, Ando, and Narathong (US 2015/0373711 A1; published
Dec. 24, 2015). Final Act. 13.
Claim 29 stands rejected under 35 U.S.C. § 103 as being unpatentable
over Zhu, He, Ando, and Sridhar (US 2014/0177037 A1; published
June 26, 2014). Final Act. 13–14.

STANDARD OF REVIEW
The Board conducts a limited de novo review of the appealed
rejections for error based upon the issues identified by Appellant, and in
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light of the arguments and evidence produced thereon. Ex parte Frye,
94 USPQ2d 1072, 1075 (BPAI 2010) (precedential).

THE INDEFINITENESS REJECTION
The Examiner’s Determinations and Appellant’s Contentions
Claim 29 recites, “[t]he method of claim 17, wherein the front-end
module provides unity gain in the lower power specification mode.” Appeal
Br. 24.
The Examiner rejects claim 29 under 35 U.S.C. § 112(b) as being
indefinite for failing to particularly point out and distinctly claim the subject
matter that the inventor regards as the invention. Final Act. 3. More
specifically, the Examiner determines that the term “unity gain” does not
appear in Appellant’s originally filed Specification, and “there is confusion
in how the font end module can provide unity gain in the lower power
specification, when there is no mention of what [the term] really means.”
Ans. 10. The Examiner determines, then, that the term is vague and unclear.
Final Act. 3; Ans. 10.
Appellant argues, “the term ‘unity gain’ is well-understood to mean
that an input voltage and an output voltage are the same (e.g., such that the
gain factor equals 1.)” Appeal Br. 8. Appellant cites external evidence to
support that this term was well-understood. Id. (citing a Wikipedia page on
electronic gain); see https://en.wikipedia.org/wiki/Gain_(electronics).
Analysis
The cited Wikipedia page states, “[a] gain of factor 1 (equivalent to
0 dB) where both input and output are at the same voltage level and
impedance is also known as unity gain.” Wikipedia, Gain (electronics) I
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(available at https://en.wikipedia.org/wiki/Gain_(electronics)). As such,
Appellant provides at least some modicum of evidence to support the
position that the term “unity gain” has a well-understood meaning. Appeal
Br. 8. And the Examiner provides no evidence to support the opposite
conclusion that term is vague and unclear. Final Act. 3; Ans. 10. The
Examiner only finds that the term is not set forth or described in Appellant’s
Specification. Ans. 10. But this fact is, at most, evidence that the term is
not understood by the Examiner—not that the term was unclear to one of
ordinary skill in the art.
Accordingly, we reverse the indefiniteness rejection of claim 29 under
35 U.S.C. § 112(b).

THE WRITTEN-DESCRIPTION REJECTION
The Examiner’s Determinations
The Examiner finds that Appellant’s originally filed Specification
does not set forth or describe the term “unity gain,” which appears in later-
added claim 29. Final Act. 2. As such, the Examiner determines that the
originally filed Specification does not reasonably convey to one skilled in
the relevant art that the inventor had possession of the claimed invention at
the time the application was filed. Id.
Appellant does not assert in its principle Brief that the Specification
either sets forth the term “unity gain” or describes the concept. Appeal
Br. 8. Rather, Appellant only argues that the term is well-known and that
one skilled in the art “would understand that the front-end module of claim
29 provides an output voltage equal to an input voltage in the lower power
specification mode.” Id. (citing the above-noted Wikipedia page).
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Appellant subsequently cites the following passage of the originally
filed Specification for support of the disputed term:
The use of semiconductor based internal power amplifiers
(iPAs), as well as the architecture that includes the switching
circuitry 440, the single-stage PA 426 may lead to a reduced
power consumption over a broad range, when compared to an RF
system such as that illustrated in FIG. 7 or 9, while allowing
substantial signal power, in contrast with a system such as that
illustrated in FIG. 10. This performance change is illustrated in
chart 470 in FIG. 12. Chart 470 illustrates the power
consumption 172 in function of the output antenna power 174 for
a multi-stage power amplifier system (curve 476) and an internal
power amplifier system (curve 478). Note that throughout the
operating range of the system, an internal power amplifier system
may provide better power consumption 172 performance than the
multi-stage power amplifier system. In the lower range 480 for
output antenna power 174, RF system 400 may operate in an
internal power amplifier mode (e.g., iPA mode), in which the
internal power amplifier provides the signal application,
bypassing the single-stage amplifier. By deactivating and
bypassing the power amplifier in the front-end module, system
450 may reduce the baseline power consumption, in contrast with
the fixed voltage mode employed by an RF system 100, as
discussed above. At a moderate output antenna power 174
(region 481), the internal power amplifier may aggressively scale
power consumption, without resorting to an average power
tracking mode, and thus, the power amplifier in the front-end
module may remain deactivated.
Reply Br. 2–3 (citing Spec ¶ 46; Figs. 11, 12).
Analysis
Appellant’s citation to the Wikipedia page evidences that the meaning
of “unity gain” was understood one of ordinary skill, but it does not provide
evidence that Appellant’s Specification reasonably conveys to one skilled in
the relevant art that the inventor had possession of the claimed invention at
the time the application was filed.
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Appellant’s Figure 12, though, depicts a power curve 478 for an
internal power amplification system wherein the curve passes through a
point on the x-axis where the antenna power is 0 dBm. We understand
Figure 12 to depict, then, a point at which the front end module provides a
unity gain.
Accordingly, we reverse the written-description rejection of claim 29
under 35 U.S.C. § 112(a).

THE OBVIOUSNESS REJECTIONS
The Examiner’s Determinations
The Examiner finds that Zhu discloses most of the limitations of
claim 1, but fails to teach that the disclosed internal power amplifier and the
power amplifier are “coupled to a transmit (TX) port of the RF transceiver,”
as claimed. Final Act. 3–4. The Examiner finds that He teaches this feature
and that motivation existed to combine He’s teachings with those of Zhu.
Id. at 4.
The Examiner further finds, “the combination of Zhu and He fails to
mention the transceiver is configured to increase a gain of the internal power
amplifier in response to an increase in a demand of a power of the output RF
signal.” Final Act. 4. The Examiner finds that Ando teaches this feather and
that motivation existed to combine Ando’s teachings with those of Zhu and
He. Id. at 4–5.
Appellant’s Arguments and Analysis
(I)
Appellant first argues that the cited combination of Zhu, He, and
Ando fails to teach or suggest “a radio frequency (RF) transceiver
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comprising an internal power amplifier coupled to the TX port of the RF
transceiver” and “a front-end module comprising: a power amplifier . . .
switching circuitry configured to bypass the power amplifier or the front-end
module.” Appeal Br. 9. According to Appellant,
Zhu teaches a radio frequency transceiver 110 having a power
amplifier module 107 that includes two power amplifiers 205 and
210, and a bypass switch 235 that may switch off the power
amplifier 210 of the radio frequency transceiver 110. However,
Zhu is silent regarding a front-end module coupled to the radio
frequency transceiver 110, much less a front-end module having
the power amplifier 210 and the bypass switch 235.
Id. (citing Zhu ¶ 51).
Appellant questions whether the Examiner is interpreting the power
amplifier 205 as teaching the claimed radio frequency transceiver. Appeal
Br. 10, n.1. Appellant further argues, “because the power amplifier module
[of Zhu] is wholly contained within the radio frequency transceiver 110, the
power amplifiers 205, 210 and the bypass switch 235 are also part of the
radio frequency transceiver 110.” Id. at 11.
Appellant alternatively agues,
assuming, for the sake of argument, that the Examiner contends
that the radio frequency transceiver 110 of Zhu teaches the front
end module recited by independent claims 1, 11, and 17, and that
the transmit (TX) processing circuitry 115 and the receive (RX)
processing circuitry 125 of Zhu teaches the radio frequency
transceiver recited by the independent claims, the Appellant
notes that Zhu is silent regarding either the transmit processing
circuitry 115 or the receive processing circuitry 125 having an
internal power amplifier. . . . As such, even under these
hypothetical circumstances, Zhu is silent as to teaching a radio
frequency transceiver having an internal power amplifier, as
generally recited by independent claims 1, 11, and 17.
Appeal Br. 11 (citing Zhu ¶ 11).
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Appellant’s arguments imply that one of ordinary skill would
understand a radio frequency transceiver and a front-end module to
necessarily be non-overlapping, distinct components of the receiver. But
Appellant provides no evidence to support this position. See generally
Appeal Br.
Instead, extrinsic evidence indicates that the term “front end module”
is used in various manners, sometimes intended to encompass power
amplifiers, and sometimes intended to encompass all or some of the RF
antenna circuitry. See, e.g., Arrow, RF Front End (available at https://
www.arrow.com/en/categories/rf-and-microwave/rf-ics/rf-front-end) (“An
RF front end is a device or module that incorporates all the circuity between
the antenna and at least one mixing stage of a receiver and possible the
power amplifier of the transmitter.”); Carr, The Technician’s Radio Receiver
Handbook: Wireless and Telecommunication Technology, 2001 at 23 (“The
‘front end’ of a modern superheterodyne radio receiver is the circuitry
between the antenna input terminal and the output of the first mixer stage.”)
(available at https://books.google.com/books?id=PNnJnWMQCNkC&pg=
PA23&dq=%22front+end#v=onepage&q=%22front%20end&f=false)
(hereafter “Carr”); Wikipedia, RF front end (citing Carr) (“the RF front end
is a generic term for all the circuitry between a receiver’s antenna input up to
and including the mixer stage.”) (available at https://en.wikipedia.org/wiki/
RF_front_end).
Based on these varying definitions, we understand it to be merely a
semantic distinction, as opposed to a structural distinction, to characterize an
RF receiver’s antenna circuitry as being either part of or alternatively
separate from the front-end unit. Restated, notwithstanding the fact that Zhu
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characterizes the power amplifier module 200 of Figure 2 as being part of
the RF transceiver 110 (see Zhu Fig. 1), one of ordinary skill would have
found it reasonable to interpret the input/output terminals of first
interface 250, along with the power amplifier 205, as reading on “a radio
frequency (RF) transceiver comprising an internal power amplifier coupled
to a transmit (TX) port of the RF transceiver,” as recited in Appellant’s
claim 1. One of ordinary skill further would have found it reasonable to
interpret Zhu’s power amplifier 210, bypass switch 235, and controller 215
as reading on the power amplifier, switching circuitry, and controller of the
front-end module, as recited in claim 1.
(II)
Appellant argues that the combination of “Zhu, He, and Ando fail to
teach 1) an internal power amplifier of a radio frequency transceiver and 2) a
power amplifier of a front-end module, that are both coupled to a transmit
port of the radio frequency transceiver, as generally received by independent
claim 1.” Appeal Br. 12. More specifically, Appellant notes the Examiner
takes the position that Zhu fails to teach this claimed feature and instead
relies on He for teaching the feature. Id. Appellant then presents arguments
for why He fails to teach its front end module 162 having an amplifier. Id.
Appellant does not persuade us that the cited combination fails to
teach the disputed claim language because Zhu, itself, teaches the language.
As noted in the previous section of this Opinion, Zhu’s power amplifiers 205
and 210 respectively read on the claimed internal power amplifier of the
transceiver and power amplifier of a front-end module. Furthermore, Zhu’s
Figure 2 depicts first interface 250 of the transceiver 110 as including output
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terminals 265 that are coupled by a switch to the power amplifiers 205, 210.
Zhu Fig. 2; see also, e.g., id. ¶ 39.
(III)
Appellant argues that the cited combination of “Zhu, He, and Ando
fail to teach disabling the power amplifier of the front-end module in
response to an increase in a demand of a power of an output radio frequency
signal, as generally recited by independent claims 1 and 11.” Appeal Br. 14.
More specifically, Appellant argues, “the cited portions of Zhu appear to
teach closing the bypass switch 235 taught in Zhu ‘[o]nce the output power
level drops below a certain value . . . when the output power is in the fourth
range of values.’” Id. (citing Zhu ¶ 51). But according to Appellant, Zhu is
silent regarding closing the bypass switch 235 in response to an increase in
a demand of a power of an output radio frequency signal.” Id. at 14–15.
This argument is unpersuasive because it is not commensurate in
scope with the claim language. Claim 1 does not recite closing a bypass
switch to bypass the power amplifier of the front end module in response to
an increase in a demand of a power of the output RF signal, as Appellant
alleges. Claim 1, instead, recites “an internal power amplifier mode,
wherein the power amplifier of the front-end module is disabled and the
transceiver is configured to increase a gain of the internal power amplifier in
response to an increase in a demand of a power of the output RF signal.”
That is, claim 1 only requires that the gain of the internal power amplifier be
increased “in response to an increase in a demand of a power of the output
RF signal.”
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(IV)
Appellant argues that the cited combination does not teach a single-
stage amplifier in the front-end module, as recited by claims 11, 26, and 28.
Appeal Br. 15–16. Appellant argues that the Examiner relies on He teaches
this claim element (id. at 15 (citing Final Act. 4)), but that the front end
module of He’s Figure 1 fails to tech a single-stage amplifier. Id. at 15–16.
This argument is unpersuasive because regardless of whether He does
or does not teach a single-stage amplifier in the front-end module, Zhu does
teach a single-state amplifier. As stated previously, the power amplifier 210
of Zhu’s Figure 2 reads on the amplifier of the front-end module, as claimed.
Moreover, Zhu at least depicts the amplifier as being a single-stage
amplifier. Compare Zhu Fig. 2 (schematically depicting power amplifier
210 as a single triangle or single-stage amplifier) with Appellant’s Figure 9
(depicting the power amplifier 126 as a plurality of triangles, representing a
multi-stage amplifier). This distinction in the depictions of amplifiers
provides evidence that one of ordinary skill would understand that Zhu’s
depiction of a single triangle indicates, or at least renders obvious, that the
amplifier is or could be a single-stage amplifier.
Conclusions
For the foregoing reasons, Appellant does not persuade us of error in
the Examiner’s obviousness rejection of independent claims 1, 11, and 17.
Accordingly, we sustain the Examiner’s rejection of these claims and of
claims 2, 13, 18–20, 23, 24, and 26–28, which Appellant does not argue
separately. Appeal Br. 16.
With respect to the remaining rejection of dependent claims 6–10, 14–
16, 21, 22, and 29, Appellant does not present separate arguments regarding
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the additionally cited references. Appeal Br. 16–19. Appellant merely
argues the patentability of these claims based on their dependency from the
independent claims. Id.

DECISION SUMMARY
In summary:
Claim(s)
Rejected
35 U.S.C. § Reference(s)/
Basis
Affirmed Reversed
29 112(a) Written
Description
29
29 112(b) Indefiniteness 29
1, 2, 11, 13, 17–
20, 23, 24, 26–
28
103 Zhu, He, Ando 1, 2, 11, 13,
17–20, 23,
24, 26–28

6 103 Zhu, He, Ando,
Duncan
6
7 103 Zhu, He, Ando,
Hou
7
8 103 Zhu, He, Ando,
Lam
8
9 103 Zhu, He, Ando,
Cho
9
10 103 Zhu, He, Ando,
Jin
10
14, 15 103 Zhu, He, Ando,
Khesbak
14, 15
16, 22 103 Zhu, He, Ando,
Vaillancourt
16, 22
21 103 Zhu, He, Ando,
Narathong
21
29 103 Zhu, He, Ando,
Sridhar
29
Overall
Outcome
1, 2, 6–11,
13–24, 26–
29

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TIME PERIOD FOR RESPONSE
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1). See 37 C.F.R.
§ 1.136(a)(1)(iv).

AFFIRMED